JP3360649B2 - Liquid crystal display - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device used as a monitor of a personal computer and the like.
In particular, the present invention relates to a liquid crystal display device in which control of a circuit configuration and operation is simplified.

[0002]

2. Description of the Related Art A CRT (Cathode Ray Tube) display is generally adopted as a current liquid crystal display (LCD) interface from the viewpoint of replacing the CRT (Cathode Ray Tube) display. For this reason, LCD
There are signals having various resolutions. Therefore, in order to display these resolution signals on the entire surface of the LCD panel having a certain resolution, the LCD is required to have a display enlargement function called expansion. As current LCDs, there are a CRT interface for converting an input analog signal into a digital signal and performing signal processing such as expansion, and a CRT interface for performing signal processing using the input analog signal itself.

Significant points in the latter analog full-color LCD, which performs signal processing using the analog signal itself, include good representation of natural colors and good gradation with respect to image quality. However, the expansion display has a drawback in that a large number of bent portions are generated in the outline of the image and smooth display is not performed, as compared with the case of processing using digital signals. This is because in the processing of digital signals, spatial and / or temporal arithmetic processing between data is performed,
This is because such a process is not performed in the processing of the analog signal while the data interpolation at the time of the expansion is performed. If such an arithmetic processing is to be performed using an analog signal, more complicated technology and a large cost will be required.

Therefore, as an alternative processing method of expansion for an analog signal for which smooth display is difficult, there is a processing method called equal size centering display. This equal-magnification centering display displays an image at an equal size in the center of an LCD panel of a fixed resolution with respect to input signals of various resolutions, and smoothly displays an outline of the image. Processing method.

An important point in performing the equal-size centering display is that, by using an invalid period (invalid period) of data corresponding to a blanking period of a video signal, a normal black color other than the equal-size display of a screen is used. This means whether to draw the displayed part (frame part).

As a conventional technique related to the centering display, a 640 × 480 dot VGA (Vide Video) is used in a display of a notebook personal computer, for example.
There is a disclosure of how to display a signal of 640 × 400 dots at a resolution of o graphics array (JP-A-3-45990, JP-A-7-45990).
No. 181921). However, these are related to the processing of digital signals.

In the display method described in Japanese Patent Application Laid-Open No. 3-45990, the screen is divided into upper and lower parts and driven in two parts. Is shifted with the screen.

In the display method described in Japanese Patent Application Laid-Open No. Hei 7-181921, an LCD is determined at a predetermined point in time, for example, when a horizontal synchronization signal is input from the falling edge of a vertical synchronization signal. Writing is started from a predetermined point in time, and a predetermined amount of delay is applied to a synchronization signal input in advance.

On the other hand, recently, a 1280 × 1024 dot SXGA (Super extended graphics array) resolution panel is mounted on a 1024 × 768 dot XGA (Extend
ed graphics array), 800x600 dot SVG
A (Super video graphics array), 640 × 480 dot VGA (Video graphics array) or 640 × 4
There is a need to display a 00 dot image. However, in the method disclosed in the above-mentioned publication, centering processing with an analog signal is difficult, and there is a relationship with a corresponding resolution, so that it cannot be realized.

[0010] In particular, when a small-resolution image is displayed at the same magnification centering, the frame portion becomes larger than the invalid period in normal driving. Therefore, in order to realize such equal-size centering display, special driving is required for the frame portion. Such driving includes, for example, multiple simultaneous driving and fast-turning driving.

FIG. 13 is a block diagram showing a configuration of a conventional liquid crystal display device which performs centering display at the same magnification. Also,
FIG. 14 is a timing chart showing the operation of a conventional liquid crystal display device that performs centering at the same magnification. Conventional liquid crystal display devices include an analog horizontal driver integrated circuit (IC) for driving data lines (drain lines) in the liquid crystal panel 101.
102a to 102j are provided, and the liquid crystal panel 1
01 that drives the scanning lines (gate lines) in
C103a to 103d are provided.

When the equal magnification centering display is performed,
The image data (valid period data) is stored in the liquid crystal panel 10
The frame portion 104 which is displayed at the center of the frame 1 and is hatched in FIG. 13 is displayed in black (data during the invalid period). The horizontal width of the frame portion 104 is the same at the left edge a and the right edge b, and the vertical width is the same at the upper edge A and the lower edge B.

As shown in FIG. 14, the horizontal driver IC 1
02a to 102j sequentially drive the data lines from left to right, and the vertical driver ICs 103a to 103d drive the scanning lines from top to bottom, so that the left edge a, right edge b, An edge A and a lower edge B are displayed. Normally, the invalid period is equal to or longer than the sum of the periods for displaying the left edge a and the right edge b, and is equal to or longer than the sum of the periods for displaying the upper edge A and the lower edge B. When the left edge a, the right edge b, the upper edge A, and the lower edge B are displayed, the above-described fast-turn drive or multiple simultaneous drive is performed.

The fast-forward driving means that a clock to each driver is sent at a faster cycle than usual, a sample-and-hold operation of data is performed faster by an analog horizontal driver, and a scanning operation of a panel (gate line) is performed faster than usual by a vertical driver. ) Is a drive for scanning (on / off operation). On the other hand, the multiple simultaneous drive is a drive in which a plurality of sample and hold circuits are simultaneously operated by one clock to scan a plurality of scanning lines (gate lines). In addition, it is possible to cope with the early driving by using an analog horizontal driver and a vertical driver having the conventional functions. However, when performing a plurality of simultaneous driving, a driver corresponding thereto is newly added. Must be provided.

[0015]

However, these equal-size centering drives have the following problems.

First, as a problem common to both driving methods, it is necessary to display the left edge a and the right edge b or the upper edge A and the lower edge B individually during the invalid period. There is a case where the speed of fast-forward driving or simultaneous driving for displaying is greatly increased.

[0017] Further, as a problem in the fast driving,
Since a clock having a particularly short cycle is required for the fast driving period of the frame portion 104, the writing time is shortened in comparison with a normal display unit, and the required fast driving cycle is required. Depending on the situation, there is a possibility that sufficient writing may not be performed. When sufficient writing is not performed as described above, display quality is affected.

The problem with simultaneous driving is that it is necessary to display the left edge a and right edge b or the upper edge A and lower edge B individually during the invalid period as described above. That is, the number of data lines to be used increases. In addition, the driver IC itself must have a function of driving a plurality of data lines at the same time. However, since each edge is individually driven, for example, in horizontal scanning, switching from the left edge a to the equal-size display unit is performed. The time point and the time point of switching from the unit-size display unit to the right edge b differ for each resolution. This is the same in the vertical scanning. Therefore, fine and complicated mode control is required for the driver IC, which causes an increase in the cost of the driver IC.

The present invention has been made in view of the above problems, and provides a liquid crystal display device capable of obtaining good quality display and simplifying control of the circuit configuration and operation. With the goal.

[0020]

A liquid crystal display device according to the present invention starts displaying an image simultaneously from a liquid crystal panel and pixels at both left and right ends of the liquid crystal panel, and displays the image in a frame portion of the screen.
To the center of the LCD panel in the horizontal direction.
Horizontal image display means for sending data, the display of images starts at the same time from the pixels of the upper and lower ends of the liquid crystal panel, the frame portion of the screen
In the vertical direction of the liquid crystal panel
Vertical image display means for sequentially scanning .

In the present invention, the horizontal and vertical image display means start displaying an image from both the left and right ends and the upper and lower ends of the liquid crystal panel. Since the parts are displayed at the same time, it is possible to easily and reliably write the frame portion within the invalid period.

In the present invention, the liquid crystal panel has a plurality of data lines extending in the vertical direction and scanning lines extending in the horizontal direction, and the horizontal image display means includes the data lines. And a plurality of horizontal driving circuits cascaded with each other by driving the potentials of the scanning lines, and the vertical image display means has a plurality of vertical driving circuits cascaded with each other by driving the potentials of the scanning lines. A horizontal start pulse indicating the start of image display in the horizontal direction is simultaneously input to ones located at both ends of the plurality of horizontal drive circuits, and a vertical start pulse indicating the start of image display in the May be simultaneously input.

A horizontal operation stopping means for stopping the operation of the horizontal drive circuit during operation when displaying an image having a resolution lower than the resolution of the liquid crystal display panel; Vertical operation stopping means for stopping the operation of the vertical driving circuit during operation when displaying a low-resolution image may be provided.

Further, a horizontal driving circuit whose operation has been stopped by the horizontal operation stopping means, and a horizontal direction inverting means for inverting the shift directions of all the horizontal driving circuits via the horizontal start pulse inputted to the horizontal driving circuit; A vertical driving circuit whose operation has been stopped by the vertical operation stopping means, and vertical direction inverting means for inverting the shift directions of all the vertical driving circuits through which the vertical start pulse input to the vertical driving circuit has passed. Can be.

[0025] Furthermore, the predetermined number driven simultaneously.
At the same time the driving of the data line, a data line for the predetermined number
It is set in between one or more data lines which are not, the run査線of the predetermined number to be driven simultaneously, the place
It may preferably be set in between the one or more scan lines and the constant number of scan lines are not driven simultaneously.

[0026]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a liquid crystal display according to an embodiment of the present invention will be specifically described with reference to the accompanying drawings. FIG. 1 is a block diagram showing the configuration of the liquid crystal display device according to the first embodiment of the present invention.

In the first embodiment, 1280 (RGB) ×
1024-dot SXGA (Superextended graphics a
(rray) resolution liquid crystal panel 1 is provided. Therefore, the liquid crystal panel 1 has 3840 data lines (drain lines) extending in the vertical direction and 1024 data lines extending in the horizontal direction.
Two scanning lines (gate lines) are provided. This liquid crystal panel 1 has an XGA (1024 ×
768), SVGA (800 × 600), VGA (64
0 × 480) is displayed. When the same-size centering display is performed, image data (data during the valid period) is displayed at the center of the liquid crystal panel 1, and the frame portion 4 hatched in FIG. Data). The width of the frame portion 4 in the horizontal direction includes a left edge portion a and a right edge portion b.
And the vertical width is the upper edge A and the lower edge B
And are the same.

A plurality of analog horizontal driver ICs for driving data lines in the liquid crystal panel 1 are provided.
If the output of one horizontal driver IC is 384 outputs, the number is ten. In this embodiment, the horizontal driver ICs 2a to 2j are arranged in this order from left to right in the horizontal direction of the liquid crystal panel 1. Further, a plurality of vertical driver ICs for driving the scanning lines in the liquid crystal panel 1 are provided. The output of one vertical driver IC is 25
If there are six outputs, the number is four. In this embodiment, the vertical driver ICs 3a to 3d are arranged in this order from top to bottom in the vertical direction of the liquid crystal panel 1.

The start pulse HSP is simultaneously supplied to the leftmost horizontal driver IC 2a and the rightmost horizontal driver IC 2j among the horizontal driver ICs.
Is entered. The start pulse VS is simultaneously supplied to the uppermost vertical driver IC 3a and the lowermost vertical driver IC 3d among the vertical driver ICs.
P is input. Adjacent driver ICs are cascaded with each other, and a start pulse is input and output between them.

The reset signal HRST is input to the horizontal driver IC 2i, and the reset signal VRST is input to the vertical driver IC 3d. These driver ICs
Is a driver in charge of the boundary between the frame portion 4 on the rear side and the same-size centering display section with respect to the direction in which data flows in the same-size centering display.

Further, the direction control signal HR / L is input to the horizontal driver ICs 2i and 2j, and the vertical driver IC 3d
Is supplied with a direction control signal VR / L.

Next, the basic block configuration and operation of a general conventional analog horizontal driver IC and vertical driver IC will be described. FIG. 2 is a simplified block diagram showing a general conventional analog horizontal driver IC.
FIG. 2 is a simplified block diagram showing a general conventional vertical driver IC. FIG. 4 is a timing chart showing the operation of a shift register used in a conventional driver IC.

As shown in FIG. 2, the analog horizontal driver IC is provided with a shift register section 11, a sample and hold section 12, and an output buffer section 13.
The shift register unit 11 is provided with a shift register including n-stage blocks SR1 to SRn to which the horizontal clock signal HCK is input. The first block SR
1, a start pulse HSPI is input, and a start pulse HSPO is output from the last block SRn. The sample-and-hold unit 12 includes a shift pulse SP1 output from each of the registers SR1 to SRn.
, And sample / hold circuits S / H1 to S / Hn for sampling and holding an analog data signal until SPn rises. The output buffer unit 13 includes output buffer amplifiers BU1 to BU that output the analog data signals O1 to On output from the sample-and-hold circuits S / H1 to S / Hn, respectively.
n is provided.

On the other hand, the vertical driver IC has a shift register section 21 and an output buffer section 23 as shown in FIG.
Is provided. The shift register unit 21 is provided with a shift register including n-stage blocks SR1 to SRn to which the vertical clock signal VCK is input. A start pulse VSPI is input to the first block SR1, and a start pulse VSPO is output from the last block SRn. And the output buffer unit 1
3 includes the shift pulses SP1 to SPn output from each of the blocks SR1 to SRn as output signals O1 to O3, respectively.
output buffer amplifiers BU1 to BUn output as n
Is provided. Each output buffer amplifier BU1 to BU
Un is provided with an external terminal to which an output enable signal OE for controlling enable / disable of output is input. The output signal is output at the level of the on-voltage (about 20 V) or the off-voltage (about -10 V) of the thin film transistor in the liquid crystal panel 1.

As described above, the shift register is arranged at the forefront in the general conventional analog horizontal driver IC and vertical driver IC. In this shift register, a clock signal HCK or VCK is input to each block (D-type flip-flop) SR1 to SRn of the shift register unit 11 or 21. Then, when the start pulse HSP or VSP having one clock width is input to the block at the forefront, the clock operation of the shift register sequentially outputs the shift pulses SP1 to SPn having one clock width for each block. By such an operation of the shift register, the horizontal driver IC and the vertical driver IC sequentially take in data.

Next, the operation of the liquid crystal display of the first embodiment configured as described above will be described. FIG. 5 is a timing chart showing the operation of the liquid crystal display device according to the first embodiment of the present invention, and FIG. 6 is a timing chart showing the operation of the shift register used in the first embodiment of the present invention. . First, the display operation in the horizontal direction will be described.

One horizontal scanning period (1) including a display valid period (valid period) and an invalid period (invalid period).
When the data of H) is input to the liquid crystal display device (LCD) of the first embodiment on the horizontal synchronizing signal, the frame portion is determined by the data of the invalid period before and after the data of the valid period displayed at the equal magnification centering. 4 is drawn, for example, in black.

In the invalid period, the horizontal start pulse HSP is input to the first and last horizontal driver ICs 2a and 2j at the same timing. Then, for example, simultaneously with the fall of the reset signal HRST in the previous operation, the direction control is performed on the driver IC 2i in charge of the boundary between the rear unity centering display section and the right edge b and the driver IC 2j disposed on the right side thereof. Signal HR /
L is input, and the shift direction is set to a direction opposite to the direction (normal direction) of the SXGA display in which the equal-size centering display is not performed. That is, the horizontal driver IC2
In the area assigned to i and 2j, the scanning is set from right to left.

The number of simultaneous drives is adjusted by a plurality of simultaneous drives so that the left edge a and the right edge b are properly written in the invalid period. The left edge a is from the left and the right edge b is from the right. At the same time, drawing of the frame portion 4 is started.
Thereafter, the writing of the left edge a and the right edge b of the frame portion 4 is completed, and at the same time, the driver I in charge of the rear boundary
The reset signal HRST is input to C2i, and the contents of the shift register therein are cleared.

Thereafter, at the same time as the fall of the reset signal HRST, the direction control signal HR / L is set to the horizontal driver IC.
2i and 2j, and the shift direction is returned to the normal direction. At the same time, the same-size centering display section is written by the data of the valid period. When the writing of the equal magnification centering display section reaches the boundary with the right edge b, a reset signal HR is sent to the horizontal driver IC 2i.
ST is input, and the contents of the shift register therein are cleared. In this way, the same-size centering display is performed.

Next, the operation of the shift register when writing the frame portion 4 will be described in more detail. FIG.
As shown in (2), for example, a plurality of simultaneous drives with a simultaneous drive number of 4 are employed for driving the shift register.

In this embodiment, the cycle of the clock signal used for writing in the frame portion 4 is the same as that for writing in the 1: 1 centering display section. When the start pulse is input to the first and last horizontal driver ICs, shift pulses SP1 to SP1 are generated by the first clock.
4 is generated, and a shift pulse SP5 is generated at the second clock.
To SP8, shift pulses SP9 to SP12 are generated by the third clock, and so on. Shift pulses are sequentially generated, and four data lines (drain lines) are simultaneously driven continuously and simultaneously. You.

When the number of simultaneous driving is 16, for example, 16 data lines are simultaneously driven continuously and activated. The frame portion 4 is written by combining the simultaneous driving numbers.

The method for simultaneously driving a plurality of devices is not limited to the one described above, and the following method can be realized. FIG. 7 is a timing chart showing another operation of the shift register used in the first embodiment of the present invention.
In the case of the continuous simultaneous drive as described above, there is a possibility that the display quality may be deteriorated in a block manner for each number of simultaneous drives. Therefore, in this operation, the portions that become simultaneously active are dispersed. Note that the cycle of the clock signal is the same as that at the time of writing to the 1: 1 centering display unit, as in the above-described operation.

In this operation example, the shift pulse becomes active every fourth pulse. That is, when the start pulse is input to the first and last horizontal driver ICs, SP1, SP5, SP9 and SP13 are generated by the first clock, and SP2, SP6, SP10 and SP14 are generated by the second clock. SP3, S at the third clock
P7, SP11 and SP15 are generated, and every fourth shift pulse becomes active at the same time, such as every fourth pulse. Then, at the fifth clock, SP17, S
P21, SP25, and SP29 are generated, and SP18, SP22, SP26, and SP30 are generated at the sixth clock, and shift pulses are generated (become active), such as.

If the number of simultaneous driving is, for example, 16, every four data lines are activated simultaneously by 16 lines. In the case of the four-step simultaneous drive, at least four clocks are required, and the control is performed by multiplying the number of simultaneous drives by four as one unit. In consideration of such a limitation, writing of the frame portion 4 is performed by appropriately combining the number of simultaneous driving.

The display operation in the vertical direction is the same as the operation in the horizontal direction. In FIG. 5, each signal in the vertical display operation is described in parentheses.

Table 1 shows an example of the vertical control in the case where a signal having a lower resolution is displayed on the SXGA (1280 × 1024) liquid crystal panel 1 by the centering display of the same size. Table 2 shows an example of the vertical control in the conventional liquid crystal display device.

[0049]

[Table 1]

[0050]

[Table 2]

Note that “SUN” is the resolution of a workstation manufactured by Sun Microsystems, Inc.
"C" indicates the resolution of a personal computer manufactured by Apple Computer, and "PC98" indicates the resolution of a personal computer manufactured by NEC Corporation. “SUN” is a trademark of Sun Microsystems, “MAC” is a trademark of Apple Computer, and “PC98” is a trademark of NEC Corporation.

The example of control shown in Table 1 is based on the premise that four jumps and a plurality of drives are performed simultaneously. In this case, the required number of simultaneous driving is only 16 and 4, and it is possible to cope with each resolution by combining the normal driving with one driving.

On the other hand, as shown in Table 2, when the same-size centering display is performed by the conventional liquid crystal display device, the number of simultaneous driving is large.
In addition to the number of driving, the number of driving of 32, 20, and 12 is also required. When displaying the frame portion, it is necessary to change the frame portion to an arbitrary one at almost any position, so that the circuit configuration of the shift register section in the driver IC is extremely complicated.

As described above, the frame portion is driven by a clock fast drive or a plurality of simultaneous drives.
In the case of driving the clock forward, the writing time of that part is different from that of the centering part, so that the display quality may be impaired.

In the first embodiment, in addition to the normal functions, the horizontal driver and the vertical driver require a plurality of simultaneous driving functions capable of changing the number of simultaneous driving during driving of the liquid crystal panel 1. You.

Next, a second embodiment of the present invention will be described. In the second embodiment, the driving method in the horizontal direction is different from that of the first embodiment. FIG. 8 shows a horizontal driver IC used in a liquid crystal display device according to a second embodiment of the present invention.
FIG. 3 is a block diagram showing the configuration of FIG. FIG. 9 is a timing chart showing the operation of the liquid crystal display device according to the second embodiment of the present invention, and FIG. 10 is the operation of the shift register used in the horizontal driver IC according to the second embodiment of the present invention. FIG. In the horizontal driver IC shown in FIG. 8, the same components as those in the horizontal driver IC shown in FIG. 2 are denoted by the same reference numerals, and the detailed description thereof will be omitted.

In the second embodiment, the voltage level of the frame portion is directly input from the outside to the sample and hold circuit section 22 of the analog horizontal driver IC. And
The voltage level input from the outside is output to the liquid crystal panel only from the sample-and-hold circuit of the part in charge of driving the frame part.

Further, the portion is determined in advance by a setting input to the driver IC. Then, as shown in FIG. 9, the start pulse HSP stands at the start position of the valid data of the equal-size centering display. The start pulse HSP is input only to the first block SR1, but as shown in FIG. 10, the start pulse HSP passes through the block in charge of the frame portion and performs a normal operation from the area where the equal-size centering display is performed.

Next, a third embodiment will be described. The third embodiment differs from the first and second embodiments in the driving method in the vertical direction. In general, vertical drivers
As shown in (1), an external terminal to which an output enable signal OE for controlling the enable / disable of the output is provided. Then, while the output enable signal OE is at the high level, all the outputs of the driver are turned off level asynchronously with the clock. In the third embodiment, this function is used to control the rear boundary of the frame portion and the unity centering display unit. FIG. 11 is a block diagram showing the configuration of the liquid crystal display device according to the third embodiment of the present invention. FIG. 12 is a timing chart showing the operation of the liquid crystal display device according to the third embodiment of the present invention.

In the third embodiment, the direction control signal VR is supplied to the vertical driver IC 3d responsible for driving the rear boundary.
/ L, reset signal VRST and start pulse VSP
In addition, an output enable signal OE is input.

At the same time that the frame portion is written by a plurality of simultaneous driving, the output enable signal OE is set to the high level for a certain period. Similarly, the output enable signal OE is set to the high level for a certain period at the same time as the writing of the equal magnification centering display section is completed. As a result, during this period, the output of the vertical driver IC 3d is turned off, that is, the output from the vertical driver IC 3d is not output.

During this period, the reset signal VRST is supplied to the vertical driver IC similarly to the first embodiment.
3d, the shift direction is switched by clearing the contents of the shift register and inverting the level of the direction control signal VR / L.

As described above, according to the third embodiment, since the output enable function is used, it is possible to more reliably and safely switch the display.

[0064]

As described in detail above, according to the present invention,
Since the horizontal image display means and the vertical image display means for simultaneously starting the display of images from both ends of the liquid crystal panel are provided,
The same-size centering display can be easily and reliably performed. Further, the circuit configuration for that is sufficient if it can stop driving, invert, and the like, so that it can be simplified. Therefore, an increase in cost can be suppressed.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a liquid crystal display device according to a first embodiment of the present invention.

FIG. 2 is a block diagram schematically showing a general conventional analog horizontal driver IC.

FIG. 3 is a simplified block diagram showing a general conventional vertical driver IC.

FIG. 4 is a timing chart showing an operation of a shift register used in a conventional driver IC.

FIG. 5 is a timing chart showing an operation of the liquid crystal display device according to the first example of the present invention.

FIG. 6 is a timing chart showing the operation of the shift register used in the first embodiment of the present invention.

FIG. 7 is a timing chart showing another operation of the shift register used in the first embodiment of the present invention.

FIG. 8 is a block diagram showing a configuration of a horizontal driver IC used in a liquid crystal display device according to a second embodiment of the present invention.

FIG. 9 is a timing chart illustrating an operation of the liquid crystal display device according to the second example of the present invention.

FIG. 10 is a timing chart showing the operation of a shift register used in the horizontal driver IC according to the second embodiment of the present invention.

FIG. 11 is a block diagram illustrating a configuration of a liquid crystal display device according to a third embodiment of the present invention.

FIG. 12 is a timing chart illustrating an operation of the liquid crystal display device according to the third example of the present invention.

FIG. 13 is a block diagram illustrating a configuration of a conventional liquid crystal display device that performs equal magnification centering display.

FIG. 14 is a timing chart showing the operation of a conventional liquid crystal display device that performs centering at the same magnification.

[Explanation of symbols]

1: liquid crystal panels 2a, 2b, 2c, 2d, 2e, 2f, 2g, 2h, 2
i, 2j; horizontal driver 3a, 3b, 3c, 3d; vertical driver 4: frame part 11; shift register part 12; sample and hold part 13; output buffer part HRST, VRST; reset signal HSP, VSP; start pulse HR / L, VR / L; direction control circuit HCK, VCK; clock HSPI, HSPO, VSPI, VSPO; start pulse OE; output enable signal

Claims (6)

(57) [Claims] An image display is simultaneously started from a liquid crystal panel and pixels at both left and right ends of the liquid crystal panel, and a frame portion of the screen is displayed.
In the horizontal direction of the liquid crystal panel
Horizontal image display means for sending data sequentially, the display of images starts at the same time from the pixels of the upper and lower ends of the liquid crystal panel, the screen
In the frame portion of the liquid crystal panel in the vertical center
And a vertical image display means for sequentially scanning the liquid crystal display device. 2. The liquid crystal panel has a plurality of data lines extending in a vertical direction thereof and a scanning line extending in a horizontal direction thereof, and the horizontal image display means drives a potential of the data lines. A plurality of horizontal drive circuits connected in cascade with each other, and the vertical image display means includes a plurality of vertical drive circuits connected in cascade to drive the potential of the scanning line, and A horizontal start pulse indicating the start of image display in the horizontal direction is simultaneously input to ones located at both ends of the horizontal drive circuits, and the start of vertical image display is started to ones located at both ends of the plurality of vertical drive circuits. 2. The liquid crystal display device according to claim 1, wherein the indicated vertical start pulses are input simultaneously. 3. A horizontal operation stopping means for stopping the operation of the horizontal driving circuit during operation when displaying an image having a lower resolution than the resolution of the liquid crystal display panel, and 3. The liquid crystal display device according to claim 2, further comprising vertical operation stopping means for stopping the operation of the vertical driving circuit during operation when displaying a low-resolution image. 4. A horizontal drive circuit whose operation has been stopped by said horizontal operation stop means, and a horizontal direction inverting means for inverting the shift direction of all horizontal drive circuits through which a horizontal start pulse has been inputted to said horizontal drive circuit. A vertical driving circuit whose operation has been stopped by the vertical operation stopping means, and vertical direction inverting means for inverting the shift directions of all the vertical driving circuits through which the vertical start pulse input to the vertical driving circuit has passed. The liquid crystal display device according to claim 3, wherein: 5. The method according to claim 2, wherein a predetermined number of potentials of said data lines are simultaneously driven by said horizontal driving circuit, and a predetermined number of potentials of said scanning lines are simultaneously driven by said vertical driving circuit. 5. The liquid crystal display device according to any one of 4. Wherein said predetermined number of data lines to be simultaneously driven are not driven at the same time as the data line for the predetermined number 1
It is set in between the present more data lines, at the same time
Run査線of the predetermined number to be driven, the run of the predetermined number
The liquid crystal display device according to claim 5, characterized in that it is sandwiched therebetween set between the one or more scanning lines that are not driven simultaneously with査線.