JP3277526B2 - Bus adapter monitoring system - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bus adapter monitoring system, and more particularly to a monitoring system for monitoring a bus adapter for relaying information exchange between a memory bus and an input / output bus.

[0002]

2. Description of the Related Art FIG. 2 shows a schematic configuration of a system of an information processing apparatus using such a bus adapter. An arithmetic processing device 4 and a main storage device 5 are connected to the memory bus 1, and a basic input / output device (hereinafter simply referred to as an input / output device) 7 is connected to a basic input / output bus (hereinafter simply referred to as an input / output bus) 2. Have been.

A basic bus adapter (hereinafter simply referred to as a bus adapter) 6 is provided between the memory bus 1 and the input / output bus 2.
Is provided, and the bus adapter 6 allows the memory bus 1
The transmission and reception of information between the input and output buses 2 is performed.

An additional input / output bus 3 is added, and an additional input / output device 9 is connected to the bus 3.
Further, an additional bus adapter 9 is provided between the memory bus 1 and the additional input / output bus 3, and the adapter 9 exchanges information between the memory bus 1 and the additional input / output bus 3.

In such an information processing system, there is no means for monitoring the information relay function of each of the bus adapter 6 and the additional bus adapter 9, and it is difficult to find the cause when a failure occurs.

[0006]

An object of the present invention is an object of the invention is to provide a bus adapters monitoring system facilitates investigate the cause of the failure as a possible monitoring during information relay bus adapter.

[0007]

According to the present invention, there is provided a basic bus adapter for relaying information between a memory bus and a basic input / output bus, and an additional bus adapter for relaying information between the memory bus and the additional bus . A bus adapter monitoring system for performing monitoring, wherein the basic bus adapter stores information before relaying by the additional bus adapter ;
After the output of the storage means and the extension bus adapter relays
And a comparing means for comparing the information, the additional bus adapter, rank information before the basic bus adapter relays
Storage means for storing the output of the storage means and the basic bus
Adapter has <br/> a comparing means for comparing the information after relaying, the basic bus adapter based on which such comparison
And a bus adapter monitoring system characterized by monitoring each of the additional bus adapters .

[0008]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a block diagram showing a system configuration according to an embodiment of the present invention, and the same parts as those in FIG. 2 are denoted by the same reference numerals. In this embodiment, a function of monitoring each other is added to the basic bus adapter 6 and the additional bus adapter 8.

The bus adapter 6 has storage means 63 therein. The storage means 63 can select and store information on the memory bus 1 or the additional input / output bus 3 by the selector 61.

Conversely, the comparing means 64 can compare the information selected by the selector 62 with the information on the additional input / output bus 3 or the memory bus 1 and the information stored in the storage means 63.

The additional bus adapter 8 is provided with a storage means 83.
Built-in. The storage means 83 can select and store information on the memory bus 1 or the basic input / output bus 2 by the selector 81.

On the contrary, the comparing means 84 can compare the information selected by the selector 82 with the information on the basic input / output bus 2 or the memory bus 1 and the information stored in the storage means 83.

First, the arithmetic processing unit 4 is connected to the additional input / output bus 3
Consider a case where the input / output device 9 is activated.

In this case, information is transferred between the input / output device 9 on the additional input / output bus 3 and the main storage device 5 through the additional bus adapter 8. At this time, a case where information flows from the main storage device 5 to the input / output device 9 on the additional input / output bus 3 via the additional bus adapter 8 will be described first.

The information leaving the main storage device 5 enters the additional bus adapter 8 via the memory bus 1. At this time, the information of the memory bus 1 is selected by the selector 61 built in the bus adapter 6. It is stored in the storage means 63.

On the other hand, when the information relayed by the extension bus adapter 8 enters the I / O device 9 via the extension I / O bus 3, the selector 62 in the bus adapter 6 selects the information of the extension I / O bus 3, The comparing means 64 compares the information stored in the storage means 63 with the information selected by the selector 62. As a result, when the compared information is different, the comparing means 64 issues an error signal to the host device (not shown).

Next, the input / output device 9 on the additional input / output bus 3
The case where information flows to the main storage device 5 from the main storage device 5 through the additional bus adapter 8 will be described.

The information is stored in the input / output device 9 on the additional input / output bus 3.
, And enters the additional bus adapter 8 via the additional input / output bus 3. At this time, the selector 61 in the bus adapter selects the information of the additional input / output bus 3 and stores it in the storage means 63.

Meanwhile, although the information leaving the expansion bus adapter 8 enters the main memory 5 through the main <br/> Moribasu 1, this time information of the memory bus 1 selects the selector 62 in the bus adapter 6 The comparing means 64 compares the information stored in the storage means 63 with the information selected by the selector 62. As a result, when the compared information is different, the comparing means 64 issues an error signal to the host device (not shown).

Next, the case where the arithmetic processing unit 4 starts the input / output device 7 on the basic input / output bus 2 will be considered.

In this case, information is transferred between the input / output device 7 on the basic input / output bus 2 and the main storage device 5 through the bus adapter 6. At this time, a case where information flows from the main storage device 5 to the input / output device 7 on the basic input / output bus 2 via the bus adapter 6 will be described first.

The information leaving the main storage device 5 enters the bus adapter 6 via the memory bus 1. At this time, the information of the memory bus 1 is selected by the selector 81 incorporated in the additional bus adapter 8. It is stored in the storage means 83.

On the other hand, when the information relayed by the bus adapter 6 enters the input / output device 7 via the basic input / output bus 2, the selector 82 in the additional bus adapter 8
And the comparing means 84 compares the information stored in the storage means 83 with the information selected by the selector 82. As a result, when the compared information is different, the comparing means 84 issues an error signal to a higher-level device (not shown).

Next, the input / output device 7 on the basic input / output bus 2
A case will be described in which information flows from the main storage device 5 to the main storage device 5 via the bus adapter 6.

Information is transferred to the input / output device 7 on the basic input / output bus 2.
And enters the bus adapter 6 via the basic input / output bus 2. At this time, the selector 81 in the additional bus adapter selects information on the basic input / output bus 2 and stores it in the storage means 83.

On the other hand, the information leaving the bus adapter 6 enters the main storage device 5 via the memory bus 1. At this time, the selector 82 in the additional bus adapter 8 selects the information on the memory bus 1 and the comparing means 84 Compares the information stored in the storage means 83 with the information selected by the selector 82. As a result, when the compared information is different, the comparing means 84 issues an error signal to a higher-level device (not shown).

Referring again to FIG. 2 showing the prior art, this differs from FIG. 1 in that the bus adapter 6 and the additional bus adapter 8 have no storage means and no comparison means. Therefore, the input / output device 9 is transferred from the main storage device 5 through the additional bus adapter 8.
When transmitting and receiving information to and from the server, even if a failure occurs in the additional bus adapter 8, it is difficult to determine the cause.

When information is transmitted and received between the main storage device 5 and the input / output device 7 via the bus adapter 6, even if a failure occurs in the bus adapter 6, it is difficult to determine the cause.

As described above, by reading and comparing the values of both the memory bus 1 and the extension input / output bus 3 during the data transfer by the bus adapter 6, the failure caused by the extension bus adapter 8 can be easily investigated. Further, by monitoring the additional bus adapter 8, the maintainability can be improved.

Further, by adding bus adapter 8 is read compare memory bus 1, the values of both the basic input output bus 2 during data transfer, it is possible to easily investigate the fault that by the bus adapter 6, Further, by monitoring the bus adapter 6, the maintainability can be improved.

[0032]

As described above, the present invention provides a memory bus, a basic input / output bus, and a bus adapter and an additional bus adapter each having a storage means and a comparison means built therein.
The value of the additional I / O bus can be read and compared, which has the effect of facilitating isolation of a failure by the bus adapter and the additional bus adapter and improving maintainability.

[Brief description of the drawings]

FIG. 1 is a system block diagram showing an embodiment of the present invention.

FIG. 2 is a block diagram of an information processing system showing a conventional technique.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Memory bus 2 Basic input / output bus 3 Additional input / output bus 5 Main storage device 6 Basic bus adapter 7 Basic input / output device 8 Additional bus adapter 9 Additional input / output device 63,83 Storage means 64,84 Comparison means

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) G06F 11/30 320 G06F 13/00 301

Claims (1)

(57) [Claims] 1. A basic bus adapter for relaying information between the memory bus and the basic output bus, said memory bus and increasing
A bus adapter monitoring system that monitors each of the additional bus adapters that relays information to and from an additional bus, wherein the basic bus adapter stores information before the additional bus adapter relays the information, The output of this storage means
And a comparing means for force and the expansion bus adapter compares the information after relaying, the expansion bus adapter, a storage unit for the basic bus adapter to store information before relaying, the storage means Out
And a comparing means for force and the basic bus adapter compares the information after relaying, the basic bus adapters and increase on this basis such comparison
Bus adapters monitoring system is characterized in that so as to form a respective monitoring setting bus adapter.