JP3436208B2 - Communication control device tracing method and method - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a trace method for a communication control device, and more particularly to a trace method and method for a communication control device for detecting a change in a communication line interface signal and recording trace information.

[0002]

2. Description of the Related Art A communication control unit (CCU) is a device that exists between a central processing unit system and a communication line and controls transmission and reception of data between a computer and a terminal device.
It has a communication interface such as V24, X21, V35 recommended by ITU-T (International Telecommunication Union-Telecommunication Standardization Sector) between the communication line.

In such a communication control device, various line monitor devices are used as effective means for isolating communication faults caused by line quality, data line terminating equipment (DCE) fault, partner terminal fault and the like.

Conventionally, the connection between a communication control device and various line monitoring devices is performed by disconnecting the communication cable connecting the communication control device and the data line terminating device to the communication control device and the communication cable or the communication cable. Various line monitoring devices were inserted between the data line terminating equipment.

[0005]

However, the above-mentioned conventional technique has the following problems.

The first problem is that the communication is cut off for a long time due to the connection of various line monitoring devices.

The reason is that the line is disconnected while the cable is removed from the communication control device or the data line terminating device and while the cable is connected to various line monitoring devices.

The second problem is that it may be difficult to compare the trace information collected by the communication control device with the time relation between the line signal change data collected by the various line monitoring devices for analysis. That's what it means.

The reason is that the timer incorporated in the communication control device and the timer incorporated in various line monitors are not synchronized.

An object of the present invention is to provide a communication control device having line status recording means for solving the above problems.

[0011]

Trace form of the communication control device SUMMARY OF THE INVENTION The first invention is a communication control apparatus for controlling the line interface signals between a host device such as a central processing unit and the communication line, the communication The control unit uses the line
Signal line latch circuit that latches the status of the interface signal
Hold the previous state of the line, the line interface signal
A status holding register and the signal line latch circuit
Compare with the status holding register, and if there is a difference, send the interrupt signal
Signal line change detection having comparison circuit generated in sequencer
The output section and the interrupt signal from the signal line change detection section
Contents of line interface signal and communication control device
Tray consisting of the contents of the real-time clock
Sequencer for writing information on memory to memory and the trace
And a memory for storing information .

The trace method of the communication control apparatus according to the second invention of the present application is the communication control apparatus according to the first invention, wherein:
A selection circuit for selecting a line interface signal,
It is characterized by

Trace of the communication control device of the third invention of the present application
The method is to connect between the host device such as the central processing unit and the communication line.
Tray of communication control equipment that controls line interface signals
A signal line latch circuit,
The status of the interface signal is latched and the comparison circuit maintains the status.
One of the line interface signals held by the holding register
The previous state and the number of times the signal line latch circuit has latched
Compare with the state of the line interface signal, and if there is a difference,
Generate a built-in signal to the sequencer, and the sequencer
The line interface signal by the interrupt signal from the circuit
Content and real-time clock in the communication control device
Write trace information consisting of lock contents to memory
However, the memory stores the trace information.
To collect .

Trace of the communication control device of the fourth invention of the present application
The method is the signal line latch circuit in the third invention ,
The status of the line interface signal selected by the selection circuit
The feature is that

[0015]

[0016]

[0017]

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A feature of the trace method of a communication control device according to the present invention is that it has means for detecting a signal line change of a line interface signal and storing a change time of the line interface signal and its signal state. is there.

The first embodiment of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram of the first embodiment of the present invention.

FIG. 2 is a block diagram showing the configuration of the signal line change detection unit.

Referring to FIG. 1, the communication control device 10 of the present invention includes a CPU 20, a ROM 30, a URT 40,
A first local memory 50, a real-time clock (hereinafter abbreviated as RTC) 60, a bus controller 70, D
/ R80, connector 90, sequencer 200, signal line change detection unit 300, and second local memory 400.
It consists of and.

The CPU 20 is a processor that controls the communication control device 10.

The ROM 30 is a read-only memory that stores a program for controlling the communication control device 10.

The URT 40 is a general-purpose communication control controller LSI that controls communication.

The first local memory 50 is used as a work area of the communication control program, a control table area and a trace storage area.

The RTC 60 is a timekeeping device.

The bus control unit 70 is a system bus controller that controls the system bus.

The D / R 80 is a driver / receiver circuit complying with the ITU-T recommendation.

The connector 90 is a communication connector complying with the ITU-T recommendation.

The URT 40, the D / R 80, and the connector 90 are connected by a signal line in accordance with the ITU-T recommendation. In FIG. 1, in order to explain the trace method of the present invention, the ER (data terminal) is used. Ready) signal 42, DR (data set ready) signal 43, RS (transmission request) signal 44,
A CS (ready to send) signal 45 and a CD (data channel received carrier detect) signal 46 are illustrated.

The sequencer 200 includes a signal line change detection unit 3
When an interrupt signal (INT2) 301 from 00 is detected,
The contents of the RTC 60 and the signal line latch output in the signal line change detection unit 300 are read, and the second local memory 400 is read.
Write in.

The signal line change detection unit 300 latches the states of the ER signal 42, the DR signal 43, the RS signal 44, the CS signal 45 and the CD signal 46 by the CLOCK signal 302 and holds them in the signal line change detection unit 300. If there is a difference from the state before latching, the interrupt signal (INT2) 301 is output to the sequencer 200. The signal line change detection unit 3
Details of 00 will be described later.

The second local memory 400 receives the ER signal 4
2, a trace storage area for storing the states of the DR signal 43, RS signal 44, CS signal 45, and CD signal 46. The contents of the RTC 60 and the contents of the signal line latch circuit 310 in the signal line change detection unit 300 are written in the second local memory 400 by the sequencer 200.

Details of the signal line change detecting section 300 will be described with reference to FIG.

Referring to FIG. 2, the signal line change detection unit 30
0 is composed of a signal line latch circuit 310, a comparison circuit 320, and a state holding register 330.

The signal line latch circuit 310 synchronizes with the CLOCK signal 302 and outputs the ER signal 42, the DR signal 43, and the RS signal.
The signal line states of the signal 44, the CS signal 45 and the CD signal 46 are latched and output to the comparison circuit 320.

The comparison circuit 320 includes the signal line latch circuit 31.
0 is constantly compared with the state holding register 330, and if there is a difference, the second interrupt signal 301 is output to the sequencer 200.

The state holding register 330 holds the state immediately before the signal line changes and outputs it to the comparison circuit 320. The sequencer 20 is the state before the signal line is changed.
Written by 0.

The operation of the first embodiment of the present invention will be described in detail with reference to FIGS.

FIG. 3 is a diagram showing a timing chart of the signal line change detecting section 300.

FIG. 4 is a diagram showing an operation flowchart of the sequencer 200.

First, referring to FIG. 1, the communication control device 10
The normal operation of will be described.

The entire operation of the communication control device 10 is a ROM
It is controlled by the CPU 20 based on the program stored in 30. Then, each time a preset trace event occurs, the URT 40 causes the CPU 20 to generate an interrupt signal (INT1) 41, and the CPU 20 records the trace information and its occurrence time in the first local memory 50, and communicates. The operation of the control device 10 itself is traced.

Next, the operation of the signal line change detector 300 will be described with reference to FIGS. 2 and 3.

The signal line latch circuit 310 synchronizes with the rising edge of the CLOCK signal 302, and the ER signal 42, the DR signal 43, the RS signal 44, the CS signal 45, and the CD signal 4.
Latch the state of 6.

At time t0, the ER signal 42 changes from "0" to "0".
When the signal line latch circuit 310 changes to 1 ″, the signal line latch circuit 310 changes to CLOC.
This change is detected and latched at the rising time t1 of the K signal 302, and the signal state "1" is set to the comparison circuit 32 at time t2.
Output to 0.

At this time, since the content of the state holding register 330 of the ER signal 42 is "0", the comparison circuit 320 outputs the interrupt signal (INT2) 301 to the sequencer 200.

Other signals (DR signal 43, RS signal 44,
CS signal 45. The operation when the CD signal 46) changes is the same.

As described above, the signal line change detection unit 300 generates the interrupt signal (INT2) 301 to the sequencer 200 each time the change in the line interface signal is detected.

Next, referring to FIG. 4, the sequencer 200
The operation of will be described.

The sequencer 200 includes a trace pointer indicating the trace storage area in the second local memory 400 and the signal line change detecting section 30 when the communication control device 10 is activated.
The state holding register 330 in 0 is initialized (step 41).

The interrupt signal (INT2) 301 from the signal line change detection unit 300 is monitored, and if there is an interrupt, the RTC 60
Is read (steps 42 to 43).

At the address of the second local memory 400 indicated by the current trace pointer, the time read from the RTC 60 and the contents of the signal line latch circuit 310 in the signal line change detection unit 300 are written (step 44).

The contents of the signal line latch circuit 310 are written in the state holding register 330, the trace pointer is advanced, and the state returns to the waiting state of the interrupt signal (INT2) 301 (steps 45 to 46).

In this way, the time when the signal line changes and the state at that time can always be recorded in the second local memory 400.

The second embodiment of the present invention will be described in detail with reference to the drawings.

FIG. 5 is a block diagram of the second embodiment of the present invention.

Referring to FIG. 5, the communication control device 11 of the present invention includes a CPU 20, a ROM 30, a URT 40,
First local memory 50, RTC 60, bus control unit 70, D / R 80, connector 90, sequencer 2
00, a signal line change detection unit 600, a second local memory 400, and a selection circuit 500.
The signal line change detection unit 3 is different from the communication control device 10 of FIG.
00 is replaced with the signal line change detection unit 600, and the selection circuit 50
It has a form in which 0 is added.

The selection circuit 500 includes an ER signal 42, a DR signal 43, an RS signal 44, a CS signal 45 and a CD signal 4.
6 is a switch group for selecting whether or not to connect each signal line 6 to the signal line change detection unit 600. A pull-down resistor is added to the input side of the signal line latch circuit so that the output side of the signal line latch circuit in the signal line change detection unit 600 does not become unstable even if the switch is turned off.

Like the signal line change detection unit 300, the signal line change detection unit 600 includes a signal line latch circuit, a comparison circuit, and a state holding register, and has the same function as the signal line change detection unit 300. In addition, the signal line latch circuit, the comparison circuit, and the state holding register are controlled so that only the signal line selected by the selection circuit 500 operates.

The operation of the second embodiment of the present invention will be described in detail with reference to the drawings.

For example, ER signal 42, DR signal 43, R
Of the five signal lines of S signal 44, CS signal 45, and CD signal 46, if it is desired to record only three signal line changes of RS signal 44, CS signal 45, and CD signal 46, this 3
A switch that connects the signal line of the book and the signal line change detection unit 600 is turned on.

The sequencer 200 includes the signal line change detection unit 6
The interrupt signal (INT2) 301 from 00 is monitored, and if there is an interrupt, the contents of the RTC 60 are read. The time read from the RTC 60 and the RS signal 44 and the CS signal 45 selected in the signal line latch circuit in the signal line change detection unit 600.
And the contents of the CD signal 46 are written to the address of the second local memory 400 indicated by the current trace pointer.

As described above, in the present embodiment, since the change of only the necessary signal line is recorded, the second local memory 4
The new effect is that the capacity of 00 can be saved.

[0066]

The first effect is that since the time change of the line signal is recorded in the communication control device, it is not necessary to disconnect the communication for a long time in order to connect various line monitors with the DCE or the like. Is to say.

The reason is that the connection of various line monitors becomes unnecessary by providing the signal line change detection function and the means for recording the signal state and the time when the signal line change is detected.

The second effect is that the time relationship between the trace information originally collected by the communication control device and the signal line change becomes clear, and the failure analysis becomes easy.

The reason is that the RTC originally built in the communication control device is used to record the signal line change time.

[Brief description of drawings]

FIG. 1 is a block diagram of a first embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a signal line change detection unit.

FIG. 3 is a timing chart of a signal line change detection unit.

[Figure 4] Flowchart of sequencer operation

FIG. 5 is a block diagram of a second embodiment of the present invention.

[Explanation of symbols]

10 Communication control device 11 Communication control device 20 CPU 30 ROM 40 URT 41 Interrupt signal (INT1) 42 ER signal 43 DR signal 44 RS signal 45 CS signal 46 CD signal 50 First local memory 60 RTC 70 Bus control unit 80 D / R 90 connector 200 sequencer 300 Signal line change detector 301 Interrupt signal (INT2) 302 CLOCK signal 310 signal line latch circuit 320 comparison circuit 330 Status holding register 400 Second local memory 500 selection circuit 600 Signal line change detector

Claims (4)

(57) [Claims] 1. A communication control device for controlling a line interface signal between a host device such as a central processing unit and a communication line, wherein the communication control device latches a state of the line interface signal.
Latch circuit, one state before the line interface signal
Holding register for holding state and signal line latch
Compare the circuit and the status holding register, and if there is a difference, interrupt
Signal having a comparison circuit for generating a signal to the sequencer
The line change detection unit and the line signal by the interrupt signal from the signal line change detection unit.
Interface signal content and the communication control device
Trace information consisting of the contents of the real-time clock
A trace method for a communication control device , comprising: a sequencer for writing in a memory; and a memory for storing the trace information . 2. The communication control device comprises a selection circuit for selecting the line interface signal.
That, trace form of the communication control apparatus according to claim 1, wherein a. 3. A host device such as a central processing unit and a communication line
Control device for controlling line interface signals between
The signal line latch circuit latches the state of the line interface signal, and the comparison circuit uses the line interface signal held by the state holding register.
The signal line latch circuit was latched with the state one before the signal.
The state of the line interface signal is compared, and if there is a difference, an interrupt signal is generated in the sequencer, and the sequencer receives the interrupt signal from the comparison circuit and the line interface
Content of the source signal and the real that the communication control device has
Trace information consisting of the contents of the time clock is stored in memory
A trace method for a communication control device, characterized in that the trace information is stored in a memory for writing . 4. The signal line latch circuit changes the state of the line interface signal selected by the selection circuit.
4. The communication control device according to claim 3, wherein
Method of tracing .