JP3276872B2 - Semiconductor device and method of manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing a semiconductor device, and more particularly, to a lateral high voltage MOSFE.
LOCOS (Local oxidation of silic) formed in T
on) The present invention relates to stabilization of the concentration of an impurity diffusion layer formed immediately below for improving withstand voltage.

[0002]

2. Description of the Related Art A conventional high-voltage lateral high-voltage MOS will be described below.
The FET will be described with reference to the drawings. FIG.
FIG. 1 is a cross-sectional view of a general lateral high-voltage MOSFET. The lateral high-voltage MOSFET includes a semiconductor substrate 1, a first well region 2 serving as a drain region on a surface layer of the substrate, and a first well region 2.
A diffusion region 3 (hereinafter referred to as a high-breakdown-voltage diffusion region 3) formed in the well region 2 and a high-concentration drain region 8 and a LOCOS formed on the high-breakdown-voltage diffusion region 3 are formed. Oxide film 5, high-concentration second well region 12 for forming a channel, and second well region 1
2, a high-concentration source region 7 formed in 2 and a P-type high-concentration region 13 for the back gate that connects the source region 7 in common;
It comprises a second well 12 and a gate electrode 6 formed on the LOCOS oxide film 5.

In this lateral high voltage MOSFET, as shown in FIG. 8, for example, a first well region 2 serving as a drain region is formed on a P-type semiconductor substrate 1 by diffusing an N-type impurity. A high breakdown voltage diffusion region 3 is formed by implanting and diffusing a P-type impurity such as boron (B +) into the surface layer. This high breakdown voltage diffusion region 3 is formed between the drain and the source,
In particular, the junction effect generated in the first well region 2 serving as the drain region improves the breakdown voltage between the drain and the source by directing the expansion of the depletion layer toward the inside. This is essential for a lateral high breakdown voltage MOSFET. Is a diffusion region.

A LOCOS oxide film 5 having a predetermined thickness is formed on the high-breakdown-voltage diffusion region 3 in order to improve the gate-drain breakdown voltage, and the semiconductor substrate 1 in a region where the LOCOS oxide film 5 is not formed is formed. A gate insulating film 4 made of an oxide film, a nitride film, or the like is formed thereon. A high concentration second well region 12 is formed adjacent to the first well region 2 to form a channel by diffusing a high concentration P-type impurity.
Is formed, and an N + -type impurity is diffused in the surface layer to form a high-concentration source region 7. Further, on the surface layer of the first well region 2 where the high breakdown voltage diffusion region 3 is not formed, an N + impurity is implanted and diffused to form a high concentration drain region 8.

Further, polysilicon is deposited on the second well region 12 from the gate insulating film 4 to the LOCOS oxide film 5 to form a channel and improve withstand voltage characteristics to form a gate electrode 6 and a withstand voltage electrode 6A. And an interlayer insulating film 9 is formed so as to cover them. An opening is formed in the interlayer insulating film 9 in a region where the source region 7 and the drain region 8 are formed, and a source electrode 10 and a drain electrode 11 made of aluminum or the like are formed in the opening. The withstand voltage electrode 6 </ b> A is electrically connected to the drain electrode 11. Although not shown, the high-breakdown-voltage diffusion region 3 is electrically connected to the source electrode 10 and has the same potential as the substrate 1. Further, in the source region 7, a P + high-concentration region 13 for a back gate for stabilizing a channel is formed.

In the above-mentioned lateral high-voltage MOSFET, how to improve the withstand voltage characteristics is being studied. In order to improve the breakdown voltage characteristics, as described above, L
Immediately below the OCOS oxide film 5, the high breakdown voltage diffusion region 3 is formed by, for example, P + type impurity diffusion. This high-breakdown-voltage diffusion region 3 is formed by the same heat treatment step as that for forming the LOCOS oxide film 5. The following describes the diffusion region 3 for high withstand voltage.
Will be described with reference to FIGS. 9 and 10. FIG.

First, as shown in FIG. 9, an oxide film A such as a silicon oxide film is formed on the surface of a P-type semiconductor substrate 1 having an N-type first well region 2 serving as a drain region formed in a surface layer. A photoresist PR is selectively formed in a predetermined region of the oxide film A. Using this photoresist PR as a mask,
For example, boron ions (B +) are accelerated at an acceleration voltage of 100 ke.
V is implanted under the conditions of a dose of 3 × 10 13 cm −2.

Next, as shown in FIG. 10, a silicon nitride film B is formed, and a predetermined region of the oxide film A and a LOCOS
An S oxide film 5 is formed. At this time, the previously implanted boron ions (B @ +) are diffused by the heat at the time of forming the LOCOS oxide film, and a high breakdown voltage diffusion region 3 having a predetermined concentration is formed immediately below the LOCOS oxide film 5. .

[0009]

As described above, since the high breakdown voltage diffusion region 3 is formed through the oxidation process of the LOCOS oxide film 5, the segregation coefficient of B + in the oxide film and the LOCOS oxide film are increased. 5, the impurity concentration of the high-breakdown-voltage diffusion region 3 becomes unstable and varies from place to place.

FIG. 11 shows a profile of the impurity concentration of boron ions in the high breakdown voltage diffusion region 3 formed under the above conventional conditions. At this time, the thickness of the LOCOS oxide film is 7,000 angstroms, and has a depth of about 3150 angstroms in the substrate. FIG. 11 is a concentration distribution diagram showing a concentration peak after impurity implantation. According to this, since the acceleration voltage is relatively low at 100 keV, boron ions do not enter too deeply during implantation and concentrate near the substrate surface. , A portion having the highest impurity concentration (hereinafter referred to as an impurity concentration peak) is formed in L
Due to the variation of the OCOS oxidation growth, it remains in the LOCOS oxide film. On the other hand, although not shown,
The above concentration peak may remain outside the LOCOS oxide film region depending on the variation of the oxide film. In other words, while the same type or the same process is used, the concentration of the high breakdown voltage diffusion region is set to LOC due to the variation of the LOCOS oxide film.
Absorbed in the OS oxide film and its concentration peak is LOCOS
It is formed in the oxide film.

Therefore, when the above-mentioned concentration peak remains in the LOCOS oxide film, the total amount of impurities remaining after the formation of the high-breakdown-voltage diffusion region 3 becomes the same as the area of the region shown by the hatched portion in FIG. As shown in FIG. 11, most of the impurities are absorbed in the LOCOS oxide film, so that the total amount of impurities in the high-breakdown-voltage diffusion region 3 itself is reduced. When the LOCOS oxide film 3 is formed, its variation (arrow) is about ± 350 angstroms to ± 700 angstroms in the depth direction, and it is difficult to control the film thickness. It is almost impossible to avoid thickness variations from place to place. Therefore, since the variation in the impurity concentration of the high-breakdown-voltage diffusion region is inevitable, the breakdown voltage of the lateral high-breakdown-voltage MOSFET cannot be scattered from place to place, and the breakdown voltage characteristics are made uniform, that is,
This has been a cause of hindering improvement in the breakdown voltage characteristics.

If the impurity concentration of the high-breakdown-voltage diffusion region 3 greatly varies, the top concentration of the first well region 2 serving as a drain region and the top concentration of the high-breakdown-voltage diffusion region 3 are deviated, and the junction region (P + Type diffusion region 3 for high withstand voltage and N
There is a possibility that the electric field in the first well region 2) of the mold is reduced, and the breakdown voltage characteristics are reduced despite the formation of the high breakdown voltage diffusion region 3.

FIGS. 12 to 14 show electric fields generated in the length direction when a predetermined voltage is applied between the drain and the source. In the figure, a point a is a junction surface between the P + type high breakdown voltage diffusion region 3 and the N type first well region 2;
A point is a P + type second well region 12 serving as a channel region.
A point c is an N + -type high-concentration drain region 8, and a point c is an N + -type high-concentration source region 7.
Is shown.

Since electric field concentration occurs at points a and b, which are junction surfaces, the electric field peaks at both points. P + at point a
When the top concentration of the high withstand voltage type diffusion region 3 and the N type first well region 2 are substantially the same, the electric field at the point a has a peak MAX (see FIG. 12). On the other hand, the peak value of the electric field at the point b is determined by the diffusion concentration of both the P + -type second well region 12 and the N-type first well region 2. The area of the hatched area surrounded by points a, b, c, and d is the effective guaranteed breakdown voltage.

As described above, if the diffusion concentration of the high-breakdown-voltage diffusion region 3 varies when the LOCOS oxide film 5 is formed, the high-breakdown-voltage diffusion region 3 and the first well region 2 serving as the drain region are not separated. Variations also occur in the top density difference. FIG. 13 shows the case where the top concentration of the high-breakdown-voltage diffusion region 3 is lower than that of the first well region 2, and FIG. 14 shows that the top concentration of the high-breakdown-voltage diffusion region 3 is higher than the top concentration of the first well region 2. 13 shows the distribution of the electric field when the height is increased. When the area of the shaded area in FIGS. 13 and 14 is compared with the area of the shaded area in FIG. 14, the area in FIG. 13 and FIG. Is narrowed, which indicates that the effective guaranteed withstand voltage value is lower than the effective withstand voltage value in FIG.

Therefore, if the concentration of the high-breakdown-voltage diffusion region 3 required for the lateral type high-breakdown-voltage MOSFET varies, it affects the electric-field distribution region, and if the variation remarkably appears, the breakdown voltage characteristics are reduced. There was found. Also,
Horizontal high withstand voltage M such that the guaranteed withstand voltage value is several hundred V or more
In the OSFET, the top concentration of impurities in the high breakdown voltage diffusion region 3 and the drain region 2 needs to be set low. For example, when the guaranteed withstand voltage value is 600 V, the top concentration of the high-breakdown-voltage diffusion region 3 and the drain region 2 is about 2 × 10 15 cm −2.

As described above, by setting the top concentration of the high withstand voltage diffusion region 3 and the drain region 2 to be low, it is possible to realize a high withstand voltage. However,
If the concentration of the high-breakdown-voltage diffusion region 3 is too low, a depletion layer formed around the high-breakdown-voltage diffusion region 3 and near the surface of the epitaxial layer may be formed as shown in FIG. (Inside) (arrow A), and despite the high and high withstand voltage structure, there is a problem that the electric field concentration occurs in this A portion and the withstand voltage is lowered, instead.

This phenomenon is caused by positive (+) fixed charges remaining in the silicon oxide film formed on the surface of the epitaxial layer, whereby holes in the peripheral portion of the low-concentration P-type high withstand voltage diffusion region 3 are pushed out. This is caused by making the peripheral portion reverse conductivity type, ie, N-type. The present invention has been made in view of the above circumstances, and
The impurity concentration of the high-breakdown-voltage diffusion region formed just below the OCOS oxide film to improve the breakdown voltage is not affected by the variation in the formation of the LOCOS oxide film, and the peripheral portion of the high-breakdown-voltage diffusion region having a low top concentration and the substrate Horizontal type high breakdown voltage MO with high breakdown voltage, preventing problems due to electric field concentration occurring near the surface
It is intended to provide an SFET.

[0019]

The present invention employs the following configuration and method in order to solve the above-mentioned problems. That is,
The semiconductor device of the present invention includes a semiconductor substrate of one conductivity type, a drain region of the opposite conductivity type formed on the semiconductor substrate, and a LOCOS oxide film formed on the surface of the drain region.
A one-conductivity-type high-withstand-voltage diffusion region having a predetermined width immediately below the LOCOS oxide film and suppressing the spread of a depletion layer formed in the drain region, and a reverse-conduction-type diffusion region formed in the drain region; A high-concentration drain region, a high-concentration channel region of one conductivity type forming a channel, and a high-concentration source region of the opposite conductivity type formed in the high-concentration channel region;
A gate electrode formed on the LOCOS oxide film and forming a channel in the high-concentration channel region; and the high-breakdown-voltage diffusion region is formed in a peripheral region of the LOCOS oxide film on the channel formation side of the drain region. It is characterized in that the impurity concentration of the high-breakdown-voltage diffusion region is higher than that of the central portion.

Here, a concentration peak of the one-conductivity-type high-breakdown-voltage diffusion region is set at a position deeper than the deepest interface region between the LOCOS oxide film and the drain region. The top concentration of the drain region is substantially the same as that of the drain region. Further, in the method of manufacturing a semiconductor device according to the present invention, a step of forming a drain region of a reverse conductivity type in a predetermined region of a semiconductor substrate of one conductivity type; and a method of forming a LOCO through an oxide film formed on the surface of the drain region.
Implanting a one-conductivity-type high-concentration impurity into a region where an S-oxide film is to be formed so as to have a concentration peak in a region deeper than a deepest interface region with the drain region when the LOCOS oxide film is formed; Forming a silicon nitride film selectively so as to expose the region into which the high-concentration impurity is implanted and to substantially coincide with or partially overlap a peripheral region on the channel side of the high-concentration impurity region. The process of
The oxide film formed on the high-concentration impurity region is thermally oxidized to form a LOCOS oxide film, and the high-concentration impurity is diffused so that the concentration in the peripheral region on the channel side is higher than the concentration in the central portion. Forming a high-breakdown-voltage diffusion region.

Here, the terminal side on the drain side of the silicon nitride film is formed outside the terminal side of the high concentration impurity region. As described above, in the high breakdown voltage diffusion region, the impurity concentration of the high breakdown voltage diffusion region in the peripheral region of the LOCOS oxide film on the channel formation side of the drain region is higher than the concentration of the central portion thereof. Accordingly, even when the top concentration of the high-breakdown-voltage diffusion region is reduced and the MOSFET has a high withstand voltage, electric field concentration occurring near the interface between the peripheral portion of the high-breakdown-voltage diffusion region and the substrate can be suppressed. .

A concentration peak after the implantation of one conductivity type impurity which is to be a diffusion region for high breakdown voltage of one conductivity type is set at a position deeper than the deepest interface region between the LOCOS oxide film and the drain region, In addition, by setting the top concentration of the diffusion region for high breakdown voltage and the drain region after diffusion to be substantially the same, the reduction or increase in the impurity concentration of the diffusion region for high breakdown voltage is remarkably reduced. It can be made uniform.

Also, silicon nitride is selectively exposed so as to expose the region into which the high-concentration impurity is implanted and substantially coincide with or partially overlap the peripheral region of the high-concentration impurity region on the channel side. A LOCOS oxide film is formed by thermally oxidizing the oxide film formed on the high-concentration impurity region to form a LOCOS oxide film. By forming a high breakdown voltage diffusion region having a concentration higher than the concentration, a high concentration region for suppressing electric field concentration occurring near the interface between the peripheral portion of the high breakdown voltage diffusion region and the substrate is formed simultaneously with the formation of the LOCOS oxide film. be able to.

[0024]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a semiconductor device according to an embodiment of the present invention and a method for manufacturing the same will be described. As shown in FIG. 1, a semiconductor device according to an embodiment of the present invention includes a semiconductor substrate 1 and a first region serving as a drain region in a surface layer of the substrate.
A well region 2, a diffusion region 3 formed in the first well region 2 for improving the breakdown voltage (hereinafter referred to as a high breakdown voltage diffusion region 3), and a high-concentration drain region 8.
High-concentration region 3 formed simultaneously with high-breakdown-voltage diffusion region 3 formed immediately below the channel-side peripheral region of LOCOS oxide film 5
A, a LOCOS oxide film 5 formed on the high-breakdown-voltage diffusion region 3, a high-concentration second well region 12 forming a channel, and a high-concentration source region formed in the second well region 12. P-type high-concentration common connection region 13 for commonly connecting the source region 7 and the source region 7, the second well 12 and the LOC
And a gate electrode 6 formed on the OS oxide film 5.

In this lateral high-voltage MOSFET, as shown in FIG. 1, for example, a first well region 2 serving as a drain region is formed on a P-type semiconductor substrate 1 by diffusing an N-type impurity. A high breakdown voltage diffusion region 3 is formed by implanting and diffusing a P-type impurity such as boron (B +) into the surface layer. This high breakdown voltage diffusion region 3 is formed between the drain and the source,
In particular, the junction effect generated in the first well region 2 serving as the drain region improves the breakdown voltage between the drain and the source by directing the expansion of the depletion layer toward the inside. This is essential for a lateral high breakdown voltage MOSFET. Is a diffusion region.

A LOCOS oxide film 5 having a predetermined thickness is formed on the high withstand voltage diffusion region 3 in order to improve the gate-drain withstand voltage, and the semiconductor substrate 1 in a region where the LOCOS oxide film 5 is not formed is formed. A gate insulating film 4 made of an oxide film, a nitride film, or the like is formed thereon. A high concentration second well region 12 is formed adjacent to the first well region 2 to form a channel by diffusing a high concentration P-type impurity.
Is formed, and an N + -type impurity is diffused in the surface layer to form a high-concentration source region 7. Further, on the surface layer of the first well region 2 where the high breakdown voltage diffusion region 3 is not formed, an N + impurity is implanted and diffused to form a high concentration drain region 8.

Further, polysilicon is deposited on the second well region 12 from the gate insulating film 4 to the LOCOS oxide film 5 to improve channel formation and breakdown voltage characteristics, thereby forming a gate electrode 6 and a breakdown voltage electrode 6A. And an interlayer insulating film 9 is formed so as to cover them. An opening is formed in the interlayer insulating film 9 in a region where the source region 7 and the drain region 8 are formed, and a source electrode 10 and a drain electrode 11 made of aluminum or the like are formed in the opening. The withstand voltage electrode 6 </ b> A is electrically connected to the drain electrode 11. Although not shown, the high-breakdown-voltage diffusion region 3 is electrically connected to the source electrode 10 and has the same potential as the substrate 1. Further, in the source region 7, a P + high-concentration region 13 for a back gate for stabilizing a channel is formed.

A feature of the present invention is that the concentration of the high-breakdown-voltage diffusion region 3 depends on the thickness variation caused when the LOCOS oxide film 5 is formed.
To improve the reduction and variation of the breakdown voltage characteristics caused by the decrease and increase of the concentration of GaN, and to suppress the electric field concentration generated near the interface between the peripheral region of the high breakdown voltage diffusion region 3 and the drain region by simultaneous formation with the LOCOS oxide film. Specifically, in the present invention, the concentration peak CP of the high breakdown voltage diffusion region 3 is set at a position deeper than the deepest interface region X between the LOCOS oxide film 5 and the drain region 8, and FIG. As shown, the top concentration of the high-breakdown-voltage diffusion region 3 and the drain region 2, and in this embodiment, the top concentration of the first well region 2 are set to be substantially the same, and the peripheral portion of the LOCOS oxide film 5 on the channel side (bird's beak) ) To form a high-concentration region 3 using a part of the high-breakdown-voltage diffusion region 3 simultaneously with the formation of the LOCOS oxide film.
A is formed.

Hereinafter, a method of forming the high-breakdown-voltage diffusion region 3 and the high-concentration region 3A will be described with reference to FIGS. First, as shown in FIG. 2, for example, an oxide film A such as a silicon oxide film is formed on the surface of a P-type semiconductor substrate 1 on which an N-type first well region 2 serving as a drain region of about 6 μm is formed in a surface layer. Further, a photoresist PR is formed on the oxide film A, and an opening X is formed in a region to be a high-breakdown-voltage diffusion region. Using this photoresist PR as a mask, for example, boron ions (B +) are formed. Implantation is performed to form an impurity region A to be a high breakdown voltage diffusion region.

This implantation of boron ions is performed at the deepest point between the LOCOS oxide film and the first well region 2 (drain region) in consideration of the variation in forming the LOCOS oxide film when the LOCOS oxide film is formed. Boron ions are implanted into the first well region 2 so as to have a concentration peak after impurity implantation in a region deeper than the interface region. What is important here is that impurities such as boron ions implanted into the first well region 2 are not only implanted deeply but also implanted.
The top concentration of the first well region 2 already formed by diffusion and the top concentration of boron after diffusion are adjusted so that the top concentrations of the two are substantially the same, taking into account the variation due to the variation at the time of forming the LOCOS oxide film. It is important to inject.

More specifically, for example, when the top concentration of the first well region 2 serving as the drain region is 5 × 10 12 cm −2, the acceleration voltage is about 150 to 220 keV, and the dose is 1.3.
By implanting into the first well 2 serving as the drain region under the condition of about 1.1.times.10@13 cm @ -2, the top concentrations of both after diffusion can be made substantially the same. If the impurity to be the high-breakdown-voltage diffusion region 3 is too deeply implanted, the top concentration of the high-breakdown-voltage diffusion region 3 becomes higher than the top concentration of the first well region 2, and a difference occurs between the top concentrations of the two regions. There is a risk of lowering.

Next, after removing the photoresist PR, as shown in FIG.
A silicon nitride film B is formed on silicon oxide film 4 to form an S oxide film. Further, a resist PR is formed on the silicon nitride film B, and the boron implanted region A previously implanted is formed.
The upper resist is removed, and thereafter, the exposed silicon nitride film B is removed, and the silicon oxide film 4 serving as a LOCOS oxide film is removed.
An opening Y for exposing is formed. Here, it is important that the opening end side YC of the silicon nitride film B on the channel side (source side) is, as shown in FIG.
Or slightly (approximately 0.5 μm) inward of the end side of the boron implantation region.
On the other hand, the opposite end side YD of the opening of the silicon nitride film on the drain side facing the opposite side is formed outside the end side of the boron implantation region A.

After forming the opening Y as described above in the silicon nitride film B, as shown in FIG. 4, a thickness of about 7000 is formed in a region exposed by the opening Y by the LOCOS technique.
An Angstrom LOCOS oxide film 5 is formed. At this time, the previously implanted boron ions (B +)
The high-voltage diffusion region 3 having a predetermined concentration of about 1.5 μm and having a predetermined concentration is formed immediately below the LOCOS oxide film 5 by being diffused by heat at the time of forming the COS oxide film.

As described above, since the terminal side YC of the opening of the silicon nitride film B on the channel side coincides with or overlaps with the terminal side of the boron implanted region A, the diffusion region 3 for the high withstand voltage is formed. In the channel side terminal side, the diffusion is spread in the same direction (lateral direction) by the above diffusion step, and the high breakdown voltage diffusion region 3 having a width of about 0.5 μm is formed immediately below the silicon nitride film B.
A will be formed. On the other hand, since the opening end side YD of the silicon nitride film B on the drain side is formed outside the end side of the boron implantation region, the terminal end of the high breakdown voltage diffusion region 3 on the drain side is formed by the silicon nitride film B. Does not spread to just below.

In the present embodiment, the boron ions (B +) are implanted by accelerating at an acceleration voltage that is about 1.5 times or more larger than that in the prior art, so that boron ions (B +) are implanted in the substrate. The range of the ions becomes longer, and boron ions are implanted deeper into the substrate 1 than before, and are concentrated deep inside the substrate 1 unlike the conventional case. In addition, the dose at the time of implantation is 1.3 × 10 13 cm −2, which is about half of the conventional dose.
It has become. From these facts, the profile of the boron ion concentration at this time is as shown in FIG.
The impurity concentration peak (CP) is lower than
Instead of appearing in the S oxide film 5, the diffusion region 3 for high withstand voltage
To reach.

Then, as shown in FIG. 5, most of the area indicated by the hatched area in FIG. 5 exists in a region deeper than the interface region of the LOCOS oxide film 5, and the film thickness after the LOCOS oxide film 3 is formed. However, the total amount of impurities in the high breakdown voltage diffusion region 3 is larger than the total amount of impurities according to the conventional method shown in FIG. As described above, even if there is a variation in the film thickness that occurs when the LOCOS oxide film 5 is formed, the impurity concentration peak CP that forms the high-breakdown-voltage diffusion region is deeper than the interface region of the LOCOS oxide film 5. Even if the LOCOS oxide film 5 varies in the depth direction, the impurity concentration of the high-breakdown-voltage diffusion region itself does not vary as compared with the conventional case.

Therefore, the top concentration of the high-breakdown-voltage diffusion region 3 can be set to a value close to the designed value, and the top concentration of the high-breakdown-voltage diffusion region 3 can be reduced to the first well which is the drain region of the present embodiment. LOCOS and the top density of region 2
As shown in FIG. 6, the top concentration of the high-breakdown-voltage diffusion region and the first well region serving as the drain region can be made substantially the same without being affected by the variation in the formation of the oxide film. As a result, the electric field strength at the junction surface between the high-breakdown-voltage diffusion region 3 and the first well region 2 serving as the drain region in the present embodiment becomes:
As shown in FIG. 12, the peak value can be set to MAX and an excellent lateral high withstand voltage MOSFET having excellent withstand voltage characteristics.
Can be provided.

As described above, the terminal side near the channel of the high-breakdown-voltage diffusion region 3 is diffused in the same direction (lateral direction) by the above-mentioned diffusion step, and has a width of approximately just below the silicon nitride film B. A diffusion region 3A for high withstand voltage of about 0.5 μm is formed. The high-breakdown-voltage diffusion region 3A at the end portion is L
Since it is formed so as to be located immediately below the bird's beak of the OCOS oxide film 5, as described above, it is not directly affected by the concentration decrease due to the variation of the LOCOS oxide film 5. A high-concentration region 3A is formed in which the concentration of the terminal portion of the high-breakdown-voltage diffusion region 3 on the channel side is higher than that of the other diffusion regions 3.

The high-concentration region 3A is formed between the peripheral portion on the channel side of the high-breakdown-voltage diffusion region 3 and the first well region (drain region) when the top concentration of the high-breakdown-voltage diffusion region 3 is reduced. It is possible to prevent the reverse conductivity type phenomenon occurring at the interface portion and to contribute to high breakdown voltage. On the other hand, as described above, the terminal side of the drain-side high-withstand-voltage diffusion region 3 has the channel end because the terminal side of the opening of the silicon nitride film B is formed outside the terminal side of the boron implantation region. Since the high-concentration region 3A such as the side is not formed, the withstand voltage characteristic does not decrease.

In the above-described embodiment, the acceleration voltage at the time of implantation is 150 to 220 keV, the dose at the time of implantation is 1.3 × 10 13 cm −2, and the acceleration voltage is about 1.
The dose at the time of implantation is about five times that of the conventional one, but the present invention is not limited to this, and the same applies if the implantation is performed under such conditions that the peak of the impurity concentration appears in the high withstand voltage diffusion region 3. It works.

In this embodiment, boron ions are implanted as impurities in the high-breakdown-voltage diffusion region 3. However, similar effects can be obtained with P-type impurities. Further, in the present embodiment, the drain region is used as the first well region 2. However, the present invention is not limited to this. Instead of the first well region as the drain region, as shown in FIG. Alternatively, it is possible to form an N-type epitaxial layer 2 on a P-type substrate 1 and use the epitaxial layer 2 as a drain region. It should be noted that the other figure numbers given in the same figure are regarded as the same as the above-mentioned figure numbers, and the description is omitted here.

Lastly, in the above-described embodiment, an N-channel lateral high withstand voltage MOSFET has been described. However, it is needless to say that the present invention can be similarly applied to a P-channel lateral high withstand voltage MOSFET.

[0043]

As described above, according to the semiconductor device of the present invention, the high breakdown voltage diffusion region is formed in the peripheral region of the LOCOS oxide film on the channel formation side of the drain region. By increasing the concentration to be higher than the concentration in the central portion, the top concentration of the high-breakdown-voltage diffusion region is reduced, and even if the MOSFET is designed to have a high withstand voltage, the peripheral portion of the high-breakdown-voltage diffusion region and the substrate are removed. The concentration of the electric field generated near the interface with the semiconductor device can be suppressed, and a semiconductor device with excellent withstand voltage characteristics can be provided.

According to the semiconductor device of the present invention, the LO
At a position deeper than the deepest interface region between the COS oxide film and the drain region, a concentration peak after impurity implantation of one conductivity type to be a diffusion region for high breakdown voltage of one conductivity type is set, and
By setting the top concentration of the diffusion region for high breakdown voltage and the drain region after diffusion to be approximately the same, the reduction or increase in the impurity concentration of the diffusion region for high breakdown voltage is significantly reduced, so that the breakdown voltage characteristics are made uniform. Can be done.

Further, according to the method of manufacturing a semiconductor device of the present invention, the region into which the high concentration impurity is implanted is exposed and substantially coincides with or partially coincides with the peripheral region on the channel side of the high concentration impurity region. Forming a LOCOS oxide film by thermally oxidizing the oxide film formed on the high-concentration impurity region to form a LOCOS oxide film and diffusing the high-concentration impurity to form a channel. By forming a high-breakdown-voltage diffusion region in which the concentration of the peripheral region on the side is higher than the concentration of the central portion, electric field concentration occurring near the interface between the periphery of the high-breakdown-voltage diffusion region and the substrate is reduced. The concentration region can be formed simultaneously with the formation of the LOCOS oxide film.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating a structure of a high breakdown voltage MOSFET according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view illustrating a step of forming a high breakdown voltage diffusion region of the high breakdown voltage MOSFET.

FIG. 3 is a cross-sectional view illustrating a step of forming a high breakdown voltage diffusion region of the high breakdown voltage MOSFET.

FIG. 4 is a cross-sectional view illustrating a step of forming a high breakdown voltage diffusion region of the high breakdown voltage MOSFET.

FIG. 5 is a view showing a profile of an impurity concentration after impurity implantation in a high breakdown voltage diffusion region according to the embodiment of the present invention.

FIG. 6 is a view showing an impurity concentration profile of a top concentration of a diffusion region for high breakdown voltage and a drain region after diffusion according to the embodiment of the present invention.

FIG. 7 is a sectional view illustrating the structure of a high-breakdown-voltage MOSFET according to another embodiment.

FIG. 8 is a cross-sectional view illustrating the structure of a conventional high breakdown voltage MOSFET.

FIG. 9 is a cross-sectional view illustrating a manufacturing process of a conventional high breakdown voltage MOSFET.

FIG. 10 is a cross-sectional view illustrating a manufacturing process of a conventional high breakdown voltage MOSFET.

FIG. 11 is a view showing a profile of impurity concentration after impurity implantation in a conventional high breakdown voltage diffusion region.

FIG. 12 is an electric field distribution diagram for explaining the present invention.

FIG. 13 is an electric field distribution diagram for explaining the present invention.

FIG. 14 is an electric field distribution diagram for explaining the present invention.

FIG. 15 is a diagram illustrating the invention.

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-6-53490 (JP, A) JP-A-8-23091 (JP, A) JP-A 8-18041 (JP, A) (58) Field (Int.Cl. ⁷ , DB name) H01L 29/78 H01L 21/336 H01L 21/761 H01L 21/8234 H01L 27/088

Claims (3)

(57) [Claims] A semiconductor substrate of one conductivity type; a drain region of opposite conductivity type formed on the semiconductor substrate; a LOCOS oxide film formed on a surface of the drain region;
A one-conductivity-type high-breakdown-voltage diffusion region having a predetermined width immediately below the OS oxide film and suppressing the spread of a depletion layer formed in the drain region; A high-concentration drain region, a high-concentration channel region of one conductivity type forming a channel, a high-concentration source region of opposite conductivity type formed in the high-concentration channel region, and the LOC.
A gate electrode formed on an OS oxide film to form a channel in the high-concentration channel region; and the high-breakdown-voltage diffusion region is provided on the channel formation side of the drain region.
In the peripheral region of the COS oxide film, the impurity concentration of the high breakdown voltage diffusion region is made higher than that of the central portion thereof,
A concentration peak of the one-conductivity-type high-breakdown-voltage diffusion region is set at a position deeper than the deepest interface region between the LOCOS oxide film and the drain region, and a top of the high-breakdown-voltage diffusion region and the drain region is formed. A semiconductor device characterized by having substantially the same concentration. 2. A method according to claim 1 , wherein a predetermined region of the semiconductor substrate of one conductivity type has a reverse conductivity.
Forming a drain region of a mold type; and forming an LO film through an oxide film formed on the surface of the drain region.
The LOCOS oxide film is formed in a region where a COS oxide film is to be formed.
Deepest interface region with the drain region when forming
One conductivity type high so as to have a concentration peak in a deeper region
Implanting a high concentration impurity, exposing the region into which the high concentration impurity has been implanted, and
Substantially with the peripheral region on the channel side of the high concentration impurity region
Selective silicon to match or partially overlap
Forming a nitrided film; and thermally etching the oxide film formed on the high-concentration impurity region.
To form a LOCOS oxide film,
Diffuses the pure substance and the concentration in the peripheral area on the channel side is
Forming a high-breakdown-voltage diffusion region with a higher concentration than that of the portion
Manufacturing a semiconductor device, comprising the steps of:
Method. 3. A terminal side on the drain side of the silicon nitride film.
Is formed outside the terminal side of the high concentration impurity region.
3. The method of manufacturing a semiconductor device according to claim 2, wherein :