JP3274971B2 - Wiring board - Google Patents

Wiring board

Info

Publication number
JP3274971B2
JP3274971B2 JP15579396A JP15579396A JP3274971B2 JP 3274971 B2 JP3274971 B2 JP 3274971B2 JP 15579396 A JP15579396 A JP 15579396A JP 15579396 A JP15579396 A JP 15579396A JP 3274971 B2 JP3274971 B2 JP 3274971B2
Authority
JP
Japan
Prior art keywords
plating
insulating
conductor
wiring
wiring conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP15579396A
Other languages
Japanese (ja)
Other versions
JPH104153A (en
Inventor
勝幸 竹内
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP15579396A priority Critical patent/JP3274971B2/en
Publication of JPH104153A publication Critical patent/JPH104153A/en
Application granted granted Critical
Publication of JP3274971B2 publication Critical patent/JP3274971B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/49105Connecting at different heights
    • H01L2224/49109Connecting at different heights outside the semiconductor or solid-state body

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、半導体素子を収容
するための半導体素子収納用パッケージや混成集積回路
基板等に用いられる配線基板に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board used for a package for housing a semiconductor element for housing a semiconductor element or a hybrid integrated circuit board.

【0002】[0002]

【従来技術】従来、配線基板、例えば半導体素子を収容
する半導体素子収納用パッケージに使用される配線基板
は、酸化アルミニウム質焼結体等のセラミックスより成
り、その上面中央部に半導体素子を収容するための凹部
を有する絶縁基体と、前記絶縁基体の凹部周辺から下面
にかけて導出されたタングステン、モリブデン等の高融
点金属粉末から成る配線導体とから構成されており、前
記絶縁基体の凹部底面に半導体素子をガラス、樹脂、ロ
ウ材等の接着剤を介して接着固定するとともに該半導体
素子の各電極を例えばボンディングワイヤ等の電気的接
続手段を介して配線導体に電気的に接続し、しかる後、
前記絶縁基体の上面に、金属やセラミックス等から成る
蓋体を絶縁基体の凹部を塞ぐようにしてガラス、樹脂、
ロウ材等の封止材を介して接合させ、絶縁基体の凹部内
に半導体素子を気密に収容することによって製品として
の半導体装置となり、配線導体で絶縁基体下面に導出し
た部位を外部の電気回路基板の配線導体に半田等の電気
的接続手段を介して接続することにより収容する半導体
素子が外部電気回路基板に電気的に接続されることとな
る。
2. Description of the Related Art Conventionally, a wiring board, for example, a wiring board used for a semiconductor element housing package for housing a semiconductor element is made of ceramics such as an aluminum oxide sintered body, and the semiconductor element is housed in the center of the upper surface thereof. And a wiring conductor made of a refractory metal powder such as tungsten or molybdenum which is led out from the periphery to the lower surface of the concave portion of the insulating substrate, and a semiconductor element is formed on the bottom surface of the concave portion of the insulating substrate. Glass, resin, adhesively fixed via an adhesive such as a brazing material, and electrically connecting each electrode of the semiconductor element to a wiring conductor through an electrical connection means such as a bonding wire, and thereafter,
On the upper surface of the insulating substrate, a cover made of a metal, ceramics, or the like, so as to cover a concave portion of the insulating substrate, glass, resin,
A semiconductor device as a product is obtained by joining the semiconductor element in a concave portion of the insulating base in an airtight manner by joining through a sealing material such as a brazing material. The semiconductor element to be accommodated is electrically connected to the external electric circuit board by connecting to the wiring conductor of the board via an electrical connection means such as solder.

【0003】この従来の配線基板は、セラミックグリー
ンシート積層法によって製作され、具体的には、酸化ア
ルミニウム、酸化珪素、酸化マグネシウム、酸化カルシ
ウム等のセラミック原料粉末に適当な有機バインダー、
溶剤等を添加混合して泥漿状となすとともにこれを従来
周知のドクターブレード法を採用してシート状とするこ
とによって複数のセラミックグリーンシートを得、しか
る後、前記セラミックグリーンシートに適当な打ち抜き
加工を施すとともに配線導体となる金属ペーストを所定
パターンに印刷塗布し、最後に前記セラミックグリーン
シートを所定の順に上下に積層して生セラミック成形体
となすとともに該生セラミック成形体を還元雰囲気中約
1600℃の高温で焼成することによって製作される。
しかしながら、この従来の配線基板は、絶縁基体を構
成する酸化アルミニウム質焼結体等のセラミックスが硬
くて脆い性質を有するため、搬送工程や半導体装置製作
の自動ライン等において配線基板同士が、あるいは配線
基板と半導体装置製作自動ラインの一部とが激しく衝突
すると絶縁基体に欠けや割れ、クラック等が発生し、そ
の結果、半導体素子を気密に収容することができず、半
導体素子を長期間にわたり正常、且つ安定に作動させる
ことができなくなるという欠点を有していた。
This conventional wiring board is manufactured by a ceramic green sheet laminating method. Specifically, an organic binder suitable for a ceramic raw material powder such as aluminum oxide, silicon oxide, magnesium oxide, calcium oxide, etc.
A plurality of ceramic green sheets are obtained by adding a solvent or the like to form a slurry and forming the sheet into a sheet shape by employing a conventionally known doctor blade method. Thereafter, a suitable punching process is performed on the ceramic green sheet. And a metal paste serving as a wiring conductor is printed and applied in a predetermined pattern. Finally, the ceramic green sheets are laminated vertically in a predetermined order to form a green ceramic molded body. It is manufactured by firing at a high temperature of ° C.
However, in this conventional wiring board, since the ceramics such as an aluminum oxide sintered body constituting the insulating base have a hard and brittle property, the wiring boards are not connected to each other in the transfer process or an automatic line for manufacturing semiconductor devices. If the substrate violently collides with a part of the semiconductor device manufacturing line, the insulating substrate may be chipped, cracked, cracked, etc. As a result, the semiconductor element cannot be housed in an airtight manner and the semiconductor element can be normally used for a long time. And it cannot be operated stably.

【0004】また、前記配線基板の製造方法によれば、
生セラミック成形体を焼成する際、生セラミック成形体
に不均一な焼成収縮が発生し、得られる配線基板に反り
等の変形や寸法のばらつきが発生し、その結果、半導体
素子と配線導体とを電気的に正確、且つ確実に接続する
ことが困難であるという欠点を有していた。
According to the method of manufacturing a wiring board,
When firing the green ceramic molded body, uneven firing shrinkage occurs in the green ceramic molded body, resulting in deformation and dimensional variation such as warpage of the obtained wiring board, and as a result, the semiconductor element and the wiring conductor are separated from each other. It has a drawback that it is difficult to electrically and accurately connect.

【0005】そこで、本願出願人は先に特願平6−26
3407において、配線基板の絶縁基体を、従来のセラ
ミックスに代えて無機絶縁物粉末を熱硬化性樹脂により
結合して成る材料で形成し、また該絶縁基体に被着され
た配線導体を、従来のタングステンやモリブデン等の高
融点金属メタライズに代えて銅等の金属粉末を熱硬化性
樹脂により結合して成る材料で形成した配線基板及びそ
の製造方法を提案した。
Accordingly, the applicant of the present application has previously filed Japanese Patent Application No.
In 3407, the insulating base of the wiring board is formed of a material obtained by bonding inorganic insulating powder with a thermosetting resin instead of the conventional ceramics, and the wiring conductor attached to the insulating base is formed of a conventional conductor. A wiring board formed of a material obtained by bonding a metal powder such as copper with a thermosetting resin instead of a metal having a high melting point such as tungsten or molybdenum, and a method of manufacturing the same have been proposed.

【0006】この無機絶縁物粉末を熱硬化性樹脂により
結合して成る絶縁基体に金属粉末を熱硬化性樹脂により
結合して成る配線導体が被着されて成る配線基板によれ
ば、絶縁基体となる無機絶縁物粉末及び配線導体となる
金属粉末を靭性に優れる熱硬化性樹脂により結合して成
ることから配線基板同士あるいは配線基板と半導体装置
製作自動ラインの一部とが激しく衝突しても絶縁基体に
欠けや割れ、クラック等が発生することは殆どない。
According to a wiring board in which a wiring conductor formed by bonding a metal powder with a thermosetting resin is adhered to an insulating base formed by bonding the inorganic insulating powder with a thermosetting resin, Insulation is achieved even if the wiring boards or the wiring board and a part of the automatic semiconductor device manufacturing line violently collide with each other because the inorganic insulating powder and the metal powder to be the wiring conductor are bonded by a thermosetting resin with excellent toughness. Chips, cracks, cracks, and the like hardly occur in the base.

【0007】更にこの無機絶縁物粉末を熱硬化性樹脂に
より結合して成る絶縁基板に金属粉末を熱硬化性樹脂に
より結合して成る配線導体が被着されて成る配線基板
は、例えば複数の絶縁基板が積層されて成る場合、先ず
熱硬化性樹脂前駆体と無機絶縁物粉末とを混合して成る
半硬化された前駆体シートを複数枚準備し、次に前記半
硬化された前駆体シートの各々に熱硬化性樹脂前駆体と
金属粉末とを混合して成る金属ペーストを必要に応じて
所定パターンに印刷塗布するとともにこれを加熱して前
記金属ペーストを半硬化させ、最後に前記前駆体シート
を上下に積層加圧するとともにこれを加熱して前記前駆
体シート及び金属ペーストを完全に熱硬化させることに
より製作され、前記前駆体シート及び金属ペーストを熱
硬化させることにより製作されることから、焼成に伴う
不均一な収縮による変形や寸法のばらつきが発生するこ
とはない。
Further, a wiring board in which a wiring conductor formed by bonding a metal powder with a thermosetting resin is adhered to an insulating substrate formed by bonding the inorganic insulating powder with a thermosetting resin, for example, comprises a plurality of insulating substrates. In the case where the substrates are laminated, first, a plurality of semi-cured precursor sheets prepared by mixing a thermosetting resin precursor and an inorganic insulating powder are prepared, and then the semi-cured precursor sheet is prepared. A metal paste obtained by mixing a thermosetting resin precursor and a metal powder in each is printed and applied in a predetermined pattern as necessary and heated to semi-harden the metal paste, and finally, the precursor sheet The precursor sheet and the metal paste are manufactured by completely laminating and pressing the precursor sheet and the metal paste and thermally curing the precursor sheet and the metal paste, and thermally curing the precursor sheet and the metal paste. From being produced, variation of deformation and dimensions due to non-uniform shrinkage due to sintering does not occur.

【0008】尚、この配線基板によると、配線導体は、
銅や銀、金等の金属粉末をエポキシ樹脂等の熱硬化性樹
脂により結合して成り、該配線導体に含有される熱硬化
性樹脂とボンディングワイヤ等の電気的接続手段とを直
接接合させることが不可であること及び該配線導体に含
有される金属粉末が銅や銀から成る場合、該銅や銀から
成る金属粉末が酸化し易いこと等から、配線導体とボン
ディングワイヤ等の電気的接続手段との接続を容易、且
つ強固なものとなすため及び配線導体に含有される金属
粉末が酸化腐蝕されるのを防止するために配線導体の表
面に金等の耐蝕性に優れ、且つボンディングワイヤ等の
電気的接続手段との接続性に優れる金属を電解めっき法
等のめっき法により被着させておくことが好ましい。
According to this wiring board, the wiring conductor is
A metal powder such as copper, silver, or gold is bonded by a thermosetting resin such as an epoxy resin, and the thermosetting resin contained in the wiring conductor is directly joined to an electrical connection means such as a bonding wire. Is not possible, and when the metal powder contained in the wiring conductor is made of copper or silver, the metal powder made of copper or silver is easily oxidized. In order to make the connection with the conductor easy and strong, and to prevent the metal powder contained in the wiring conductor from being oxidized and corroded, the surface of the wiring conductor is excellent in corrosion resistance of gold and the like, and the bonding wire and the like. It is preferable that a metal having excellent connectivity with the electrical connection means is applied by a plating method such as an electrolytic plating method.

【0009】前記配線基板の各配線導体に電解めっきに
よりめっき金属層を被着させるには、前記絶縁基板に予
め各配線導体の各々から絶縁基板の側面に導出するめっ
き用引出導体を配設するとともに該側面に前記各めっき
用引出導体を電気的に共通に接続するめっき用共通導体
を被着させておき、これを電解めっき装置のめっき浴に
浸漬するとともに前記めっき用共通導体に電解めっき装
置の陰極を電気的に接続して各配線導体にめっき用共通
電極及びめっき用引出電極を介して電解めっきのための
電荷を供給することによって各配線導体にめっき金属層
を被着させ、しかる後、前記めっき用共通導体を絶縁基
板側面から除去し、各配線導体を電気的に独立させる方
法を採用することが考えられる。
In order to apply a plating metal layer to each wiring conductor of the wiring board by electrolytic plating, a lead-out conductor for plating leading out from each of the wiring conductors to the side surface of the insulating substrate is provided on the insulating substrate in advance. At the same time, a common conductor for plating for electrically connecting the respective lead-out conductors for plating is commonly applied to the side surfaces, and the common conductor for plating is immersed in a plating bath of an electrolytic plating apparatus. Electrically connecting the cathodes of the above and supplying electric charges for electrolytic plating to the respective wiring conductors via the common electrode for plating and the lead-out electrode for plating, thereby depositing a plating metal layer on each of the wiring conductors. It is conceivable to adopt a method in which the common conductor for plating is removed from the side surface of the insulating substrate to make each wiring conductor electrically independent.

【0010】この場合、前記めっき用引出導体は、絶縁
基板となる前駆体シートに配線導体と成る金属ペースト
を所定パターンに印刷するのと同時に該金属ペーストと
同じ金属ペーストを配線導体となる金属ペーストのパタ
ーンから前駆体シートの縁端に導出するように印刷塗布
しておき、これを前記前駆体シート及び配線導体と成る
金属ペーストを硬化させるのと同時に硬化させることに
より各配線導体から絶縁基板縁端に導出するようにして
形成され、また前記めっき用共通電極は、前記配線導体
及びめっき用引出導体と成る金属ペーストと実質的に同
一の金属ペーストを絶縁基板となる前駆体シートの側面
あるいは硬化した絶縁基板の側面に印刷塗布するととも
にこれを熱硬化させることによって絶縁基板の側面に被
着される。
In this case, the lead-out conductor for plating is formed by printing a metal paste to be a wiring conductor on a precursor sheet to be an insulating substrate in a predetermined pattern, and simultaneously applying the same metal paste as the metal paste to the metal paste to be a wiring conductor. Is printed and applied so as to be led out to the edge of the precursor sheet from the pattern, and the precursor sheet and the metal paste serving as the wiring conductor are cured at the same time as the precursor is cured, so that the edge of the insulating substrate is separated from each wiring conductor. The common electrode for plating is formed so as to be led out to the end, and the common electrode for plating is substantially the same as the metal paste for forming the wiring conductor and the lead-out conductor for plating. It is applied to the side surface of the insulating substrate by printing and applying on the side surface of the insulating substrate thus formed, and by thermosetting this.

【0011】しかしながら、前記配線基板は、絶縁基板
が複数枚積層され、前記めっき用引出導体が絶縁基板と
絶縁基板との間に配設される場合、めっき用引出導体を
上下の絶縁基板中に完全に埋入させた状態で積層される
必要があり、さもなければ、積層された絶縁基板間に隙
間が形成され、内部に収容する半導体素子を気密に封止
することが不可となったり、あるいは大気中の水分が該
隙間に浸入して配線導体に腐食を発生させたりして、半
導体素子を長期間にわたり正常、且つ安定に作動させる
ことができなくなってしまうという欠点を誘発する。
However, when the wiring board is composed of a plurality of insulating substrates stacked and the lead-out conductor for plating is disposed between the insulating substrate and the insulating substrate, the lead-out conductor for plating is placed in the upper and lower insulating substrates. It is necessary to be laminated in a state of being completely embedded, otherwise, a gap is formed between the laminated insulating substrates, or it becomes impossible to hermetically seal the semiconductor element housed therein, Alternatively, a drawback is caused in that the moisture in the atmosphere enters the gap to cause corrosion of the wiring conductor, so that the semiconductor element cannot be operated normally and stably for a long period of time.

【0012】尚、前記絶縁基板同士を、絶縁基板間に配
設されためっき用引出導体を上下の絶縁基板中に完全に
埋入させた状態で積層するには、各絶縁基板となる前駆
体シートであってこれらに印刷塗布された金属ペースト
に接する部分を該前駆体シートを上下に積層加圧する際
の圧力によって金属ペーストの厚みに対応する分だけ圧
縮変形させ、これにより配線導体及びめっき用引出導体
となる金属ペーストを上下の前駆体シート中に完全に埋
入させるとともに、その状態で上下の前駆体シートを熱
硬化させる方法が採用される。
In order to laminate the insulating substrates with the lead-out conductors for plating disposed between the insulating substrates completely embedded in the upper and lower insulating substrates, it is necessary to form a precursor for each of the insulating substrates. The portions of the sheets that are in contact with the metal paste printed and applied thereto are compressed and deformed by an amount corresponding to the thickness of the metal paste by the pressure at the time of laminating and pressing the precursor sheet up and down, thereby forming a wiring conductor and plating. A method of completely embedding the metal paste to be the lead conductor in the upper and lower precursor sheets and thermally curing the upper and lower precursor sheets in that state is adopted.

【0013】[0013]

【発明が解決しようとする課題】しかしながら、近時の
半導体装置や混成集積回路基板等の小型高密度化に伴
い、これらに使用される配線基板は、その配線導体の配
線密度が大きなものとなるとともに積層される絶縁基板
の数も多数となってきており、このように配線導体の配
線密度が高くなるとともに積層される絶縁基板の数が多
くなると、各絶縁基板に被着形成された配線導体から絶
縁基板間をとおり絶縁基体側面に導出するめっき用引出
導体の数も多くなるとともに各絶縁基板間に配置される
ようになってきており、各絶縁基板の上下面に配設され
ためっき用引出導体が互いに上下に重なるような位置に
配設されたりする。
However, as semiconductor devices and hybrid integrated circuit boards have recently become smaller and denser, the wiring boards used in these devices have a higher wiring density of wiring conductors. With the increase in the wiring density of the wiring conductors and the increase in the number of the laminated insulating substrates as described above, the wiring conductors formed on the respective insulating substrates are increased. As the number of lead-out conductors for plating led out to the side of the insulating substrate from between the insulating substrates has increased, the number of lead-out conductors for plating has also been increased between the insulating substrates. For example, the lead conductors are arranged at positions where the lead conductors vertically overlap each other.

【0014】このため、この配線基板は、特に各絶縁基
板でその上下面に配設されためっき用引出導体が互いに
上下に重なる部分では、該絶縁基板となる前駆体シート
の同じ部分に上下のめっき用引出導体となる金属ペース
トを両方同時に埋入させるだけの圧縮変形を引き起こす
ことが必要となり、その結果、該部分が積層圧力により
十分に圧縮変形できず、積層された絶縁基板間に隙間が
形成されて内部に収容する半導体素子を長期間にわたり
正常、且つ安定に作動させることができないという欠点
を招来した。
For this reason, this wiring board is formed on the same portion of the precursor sheet as the insulating substrate, particularly in the portion where the lead-out conductors for plating arranged on the upper and lower surfaces of each insulating substrate overlap each other. It is necessary to cause compressive deformation enough to simultaneously embed both the metal pastes serving as the lead conductors for plating, and as a result, this portion cannot be sufficiently compressed and deformed by the laminating pressure, and a gap is formed between the laminated insulating substrates. The semiconductor element formed and accommodated therein cannot be normally and stably operated for a long period of time.

【0015】[0015]

【課題を解決するための手段】本発明の配線基板は、6
0乃至95重量%の無機絶縁物粉末を5乃至40重量%
の熱硬化性樹脂により結合した少なくとも3枚の絶縁基
板が上下に積層されて成る絶縁基体と、前記絶縁基板表
面に被着形成され、金属粉末を熱硬化性樹脂により結合
して成る複数の配線導体と、前記配線導体の表面に電解
めっき法により被着されためっき金属層と、前記各配線
導体から前記絶縁基板間を通り、前記絶縁基体側面に導
出するようにして配置されためっき用引出導体と、を有
する配線基板であって、前記めっき用引出導体は各絶縁
基板の上下両面において互いに上下に重ならない位置に
配置されていることを特徴とするものであり、前記メッ
キ用導体は、各絶縁基板の上下面において互いに上下に
重ならないように配置されていることから、絶縁基体に
積層不良が発生することはない。
According to the present invention, there is provided a wiring board comprising:
5 to 40% by weight of inorganic insulating powder of 0 to 95% by weight
An insulating base formed by vertically stacking at least three insulating substrates joined by a thermosetting resin; and a plurality of wirings formed by applying a metal powder by a thermosetting resin and formed on the surface of the insulating substrate. A conductor, a plating metal layer applied to the surface of the wiring conductor by an electrolytic plating method, and a plating drawer arranged to pass from the wiring conductor to the insulating substrate and to be led out to the side surface of the insulating substrate. A wiring board having a conductor, wherein the lead-out conductor for plating is arranged at a position not to vertically overlap each other on both upper and lower surfaces of each insulating substrate, and the conductor for plating is Since the upper and lower surfaces of the respective insulating substrates are arranged so as not to overlap each other vertically, lamination failure does not occur in the insulating base.

【0016】[0016]

【発明の実施の形態】次に、本発明を添付の図面に基づ
き、詳細に説明する。
Next, the present invention will be described in detail with reference to the accompanying drawings.

【0017】図1は、本発明の配線基板を半導体素子を
収容する半導体素子収納用パッケージに適用した場合の
一実施形態例を示し、1は絶縁基体、2は配線導体であ
る。
FIG. 1 shows an embodiment in which the wiring board of the present invention is applied to a package for housing a semiconductor element for housing a semiconductor element, wherein 1 is an insulating base, and 2 is a wiring conductor.

【0018】前記絶縁基体1は、例えば酸化珪素、酸化
アルミニウム、窒化アルミニウム、炭化珪素、チタン酸
バリウム、ゼオライト等の無機絶縁物粉末をエポキシ樹
脂、ポリイミド樹脂、ビスマレイミド樹脂、熱硬化性ポ
リフェニレンエーテル樹脂等の熱硬化樹脂により結合し
た材料から成る5枚の絶縁基板1a〜1eが積層されて
成るとともにその上面中央部に段状に凹む凹部Aを有し
ており、該凹部A底面には半導体素子3が樹脂等の接着
剤を介して接着固定される。
The insulating substrate 1 is made of an inorganic insulating powder such as silicon oxide, aluminum oxide, aluminum nitride, silicon carbide, barium titanate, zeolite, etc., made of epoxy resin, polyimide resin, bismaleimide resin, thermosetting polyphenylene ether resin. And five insulating substrates 1a to 1e made of a material bonded by a thermosetting resin, etc., and have a recess A which is recessed in a stepped shape at the center of the upper surface thereof. 3 is bonded and fixed via an adhesive such as a resin.

【0019】前記絶縁基体1は、凹部A底面に絶縁基板
1eの一部が、また凹部Aの各段上に絶縁基板1b〜1
dの一部がそれぞれ露出するようになっている。
The insulating base 1 has a portion of the insulating substrate 1e on the bottom surface of the concave portion A, and the insulating substrates 1b to 1
A part of d is exposed.

【0020】前記絶縁基体1a〜1eに含有される無機
絶縁物粉末は、その粒径が0.1〜100μm程度であ
り、絶縁基板1a〜1eの熱膨張係数を半導体素子3の
熱膨張係数に近いものとする作用を為すとともに絶縁基
板1a〜1eに良好な熱伝導性や耐水性、あるいは所定
の比誘電率等を付与する作用を為し、一方前記絶縁基体
1a〜1eに含有される熱硬化性樹脂は、前記無機絶縁
粉末同士を結合し、絶縁基体1を所定の形状に保持する
作用を為す。
The inorganic insulating powder contained in the insulating bases 1a to 1e has a particle size of about 0.1 to 100 μm, and the coefficient of thermal expansion of the insulating substrates 1a to 1e is reduced to the coefficient of thermal expansion of the semiconductor element 3. In addition to acting to make the insulating substrates 1a to 1e good thermal conductivity and water resistance, or to impart a predetermined relative dielectric constant, etc., the heat contained in the insulating bases 1a to 1e is obtained. The curable resin functions to bind the inorganic insulating powders together and hold the insulating base 1 in a predetermined shape.

【0021】また前記絶縁基板1a〜1eは、無機絶縁
物粉末を靭性に優れる熱硬化樹脂により結合して成るこ
とから、配線基板同士が衝突した際等に絶縁基体1に欠
けや割れ、クラック等が発生することは殆どない。
Since the insulating substrates 1a to 1e are formed by bonding inorganic insulating powder with a thermosetting resin having excellent toughness, the insulating substrate 1 may be chipped, broken, cracked or the like when the wiring substrates collide with each other. Hardly occurs.

【0022】尚、前記絶縁基板1a〜1eは、その中に
含有される無機絶縁物粉末の含有量が60重量%未満で
あると絶縁基体1の熱膨張係数が半導体素子3の熱膨張
係数と比較して極めて大きなものとなり、半導体素子3
が作動時に発生する熱が半導体素子3と絶縁基体1とに
印加されると両者の熱膨張係数の相違に起因して大きな
熱応力が発生し、半導体素子3に絶縁基体1からの剥離
や割れを発生させやすい傾向にあり、また無機絶縁物粉
末の含有量が95重量%を越えると無機絶縁物粉末を熱
硬化樹脂で強固に結合することが困難となる傾向にあ
る。従って、前記絶縁基板1a〜1eは、その中に含有
される無機絶縁物粉末の含有量が60乃至95重量%の
範囲に特定される。
If the content of the inorganic insulating powder contained in the insulating substrates 1a to 1e is less than 60% by weight, the thermal expansion coefficient of the insulating base 1 is lower than that of the semiconductor element 3. In comparison with the semiconductor device 3
When heat generated during the operation of the semiconductor element 3 is applied to the semiconductor element 3 and the insulating substrate 1, a large thermal stress is generated due to a difference in thermal expansion coefficient between the semiconductor element 3 and the insulating element 1. When the content of the inorganic insulating powder exceeds 95% by weight, it becomes difficult to firmly bond the inorganic insulating powder with a thermosetting resin. Therefore, the content of the inorganic insulating powder contained in the insulating substrates 1a to 1e is specified in the range of 60 to 95% by weight.

【0023】更に前記絶縁基板1a〜1eを積層してな
る絶縁基体1は、絶縁基板1a〜1eに含有される無機
絶縁物粉末が酸化珪素から成り、熱硬化性樹脂がエポキ
シ樹脂から成る場合、粒径が0.1〜100μm程度の
酸化珪素粉末にビスフェノールA型エポキシ樹脂、ノボ
ラック型エポキシ樹脂、グリシジルエステル型エポキシ
樹脂等のエポキシ樹脂及びアミン系硬化剤、イミダゾー
ル系硬化剤、酸無水物系硬化剤等の硬化剤等を添加混合
してペースト状となすとともにこれを従来周知のドクタ
ーブレード法を採用してシート状とすることにより絶縁
基板1a〜1eとなる半硬化状態の前駆体シートを得、
しかる後、前記絶縁基板1a〜1eとなる半硬化状態の
前駆体シートに適当な打ち抜き加工を施すとともにこれ
らを上下に積層して絶縁基体1となる半硬化状態の前駆
体シート積層体を得、最後に前記半硬化状態の前駆体シ
ート積層体を約80〜300℃の温度で約10秒〜24
時間加熱し完全に硬化させることによって製作される。
Further, the insulating substrate 1 formed by laminating the insulating substrates 1a to 1e is characterized in that the inorganic insulating powder contained in the insulating substrates 1a to 1e is made of silicon oxide and the thermosetting resin is made of epoxy resin. Epoxy resin such as bisphenol A type epoxy resin, novolak type epoxy resin, glycidyl ester type epoxy resin and amine type curing agent, imidazole type curing agent, acid anhydride type curing on silicon oxide powder with particle size of about 0.1-100 μm A curing agent such as an agent is added and mixed to form a paste, and this is formed into a sheet by employing a conventionally known doctor blade method, thereby obtaining a precursor sheet in a semi-cured state to become the insulating substrates 1a to 1e. ,
Thereafter, the precursor sheets in the semi-cured state to be the insulating substrates 1a to 1e are subjected to appropriate punching and stacked up and down to obtain a precursor sheet laminate in the semi-cured state to be the insulating substrate 1. Finally, the precursor sheet laminate in the semi-cured state is heated at a temperature of about 80 to 300 ° C. for about 10 seconds to 24 hours.
Manufactured by heating and curing completely for a period of time.

【0024】前記絶縁基体1は、またその凹部Aの各段
上に露出した絶縁基板1b〜1d上面から絶縁基板1b
〜1eを貫通して絶縁基板1e下面に導出する、例えば
銅、銀、金等の金属粉末をエポキシ樹脂等の熱硬化性樹
脂により結合した多数の配線導体2が被着形成されてい
る。
The insulating substrate 1 is further provided on the insulating substrate 1b from the upper surface of the insulating substrate 1b to 1d exposed on each step of the concave portion A.
A large number of wiring conductors 2 penetrating through to 1e and leading out to the lower surface of the insulating substrate 1e are formed by bonding metal powder of, for example, copper, silver, gold or the like with a thermosetting resin such as an epoxy resin.

【0025】前記配線導体2は、内部に収容する半導体
素子3を外部電気回路に電気的に接続する作用を為し、
その凹部Aの各段上部位には半導体素子3の各電極がボ
ンディングワイヤ4を介して電気的に接続され、またそ
の絶縁基体1下面に導出する部位は外部電気回路基板に
電気的に接続される。
The wiring conductor 2 serves to electrically connect the semiconductor element 3 housed therein to an external electric circuit.
Each electrode of the semiconductor element 3 is electrically connected to each upper portion of the recess A through a bonding wire 4, and a portion extending to the lower surface of the insulating base 1 is electrically connected to an external electric circuit board. You.

【0026】前記配線導体2に含有される金属粉末は、
配線導体2に導電性を付与する作用を為し、配線導体2
における含有量が70重量%未満では配線導体2の導電
性が悪くなる傾向にあり、また配線導体2における含有
量が95重量%を越えると金属粉末を熱硬化性樹脂で強
固に結合することが困難となる傾向にある。従って、前
記配線導体2に含有される金属粉末は、配線導体2にお
ける含有量が70乃至95重量%の範囲が好ましい。
The metal powder contained in the wiring conductor 2 is as follows:
The wiring conductor 2 acts to impart conductivity to the wiring conductor 2.
If the content in the wiring conductor 2 is less than 70% by weight, the conductivity of the wiring conductor 2 tends to be deteriorated. If the content in the wiring conductor 2 exceeds 95% by weight, the metal powder may be strongly bonded with the thermosetting resin. It tends to be difficult. Therefore, the content of the metal powder contained in the wiring conductor 2 in the wiring conductor 2 is preferably in the range of 70 to 95% by weight.

【0027】尚、前記配線導体2に含有される金属粉末
は、その平均粒径が0.5μm未満であると金属粉末同
士の接触抵抗が増加して配線導体2の電気抵抗が高いも
のとなる傾向にあり、また50μmを越えると絶縁基体
1に所定パターンの配線導体2を一般に要求される50
乃至200μmの線幅に形成するのが困難となる傾向に
ある。従って、前記配線導体2に含有される金属粉末
は、その平均粒径を0.5乃至50μmとしておくこと
が好ましい。
If the average particle size of the metal powder contained in the wiring conductor 2 is less than 0.5 μm, the contact resistance between the metal powders increases and the electric resistance of the wiring conductor 2 becomes high. When the thickness exceeds 50 μm, the wiring conductor 2 having a predetermined pattern is generally required on the insulating substrate 1.
It tends to be difficult to form a line width of about 200 μm to 200 μm. Therefore, it is preferable that the metal powder contained in the wiring conductor 2 has an average particle size of 0.5 to 50 μm.

【0028】また、前記配線導体2に含有される熱硬化
性樹脂は、前記金属粉末同士を互いに接触させた状態で
結合させるとともに配線導体2を絶縁基体1に被着させ
る作用を為し、ビスフェノールA型エポキシ樹脂、ノボ
ラック型エポキシ樹脂、グリシジルエステル型エポキシ
樹脂等のエポキシ樹脂や、フェノール樹脂、ポリイミド
樹脂、ビスマレイミド樹脂、熱硬化性ポリフェニレンエ
ーテル樹脂等の熱硬化性樹脂から成る。
The thermosetting resin contained in the wiring conductor 2 functions to bond the metal powders in contact with each other and to attach the wiring conductor 2 to the insulating base 1, and to provide bisphenol. It is made of an epoxy resin such as an A-type epoxy resin, a novolak-type epoxy resin, and a glycidyl ester-type epoxy resin, and a thermosetting resin such as a phenol resin, a polyimide resin, a bismaleimide resin, and a thermosetting polyphenylene ether resin.

【0029】前記熱硬化性樹脂は、配線導体2における
含有量が5重量%未満では金属粉末同士を強固に結合で
きないとともに配線導体2を絶縁基体1に強固に被着さ
せることが困難となり、また配線導体2における含有量
が30重量%を越えると金属粉末同士を十分に接触させ
ることが困難となり、配線導体2の電気抵抗が大きなも
のとなる傾向にある。従って、前記配線導体2に含有さ
れる熱硬化性樹脂は、配線導体2における含有量が5乃
至30重量%の範囲が好ましい。
If the content of the thermosetting resin in the wiring conductor 2 is less than 5% by weight, the metal powder cannot be firmly bonded to each other, and it becomes difficult to firmly adhere the wiring conductor 2 to the insulating base 1. When the content in the wiring conductor 2 exceeds 30% by weight, it is difficult to bring the metal powders into sufficient contact with each other, and the electric resistance of the wiring conductor 2 tends to be large. Therefore, the content of the thermosetting resin contained in the wiring conductor 2 in the wiring conductor 2 is preferably in the range of 5 to 30% by weight.

【0030】前記配線導体2は、例えばこれに含有され
る金属粉末と熱硬化性樹脂とがそれぞれ銅とエポキシ樹
脂とから成る場合、粒径が0.1〜20μm程度の銅等
粉末にビスフェノールA型エポキシ樹脂、ノボラック型
エポキシ樹脂、グリシジルエステル型エポキシ樹脂等の
エポキシ樹脂及びアミン系硬化剤、イミダゾール系硬化
剤、酸無水物系硬化剤等の硬化剤等を添加混合してなる
金属ペーストを絶縁基板1b〜1eとなる半硬化の前駆
体シートに従来周知のスクリーン印刷法を採用して所定
厚み所定パターンに印刷塗布しておき、これを前記半硬
化した前駆体シート積層体とともに熱硬化させることに
より絶縁基体1の凹部A各段上から絶縁基体1下面に導
出するようにして被着形成される。
For example, when the metal powder and the thermosetting resin contained in the wiring conductor 2 are made of copper and epoxy resin, respectively, the powder of copper or the like having a particle size of about 0.1 to 20 μm is added to bisphenol A. Epoxy resin, novolak type epoxy resin, glycidyl ester type epoxy resin and other epoxy resin and amine paste curing agent, imidazole curing agent, acid anhydride curing agent, etc. The semi-cured precursor sheet to be the substrates 1b to 1e is printed and applied in a predetermined pattern with a predetermined thickness by using a conventionally well-known screen printing method, and is thermally cured together with the semi-cured precursor sheet laminate. Thereby, it is adhered and formed so as to be led out from above each step of the concave portion A of the insulating base 1 to the lower surface of the insulating base 1.

【0031】また、前記配線導体2は、その露出する表
面にニッケル及び金から成るめっき金属層5が従来周知
の電解めっき法を採用して所定厚みに被着されており、
これにより配線導体2が酸化腐食することが有効に防止
されるとともに配線導体2とボンディングワイヤ4及び
外部電気回路基板の配線導体との接続を容易、且つ強固
に行うことができるようになっている。
The wiring conductor 2 is provided with a plating metal layer 5 made of nickel and gold on an exposed surface to a predetermined thickness by employing a conventionally known electrolytic plating method.
This effectively prevents the wiring conductor 2 from being oxidized and corroded, and makes it possible to easily and firmly connect the wiring conductor 2 to the bonding wires 4 and the wiring conductor of the external electric circuit board. .

【0032】尚、前記配線導体2に被着されためっき金
属層5は、従来周知の電解めっき装置のめっき浴内に絶
縁基体1を浸漬するとともに該絶縁基体1に被着形成さ
れた各配線導体2に後述するめっき用引出導体6を介し
て電解めっきのための電荷を供給することによって配線
導体2の露出表面に被着され、通常、1〜15μm程度
のニッケルめっき層と0.5〜5μm程度の金めっき層
とを順次被着させて成り、ニッケルめっき層が下地めっ
き層として、金めっき層が仕上げめっき層として作用す
る。
The plating metal layer 5 applied to the wiring conductor 2 is immersed in a plating bath of a conventionally well-known electrolytic plating apparatus, and the wiring metal adhered to the insulating substrate 1 is formed. The conductor 2 is applied to the exposed surface of the wiring conductor 2 by supplying a charge for electrolytic plating via a lead-out conductor 6 for plating, which will be described later. A gold plating layer having a thickness of about 5 μm is sequentially applied. The nickel plating layer functions as a base plating layer, and the gold plating layer functions as a finish plating layer.

【0033】更に、前記絶縁基体1には、各絶縁基板1
b〜1dに被着形成された配線導体2からそれぞれ絶縁
基板1aと1bとの間、1bと1cとの間、1cと1d
との間を通って絶縁基体1側面に導出する多数のめっき
用引出導体6が配設されている。
Further, each of the insulating substrates 1 is
b to 1d, between the insulating substrates 1a and 1b, between 1b and 1c, 1c and 1d, respectively.
And a large number of lead-out conductors 6 for plating that are led out to the side surface of the insulating base 1 through the space between them.

【0034】前記めっき用引出導体6は、各配線導体2
に絶縁基体1側面から電解めっきのための電荷を印加す
るための導電路として作用し、前述のように絶縁基体1
を電解めっき装置のめっき浴内に浸漬するとともに該め
っき用引出導体6を介して各配線導体2に電解めっきの
ための電荷を供給することにより各配線導体2の露出表
面にめっき金属層5が被着形成される。
The lead-out conductor 6 for plating is formed by
Acts as a conductive path for applying a charge for electrolytic plating from the side surface of the insulating base 1, as described above.
Is immersed in a plating bath of an electrolytic plating apparatus, and a charge for electrolytic plating is supplied to each wiring conductor 2 via the lead-out conductor 6 for plating, so that a plating metal layer 5 is formed on an exposed surface of each wiring conductor 2. Is formed.

【0035】前記めっき用引出導体6は、前記配線導体
2と同様の材料により形成されており、配線導体2と成
る金属ペーストと同様の金属ペーストを絶縁基板1b〜
1dとなる半硬化の前駆体シートに、前記配線導体2と
成る金属ペーストを印刷するのと同時に印刷塗布し、こ
れを絶縁基体1となる前駆体シート積層体とともに熱硬
化させることによって絶縁基体1内に各配線導体2から
それぞれ絶縁基板1aと1bとの間、1bと1cとの
間、1cと1dとの間をとおって絶縁基体1側面に導出
するようにして配設される。
The lead-out conductor 6 for plating is made of the same material as that of the wiring conductor 2, and the same metal paste as the metal paste forming the wiring conductor 2 is applied to the insulating substrates 1 b-1.
On the semi-cured precursor sheet 1d, the metal paste for the wiring conductor 2 is printed and applied at the same time as the metal paste is printed, and this is thermally cured together with the precursor sheet laminate for the insulating substrate 1 to form the insulating substrate 1 It is disposed so as to be led out to the side surface of the insulating base 1 from each wiring conductor 2 through the space between the insulating substrates 1a and 1b, between 1b and 1c, and between 1c and 1d.

【0036】前記めっき用引出導体6は、図2に示すよ
うに絶縁基板1bの上下面及び1cの上下面において、
それぞれ互いに上下に重ならない位置に配設されてい
る。
As shown in FIG. 2, the lead-out conductor 6 for plating is formed on the upper and lower surfaces of the insulating substrate 1b and the upper and lower surfaces of 1c.
They are arranged at positions that do not overlap each other.

【0037】前記配線基板は、めっき用引出導体6が絶
縁基板1bの上下面及び1cの上下面において、それぞ
れ互いに上下に重ならない位置に配設されていることか
ら、絶縁基体1となる前駆体シートを互いに上下に積層
する際、各前駆体シートの同一部分にめっき用引出導体
6となる金属ペーストが上下から同時に埋入されること
はなく、従って、絶縁基体1となる各前駆体シートを積
層加圧の圧力により十分に圧縮変形させて、前記金属ペ
ーストを該各前駆体シートに完全に埋入させることがで
き、その結果、各絶縁基板1a〜1eが各絶縁層1a〜
1e間に隙間を発生させることなく気密に積層され、内
部に収容する半導体素子3を長期間にわたり正常、且つ
安定に作動させることができる。
In the wiring board, since the lead-out conductors 6 for plating are arranged on the upper and lower surfaces of the insulating substrate 1b and the upper and lower surfaces of the insulating substrate 1b so as not to be vertically overlapped with each other, the precursor to be the insulating base 1 is formed. When the sheets are stacked one on top of the other, the metal paste that becomes the lead-out conductor 6 for plating is not simultaneously buried from above and below in the same part of each precursor sheet. The metal paste can be completely compressed and deformed by the pressure of the laminating pressure to completely embed the metal paste in each of the precursor sheets. As a result, each of the insulating substrates 1a to 1e becomes
The semiconductor elements 3 are air-tightly stacked without generating a gap between 1e, and the semiconductor elements 3 housed therein can operate normally and stably for a long period of time.

【0038】尚、前記めっき用引出導体6を介して各配
線導体2に電解めっきのための電荷を印加するには、図
3(a)に示すように、絶縁基体1の側面に前記めっき
用引出導体6を電気的に共通に接続するめっき用共通導
体7を被着させておくとともに該めっき用共通導体7を
電解めっき装置の陰極に接触させることによりめっき用
共通導体7及びめっき用引出導体6を介して各配線導体
2に電解めっきのための電荷を印加する方法が採用さ
れ、前記絶縁基体1の側面に被着させためっき用共通導
体7は、各配線導体2の露出表面にめっき金属層5が被
着された後、例えば機械的研磨方法や機械的切断方法等
により絶縁基体1の一部とともに除去され、これにより
図1に示すような各配線導体2が電気的に独立させられ
た配線基板が完成する。
In order to apply a charge for electrolytic plating to each wiring conductor 2 via the lead-out conductor 6 for plating, as shown in FIG. A common conductor for plating 7 that electrically connects the lead conductors 6 in common is adhered thereto, and the common conductor for plating 7 is brought into contact with a cathode of an electrolytic plating apparatus to thereby form a common conductor for plating 7 and a lead conductor for plating. 6, a method of applying a charge for electrolytic plating to each wiring conductor 2 through the wiring conductor 6 is adopted, and the plating common conductor 7 attached to the side surface of the insulating base 1 is plated on the exposed surface of each wiring conductor 2. After the metal layer 5 is applied, the metal layer 5 is removed together with a part of the insulating base 1 by, for example, a mechanical polishing method or a mechanical cutting method, so that each wiring conductor 2 as shown in FIG. Completed wiring board .

【0039】かくして本発明の配線基板によれば、絶縁
基体1の凹部A底面に半導体素子3を接着固定するとと
もに半導体素子3の各電極をボンディングワイヤ4を介
して配線導体2に電気的に接続し、最後に前記絶縁基体
1の上面に蓋体8を封止材を介して接合させることによ
り製品としての半導体装置となる。
Thus, according to the wiring board of the present invention, the semiconductor element 3 is bonded and fixed to the bottom surface of the recess A of the insulating base 1 and each electrode of the semiconductor element 3 is electrically connected to the wiring conductor 2 via the bonding wire 4. Finally, the lid 8 is joined to the upper surface of the insulating base 1 via a sealing material, thereby obtaining a semiconductor device as a product.

【0040】尚、本発明は上述の実施の形態に限定され
るものではなく、本発明の要旨を逸脱しない範囲であれ
ば、種々の変更は可能であり、例えば上述の実施の形態
においては本発明の配線基板を半導体素子を収容する半
導体素子収納用パッケージに適用した場合を例にとって
説明したが、これを混成集積回路基板等に用いられる配
線基板に適用してもよい。
It should be noted that the present invention is not limited to the above-described embodiment, and various changes can be made without departing from the gist of the present invention. Although the case where the wiring board of the present invention is applied to a package for housing a semiconductor element for housing a semiconductor element has been described as an example, this may be applied to a wiring board used for a hybrid integrated circuit board or the like.

【0041】また、上述の実施の形態では、配線基板は
五枚の絶縁基板が積層されることにより形成されていた
が、配線基板は三枚や四枚、あるいは六枚以上の絶縁基
板が積層されることにより形成されていてもよい。
In the above-described embodiment, the wiring substrate is formed by laminating five insulating substrates. However, the wiring substrate is formed by laminating three, four, or six or more insulating substrates. It may be formed by performing.

【0042】更に、上述の実施例では配線導体及びめっ
き用引出導体は、金属粉末を熱硬化性樹脂で結合するこ
とによって形成されていたが、金属粉末を半田等の低融
点金属及び熱硬化性樹脂により結合することにより形成
されていても良い。この場合、配線導体及びめっき用引
出導体となる金属ペースト中に半田等の低融点金属を適
宜量含有させておき、該配線導体及びめっき用引出導体
となる金属ペーストを熱硬化させる前、あるいは熱硬化
させるのと同時に金属ペーストに含有された低融点金属
を熔融させることによって金属粉末を低融点金属により
結合する方法が採用され得る。
Further, in the above-described embodiment, the wiring conductor and the lead-out conductor for plating are formed by bonding metal powder with a thermosetting resin. It may be formed by bonding with a resin. In this case, an appropriate amount of a low-melting metal such as solder is contained in the metal paste to be the wiring conductor and the lead for plating, and the metal paste to be the wiring conductor and the lead for plating is thermally cured or heated. A method of bonding the metal powder with the low melting point metal by melting the low melting point metal contained in the metal paste at the same time as the curing is performed.

【0043】[0043]

【発明の効果】本発明の配線基板によれば、絶縁基体が
無機絶縁物粉末を靱性に優れる熱硬化樹脂により結合す
ることによって形成されていることから配線基板同士あ
るいは配線基板と半導体装置製作ラインの一部とが激し
く衝突しても絶縁基体に欠けや割れ、クラックが発生す
ることはない。
According to the wiring board of the present invention, since the insulating base is formed by bonding the inorganic insulating powder with the thermosetting resin having excellent toughness, the wiring boards are connected to each other or the wiring board and the semiconductor device manufacturing line. Even when a part of the insulating substrate collides violently, the insulating substrate is not chipped, broken or cracked.

【0044】また、本発明の配線基板によれば、めっき
用引出導体が絶縁基体を構成する各絶縁基板の上下面に
おいて互いに上下に重ならないように配置されているこ
とから、絶縁基体となる前駆体シートを互いに上下に積
層する際、各前駆体シートの同一部分にめっき用引出導
体となる金属ペーストが上下から同時に埋入されること
はなく、従って、絶縁基体となる各前駆体シートを積層
加圧の圧力により十分に圧縮変形させて、前記金属ペー
ストを該各前駆体シートに完全に埋入させることがで
き、その結果、各絶縁基板がこれらの間に隙間を発生さ
せることなく気密に積層され、内部に収容する半導体素
子を長期間にわたり正常、且つ安定に作動させることが
できる。
Further, according to the wiring board of the present invention, since the lead-out conductors for plating are arranged so as not to vertically overlap each other on the upper and lower surfaces of each of the insulating substrates constituting the insulating base, the lead to be the insulating base is formed. When the body sheets are stacked on top of each other, the metal paste to be the lead conductor for plating is not simultaneously embedded from the top and bottom in the same portion of each precursor sheet, and therefore, the precursor sheets to be the insulating base are stacked. The metal paste can be fully compressed and deformed by the pressure of the pressurization, and the metal paste can be completely embedded in each of the precursor sheets. As a result, each of the insulating substrates can be hermetically sealed without generating a gap therebetween. The semiconductor elements stacked and housed therein can operate normally and stably for a long period of time.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の配線基板を半導体素子収納用パッケー
ジに適用した場合の一実施形態例を示す断面図である。
FIG. 1 is a cross-sectional view showing an embodiment in which a wiring board of the present invention is applied to a package for housing a semiconductor element.

【図2】図1に示した半導体素子収納用パッケージの絶
縁基体の側面図である。
FIG. 2 is a side view of an insulating base of the package for housing a semiconductor element shown in FIG. 1;

【図3】(a)(b)は、本発明の配線基板の配線導体
にめっき金属層を被着させる方法を説明するための工程
毎の断面図である。
FIGS. 3A and 3B are cross-sectional views for each process for explaining a method of applying a plating metal layer to a wiring conductor of a wiring board according to the present invention.

【符号の説明】[Explanation of symbols]

1・・・・・・絶縁基体 1a〜1e・・絶縁基板 2・・・・・・配線導体 3・・・・・・半導体素子 5・・・・・・めっき金属層 6・・・・・・めっき用引出導体 DESCRIPTION OF SYMBOLS 1 ... Insulating base 1a-1e ... Insulating board 2 ... Wiring conductor 3 ... Semiconductor element 5 ... Plating metal layer 6 ...・ Lead conductor for plating

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】60乃至95重量%の無機絶縁物粉末を5
乃至40重量%の熱硬化性樹脂により結合した少なくと
も3枚の絶縁基板が上下に積層されて成る絶縁基体と、
前記絶縁基板表面に被着形成され、金属粉末を熱硬化性
樹脂により結合して成る複数の配線導体と、前記配線導
体の表面に電解めっき法により被着されためっき金属層
と、前記各配線導体から前記絶縁基板間を通り、前記絶
縁基体側面に導出するように配置されためっき用引出導
体と、を有する配線基板であって、前記めっき用引出導
体は各絶縁基板の上下両面において互いに上下に重なら
ない位置に配置されていることを特徴とする配線基板。
1. An inorganic insulating powder of 60 to 95% by weight is mixed with 5
An insulating base formed by vertically stacking at least three insulating substrates joined by a thermosetting resin of about 40% by weight;
A plurality of wiring conductors formed on the surface of the insulating substrate by bonding a metal powder with a thermosetting resin; a plating metal layer formed on the surface of the wiring conductor by an electrolytic plating method; And a lead-out conductor for plating disposed so as to pass from the conductor to between the insulating substrates and to be led out to the side surface of the insulating base, wherein the lead-out conductors for plating are vertically arranged on both upper and lower surfaces of each insulating substrate. A wiring board, wherein the wiring board is arranged so as not to overlap with the wiring board.
JP15579396A 1996-06-17 1996-06-17 Wiring board Expired - Fee Related JP3274971B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15579396A JP3274971B2 (en) 1996-06-17 1996-06-17 Wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15579396A JP3274971B2 (en) 1996-06-17 1996-06-17 Wiring board

Publications (2)

Publication Number Publication Date
JPH104153A JPH104153A (en) 1998-01-06
JP3274971B2 true JP3274971B2 (en) 2002-04-15

Family

ID=15613564

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15579396A Expired - Fee Related JP3274971B2 (en) 1996-06-17 1996-06-17 Wiring board

Country Status (1)

Country Link
JP (1) JP3274971B2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6281446B1 (en) 1998-02-16 2001-08-28 Matsushita Electric Industrial Co., Ltd. Multi-layered circuit board and method of manufacturing the same
JP6120368B2 (en) * 2013-06-18 2017-04-26 Ngkエレクトロデバイス株式会社 Multi-wiring board
KR20230045837A (en) * 2021-09-29 2023-04-05 스템코 주식회사 Multilayer substrate and manufacturing method thereof, and electronic apparatus including the same

Also Published As

Publication number Publication date
JPH104153A (en) 1998-01-06

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