JP3267183B2 - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JP3267183B2 JP3267183B2 JP4027197A JP4027197A JP3267183B2 JP 3267183 B2 JP3267183 B2 JP 3267183B2 JP 4027197 A JP4027197 A JP 4027197A JP 4027197 A JP4027197 A JP 4027197A JP 3267183 B2 JP3267183 B2 JP 3267183B2
- Authority
- JP
- Japan
- Prior art keywords
- led chip
- semiconductor device
- led
- hole
- electrodes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、回路基板に複数の
ＬＥＤチップを実装してなる半導体装置に関するもので
ある。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a plurality of LED chips mounted on a circuit board.
【０００２】[0002]
【従来の技術】従来、ＬＥＤは電子機器のインジケータ
等の用途に用いられてきたものであるが、近年、その発
光効率や輝度が向上し、単位入力あたりの輝度が白熱ラ
ンプに優るようなＬＥＤ素子が開発され、このＬＥＤ素
子を複数個まとめることにより、照明用途への応用が可
能となってきた。2. Description of the Related Art Conventionally, LEDs have been used for applications such as indicators of electronic equipment. In recent years, LEDs whose luminous efficiency and luminance have been improved, and whose luminance per unit input is superior to incandescent lamps, have been developed. A device has been developed, and by integrating a plurality of the LED devices, application to lighting applications has become possible.
【０００３】また、ＬＥＤ素子は長寿命であることから
ランプの取り替えの省力化等のメンテナンス性のメリッ
トがあり、発光波長レンジが狭いことにより生鮮食物に
ダメージを与える赤外線が出ない照明（例えば、鮮魚店
のショウケース用照明）として使用できるというメリッ
ト、美術品を退色劣化させる紫外線が出ない照明（例え
ば、美術館、博物館の照明）等に使用できるというメリ
ット等がある。[0003] Further, since the LED element has a long service life, it has the merit of maintenance such as labor saving of replacing a lamp, and the narrow emission wavelength range does not emit infrared light which damages fresh food (for example, There is an advantage that it can be used as a showcase lighting for a fresh fish store), and that it can be used for lighting that does not emit ultraviolet light that discolors and degrades artworks (for example, lighting for museums and museums).
【０００４】ここで、現行のＬＥＤ素子の実装例を図７
により説明する。１個のＬＥＤチップ１の電極１１の面
をリードフレーム２ａに導電性接着剤でダイボンドする
ことにより固着し、ＬＥＤチップ１の他方の電極１２は
他方のリードフレーム２ｂへボンディングワイヤ２１に
よりワイヤボンドし、ダイオードのＰＮ電極へのリード
フレーム２ａ、２ｂの接続がなされ、リードフレーム２
ａ、２ｂを介してＬＥＤチップ１に給電されるようにな
っている。さらに、金型成形により透明の封止樹脂２２
をレンズ状に成形することで、個別のＬＥＤ素子が完成
する。このようにして完成された個別のＬＥＤ素子のリ
ードフレーム２ａ、２ｂを基板の所定位置に半田付け等
により実装する。つまり、ＬＥＤチップ１の下面及び上
面の電極１１、１２に対して、接着及びワイヤボンディ
ングという別々の接合方法を使用している。[0004] Here, a mounting example of a current LED element is shown in FIG.
This will be described below. The surface of the electrode 11 of one LED chip 1 is fixed to the lead frame 2a by die bonding with a conductive adhesive, and the other electrode 12 of the LED chip 1 is wire bonded to the other lead frame 2b by a bonding wire 21. The lead frames 2a and 2b are connected to the PN electrodes of the diodes,
Power is supplied to the LED chip 1 via a and 2b. Further, the transparent sealing resin 22 is formed by molding.
Is molded into a lens shape to complete an individual LED element. The lead frames 2a and 2b of the individual LED elements completed in this way are mounted at predetermined positions on the substrate by soldering or the like. That is, separate bonding methods of bonding and wire bonding are used for the electrodes 11 and 12 on the lower surface and the upper surface of the LED chip 1.
【０００５】[0005]
【発明が解決しようとする課題】しかしながら、上述の
ようなＬＥＤ素子を照明分野に応用する場合には、ＬＥ
Ｄ素子の個々の輝度は低いため多数個のＬＥＤ素子を使
用する必要があり、複数のＬＥＤ素子のリードフレーム
２ａ、２ｂを各素子への電流供給回路が形成された基板
の所定位置に半田付け等により一括して実装しなければ
ならない。However, when the above-mentioned LED element is applied to the field of lighting, LE is required.
Since the brightness of each of the D elements is low, it is necessary to use a large number of LED elements, and the lead frames 2a and 2b of the plurality of LED elements are soldered to predetermined positions of a substrate on which a current supply circuit for each element is formed. It has to be implemented collectively by the method.
【０００６】従って、上述のようなＬＥＤ素子を用いて
照明装置を作製する場合には、ＬＥＤ素子をつくる段階
で素子接着及びワイヤボンディングという２つの接合方
法により電極１１、１２をリードフレーム２ａ、２ｂに
固着、接続し、さらに、複数のＬＥＤ素子のリードフレ
ーム２ａ、２ｂを基板の所定位置に半田付け等により実
装するという工程が必要となり生産性が悪い。 Accordingly, in the case of manufacturing the lighting device using LED elements as above mentioned may lead more electrodes 1 1,12 into two junction method of element adhesive and wire bonding step of making an LED element frame A process of fixing and connecting the lead frames 2a and 2b to the lead frames 2a and 2b and mounting the lead frames 2a and 2b of a plurality of LED elements at predetermined positions on the substrate by soldering or the like is required, and the productivity is poor.
【０００７】本発明は、上記の点に鑑みてなしたもので
あり、その目的とするところは、複数のＬＥＤチップを
基板に実装した半導体装置であって、生産性の良い半導
体装置を提供することにある。[0007] The present invention has been made in view of the above points, and an object of the present invention is to provide a semiconductor device in which a plurality of LED chips are mounted on a substrate and which has high productivity. It is in.
【０００８】[0008]
【課題を解決するための手段】請求項１記載の発明は、
複数のＬＥＤチップと、該ＬＥＤチップの各々を収納す
る複数の凹部が形成された３次元成形基板とを有し、前
記凹部の側壁に貫通孔を形成し、前記ＬＥＤチップの電
極面でない面が前記凹部の底面側になるように前記ＬＥ
Ｄチップを搭載し、隣接するＬＥＤチップの電極間を前
記貫通孔を介して導電性部材により接続するようにした
ことを特徴とするものである。According to the first aspect of the present invention,
Includes a plurality of LED chips, and a three-dimensional molded substrate having a plurality of recesses are formed for accommodating each of the LED chips, before
A through-hole is formed in the side wall of the recess, and the LE is formed such that the surface of the LED chip that is not the electrode surface is on the bottom side of the recess.
Equipped with D chips, before the inter-adjacent LED chips electrodes
The connection is made by a conductive member through the through hole .
【０００９】請求項２記載の発明は、請求項１記載の発
明において、前記導電性部材として導電性接着剤を用
い、前記貫通孔を介して導電性接着剤により隣接するＬ
ＥＤチップの電極間を接続するようにしたことを特徴と
するものである。[0009] According to a second aspect of the present invention, in the first aspect, before using a conductive adhesive as Kishirube conductive member, adjacent the conductive adhesive via the through-hole L
It is characterized in that the electrodes of the ED chip are connected.
【００１０】請求項３記載の発明は、請求項１記載の発
明において、前記貫通孔の内面及び前記側壁の表裏両面
に配線パターンを形成し、前記導電性部材として半田ペ
ーストを用い、前記貫通孔を介して半田ペーストにより
隣接するＬＥＤチップの電極間を接続するようにしたこ
とを特徴とするものである。[0010] According to a third aspect of the present invention, in the first aspect, before forming the inner surface and the wiring pattern on both surfaces of the side wall of Kinuki hole, using a solder paste as the conductive member, wherein The present invention is characterized in that the electrodes of adjacent LED chips are connected by solder paste through the through holes.
【００１１】請求項４記載の発明は、請求項１乃至請求
項３記載の発明において、前記ＬＥＤチップを前記凹部
の底面に搭載する際に接着剤により仮止めするようにし
たことを特徴とするものである。According to a fourth aspect of the present invention, in the first to third aspects of the present invention, the LED chip is temporarily fixed with an adhesive when the LED chip is mounted on the bottom surface of the concave portion. Things.
【００１２】請求項５記載の発明は、請求項１乃至請求
項４記載の発明において、前記凹部の側壁と底面とが鈍
角をなすようにしたことを特徴とするものである。According to a fifth aspect of the present invention, in the first to fourth aspects of the present invention, the side wall and the bottom surface of the recess form an obtuse angle.
【００１３】請求項６記載の発明は、請求項１乃至請求
項５記載の発明において、前記ＬＥＤチップの上面側を
樹脂封止する際に、透明な樹脂を注入し加熱硬化させる
ことによりレンズを形成するようにしたことを特徴とす
るものである。According to a sixth aspect of the present invention, in the first to fifth aspects of the invention, when the upper surface side of the LED chip is sealed with a resin, a transparent resin is injected and cured by heating. It is characterized in that it is formed.
【００１４】[0014]
【発明の実施の形態】以下、本発明の実施の形態の一例
を図面に基づき説明する。図１は本発明の実施の形態の
一例に係る半導体装置の一部の断面状態を示す模式図で
あり、１は０．３ｍｍ立方の微小なＬＥＤチップであ
り、ＰＮ接合により構成され、ＰＮの各領域の接合面で
ない面には各々電極１１、１２が形成されている。３は
３次元成形基板（ＭＩＤ基板：Ｍｏｌｄｅｄ Ｉｎｔｅ
ｒｃｏｎｎｅｃｔｉｏｎ Ｄｅｖｉｃｅ）であり、各Ｌ
ＥＤチップ１を収納するための複数の凹部３１を有して
いる。ＬＥＤチップ１は、電極１１、１２の形成されて
いない面が凹部３１の底面３２に当接するように搭載さ
れる。ＬＥＤチップ１をＭＩＤ基板３の凹部３１に搭載
した状態を示す概略構成図を図２に示す。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a schematic view showing a cross-sectional state of a part of a semiconductor device according to an example of an embodiment of the present invention. Reference numeral 1 denotes a small LED chip of 0.3 mm 3 cubic, which is formed by a PN junction. Electrodes 11 and 12 are formed on the non-joining surfaces of the respective regions. 3 is a three-dimensional molded substrate (MID substrate: Molded Inte
rconnection Device), and each L
It has a plurality of recesses 31 for accommodating the ED chip 1. The LED chip 1 is mounted so that the surface on which the electrodes 11 and 12 are not formed contacts the bottom surface 32 of the concave portion 31. FIG. 2 is a schematic configuration diagram showing a state in which the LED chip 1 is mounted on the concave portion 31 of the MID substrate 3.
【００１５】ＬＥＤチップ１の搭載部としての凹部３１
のサイズは、ＬＥＤチップ１の寸法との関係で決めら
れ、凹部３１の側壁３３の傾斜角度や寸法はＬＥＤチッ
プ１の側面の内、電極１１、１２の形成されていない面
から発光される光の側壁３３による反射を考慮して決め
られる。つまり、電極１１、１２の形成されていない面
に対向する側壁３３は側壁３３による反射波が凹部３１
の開口部側に行くように、凹部３１の底面に対して鈍角
となるように、傾斜を持たせるのが良い。なお、全ての
側壁３３に傾斜を持たせてもかまわない。Recess 31 as mounting portion for LED chip 1
Is determined by the relationship with the dimensions of the LED chip 1, and the inclination angle and dimensions of the side wall 33 of the concave portion 31 are the light emitted from the side of the LED chip 1 where the electrodes 11 and 12 are not formed. Is determined in consideration of the reflection by the side wall 33. In other words, the side wall 33 facing the surface on which the electrodes 11 and 12 are not formed is reflected by the side wall 33 by the concave portion 31.
It is preferable to provide an inclination so as to reach the opening side of the concave portion 31 so as to form an obtuse angle with respect to the bottom surface of the concave portion 31. Note that all the side walls 33 may have an inclination.
【００１６】また、電極１１、１２に対向する側壁３３
には貫通孔３４が形成されている。複数のＬＥＤチップ
１を各々ＭＩＤ基板３の各凹部３１に搭載した状態で、
ＭＩＤ基板３の裏側から銀等の導電性粒子が入った導電
性接着剤５を注入していけば、導電性接着剤５は貫通孔
３４を介して凹部３１内に入り込み、電極１１、１２に
付着し、ＬＥＤチップ１の固定と隣接のＬＥＤチップ１
の電極１１、１２との接続とが同時に行われる。なお、
ＬＥＤチップ１の搭載時にＵＶ接着剤や即時硬化型の接
着剤等の接着剤４により凹部３１の底面に仮止めしてお
けば、導電性接着剤５の注入という次の工程までの位置
ずれ等を防止することができる。Further, a side wall 33 facing the electrodes 11 and 12 is provided.
Is formed with a through hole 34. In a state where the plurality of LED chips 1 are mounted on the respective recesses 31 of the MID substrate 3,
When the conductive adhesive 5 containing conductive particles such as silver is injected from the back side of the MID substrate 3, the conductive adhesive 5 enters the recess 31 through the through-hole 34 and contacts the electrodes 11 and 12. Attach and fix LED chip 1 and adjacent LED chip 1
Connection with the electrodes 11 and 12 is performed at the same time. In addition,
If the LED chip 1 is temporarily mounted on the bottom surface of the concave portion 31 with an adhesive 4 such as a UV adhesive or an instant-curing adhesive at the time of mounting the LED chip 1, a displacement of the conductive adhesive 5 until the next step of injection is performed. Can be prevented.
【００１７】図３は本発明の他の実施形態に係る半導体
装置の一部断面状態を示す模式図である。本実施形態で
は、上述の実施形態における導電性接着剤５の替わりに
半田ペースト６を使用している。半田ペースト６のＭＩ
Ｄ基板３への濡れを良くするため、ＭＩＤ基板３の各凹
部３１の側壁３３の内外面及び貫通孔３４の内面には配
線パターン７を形成しておく。従って、貫通孔３４の内
面はスルーホール３５となる。上述の実施形態と同様な
方法で導電性接着剤５に替えて半田ペースト６を注入
し、リフロー硬化させるのである。FIG. 3 is a schematic diagram showing a partial cross-sectional state of a semiconductor device according to another embodiment of the present invention. In this embodiment, a solder paste 6 is used instead of the conductive adhesive 5 in the above-described embodiment. MI of solder paste 6
In order to improve the wetting of the D substrate 3, the wiring patterns 7 are formed on the inner and outer surfaces of the side walls 33 and the inner surfaces of the through holes 34 of the concave portions 31 of the MID substrate 3 in advance. Therefore, the inner surface of the through hole 34 becomes a through hole 35. The solder paste 6 is injected instead of the conductive adhesive 5 in the same manner as in the above-described embodiment, and is cured by reflow.
【００１８】なお、図４は半導体装置の参考例の一部断
面状態を示す模式図である。本参考例では、凹部３１の
側壁３３には貫通孔３４は形成せず、隣接する凹部３１
の側壁３３間が接続されるように配線パターン８を形成
しておく。ここで、ＬＥＤチップ１を凹部３１に搭載し
た状態で、ＬＥＤチップ１が搭載された側から凹部３１
内に半田ペースト６を注入し、リフロー硬化させる。隣
接するＬＥＤチップ１の電極１１、１２間は配線パター
ン８及び半田ペースト６により接続される。[0018] Incidentally, FIG. 4 is a schematic view showing a partial section state of a reference example of a semi-conductor device. In this reference example , the through hole 34 is not formed in the side wall 33 of the concave portion 31, and the adjacent concave portion 31 is not formed.
The wiring pattern 8 is formed so that the side walls 33 are connected to each other. Here, with the LED chip 1 mounted in the recess 31, the recess 31
The solder paste 6 is injected into the inside, and is cured by reflow. The electrodes 11 and 12 of the adjacent LED chips 1 are connected by the wiring pattern 8 and the solder paste 6.
【００１９】以上の実施形態によれば、複数のＬＥＤチ
ップ１を各々ＭＩＤ基板３の各凹部３１に搭載した状態
で、導電性接着剤５あるいは半田ペースト６を注入すれ
ば、隣接するＬＥＤチップ１の電極１１、１２間を一括
して接続できるので、素子接着及びワイヤボンディング
という接合工程及び基板への接続という工程という３つ
の工程が必要であった従来の半導体装置に比して、製造
工程の簡略化、生産性の向上が図れる。また、接合の工
程品質管理も１工程の管理ですむので、歩留まりの安定
性が期待できる。According to the above embodiment, when the conductive adhesive 5 or the solder paste 6 is injected in a state where the plurality of LED chips 1 are mounted in the respective recesses 31 of the MID substrate 3, the adjacent LED chips 1 Electrodes 11 and 12 can be connected collectively, so that three steps of a bonding step of element bonding and wire bonding and a step of connection to a substrate are required, and thus the manufacturing process of the conventional semiconductor device is difficult. Simplification and improvement in productivity can be achieved. In addition, since the joining process quality control requires only one process, stable yield can be expected.
【００２０】図３で示した実施形態では、半田ペースト
６を注入する工程での不良があった場合には、加熱する
ことにより容易に不良のＬＥＤチップ１を取り除いた
り、良品への置き換えが可能となる。なお、導電性接着
剤５を用いた工程の方でも、仮硬化状態で電気導通検査
を行うことが可能である。In the embodiment shown in FIG. 3, if there is a defect in the step of injecting the solder paste 6, the defective LED chip 1 can be easily removed by heating or replaced with a good one. Becomes Note that the electrical continuity test can be performed in a temporarily cured state even in the process using the conductive adhesive 5.
【００２１】なお、図４で示した参考例では、図３で示
した実施形態と比べて半田ペーストの量が少なくて済
む。一方、図３で示した実施形態では、半田ペーストを
ＭＩＤ基板３のＬＥＤチップ１が搭載された側と反対側
から注入しているので、過剰な半田ペーストが注入され
た場合でも半田ペーストがＬＥＤチップ１の上面まで達
して短絡するというような事態を少なくできる。[0021] In the reference example shown in FIG. 4, only a small amount of solder paste as compared to the embodiment shown in FIG. On the other hand, in the embodiment shown in FIG. 3, the solder paste is injected from the side of the MID substrate 3 opposite to the side on which the LED chip 1 is mounted. It is possible to reduce a situation in which a short circuit is reached by reaching the upper surface of the chip 1.
【００２２】図５は本発明のさらに他の実施形態に係る
半導体装置の一部断面状態及び上面を示す模式図であ
る。本実施形態では、以上の実施形態のものにおいて、
凹部３１の上方から透明な（光透過性を有し、必要に応
じ多少の着色可）封止樹脂を滴下し、加熱硬化させるこ
とにより、レンズ９を形成する。ここで、レンズ９は、
封止樹脂の吐出量の制御や、図６に示すように、凹部３
１の形状を変えることにより、所望の配光特性を実現す
ることができる。図５の場合は凹部３１の平面形状が正
方形であり、ＸＹ軸に対称なレンズを形成するが、図６
（ａ）の場合は凹部３１の平面形状が長方形であり、Ｘ
Ｙ方向が等しくないレンズを形成することができ、図６
（ｂ）の場合は凹部３１の上部に円形の座ぐり１０を設
けることにより球面のレンズを形成することが可能であ
る。FIG. 5 is a schematic view showing a partial cross section and a top view of a semiconductor device according to still another embodiment of the present invention. In the present embodiment, in the above embodiment,
The lens 9 is formed by dropping a transparent (light-transmissive and somewhat colored as necessary) sealing resin from above the concave portion 31 and heating and curing the resin. Here, the lens 9
Control of the discharge amount of the sealing resin and, as shown in FIG.
By changing the shape of 1, the desired light distribution characteristics can be realized. In the case of FIG. 5, the plane shape of the concave portion 31 is a square, and a lens symmetric with respect to the XY axes is formed.
In the case of (a), the plane shape of the concave portion 31 is rectangular, and X
A lens having unequal Y directions can be formed, and FIG.
In the case of (b), it is possible to form a spherical lens by providing a circular counterbore 10 above the concave portion 31.
【００２３】本実施形態によれば、凹部３１内のＬＥＤ
チップ１の上部に封止樹脂によりレンズ９を形成したの
で、所望の配光特性を有する照明用途に使用することが
できる。According to this embodiment, the LED in the concave portion 31
Since the lens 9 is formed on the upper portion of the chip 1 with a sealing resin, the lens 9 can be used for lighting applications having desired light distribution characteristics.
【００２４】なお、３次元成形基板３の成形時に、熱伝
導性の良い金属材料やセラミック等の無機材料を同時成
形したり、あるいは後で貼り付けることにより、放熱性
を良くすることも可能である。When the three-dimensional molded substrate 3 is molded, it is also possible to improve the heat radiation by simultaneously molding or attaching an inorganic material such as a metal material or a ceramic having a good thermal conductivity, or attaching it later. is there.
【００２５】[0025]
【発明の効果】以上のように、請求項１記載の発明によ
れば、複数のＬＥＤチップと、該ＬＥＤチップの各々を
収納する複数の凹部が形成された３次元成形基板とを有
し、前記凹部の側壁に貫通孔を形成し、前記ＬＥＤチッ
プの電極面でない面が前記凹部の底面側になるように前
記ＬＥＤチップを搭載し、隣接するＬＥＤチップの電極
間を前記貫通孔を介して導電性部材により接続するよう
にしたので、製造工程が簡略化でき、複数のＬＥＤチッ
プを搭載した半導体装置を生産性良く製造することがで
きる。As described above, according to the first aspect of the present invention, there are provided a plurality of LED chips, and a three-dimensional molded substrate formed with a plurality of recesses for accommodating each of the LED chips. A through-hole is formed in the side wall of the recess, and the LED chip is mounted such that the non-electrode surface of the LED chip is on the bottom side of the recess, and between the electrodes of adjacent LED chips via the through-hole. Since the connection is made by the conductive member, the manufacturing process can be simplified, and a semiconductor device having a plurality of LED chips mounted thereon can be manufactured with high productivity.
【００２６】請求項２記載の発明は、請求項１記載の発
明において、前記導電性部材として導電性接着剤を用
い、前記貫通孔を介して導電性接着剤により隣接するＬ
ＥＤチップの電極間を接続するようにすれば、３次元成
形基板の凹部のＬＥＤチップが搭載されていない側から
導電性接着剤を注入すれば、貫通孔を介して導電性接着
剤が流れ、隣接するＬＥＤチップの電極間の接続が行わ
れるのである。[0026] According to a second aspect of the present invention, in the first aspect, before using a conductive adhesive as Kishirube conductive member, adjacent the conductive adhesive via the through-hole L
If the electrodes of the ED chip are connected, if the conductive adhesive is injected from the side of the concave portion of the three-dimensional molded substrate on which the LED chip is not mounted, the conductive adhesive flows through the through-hole, The connection between the electrodes of the adjacent LED chips is made.
【００２７】請求項３記載の発明は、請求項１記載の発
明において、前記貫通孔の内面及び前記側壁の表裏両面
に配線パターンを形成し、前記導電性部材として半田ペ
ーストを用い、前記貫通孔を介して半田ペーストにより
隣接するＬＥＤチップの電極間を接続するようにすれ
ば、３次元成形基板の凹部のＬＥＤチップが搭載されて
いない側から半田ペーストを注入すれば、貫通孔を介し
て半田ペーストが流れ、隣接するＬＥＤチップの電極間
の接続が行われるのである。[0027] According to a third aspect of the present invention, in the first aspect, before forming the inner surface and the wiring pattern on both surfaces of the side wall of Kinuki hole, using a solder paste as the conductive member, wherein If the electrodes of adjacent LED chips are connected by solder paste through the through-holes, the solder paste is injected from the side of the concave portion of the three-dimensional molded substrate where the LED chips are not mounted. Thus, the solder paste flows and the connection between the electrodes of the adjacent LED chips is made.
【００２８】請求項４記載の発明は、請求項１乃至請求
項３記載の発明において、前記ＬＥＤチップを前記凹部
の底面に搭載する際に接着剤により仮止めするようにす
れば、導電性接着剤や半田ペースト等の導電性部材５の
注入という次の工程までのＬＥＤチップの位置ずれ等を
防止することができるのである。According to a fourth aspect of the present invention, in the first to third aspects of the present invention, when the LED chip is temporarily fixed with an adhesive when the LED chip is mounted on the bottom surface of the concave portion, the conductive adhesive is provided. It is possible to prevent the LED chip from being displaced until the next step of injecting the conductive member 5 such as an agent or a solder paste.
【００２９】請求項５記載の発明は、請求項１乃至請求
項４記載の発明において、前記凹部の側壁と底面とが鈍
角をなすようにすれば、ＬＥＤチップから発光される光
を効率良く外部に取り出すことができる。According to a fifth aspect of the present invention, in the first to fourth aspects of the present invention, if the side wall and the bottom surface of the concave portion form an obtuse angle, the light emitted from the LED chip can be efficiently emitted to the outside. Can be taken out.
【００３０】請求項６記載の発明は、請求項１乃至請求
項５記載の発明において、前記ＬＥＤチップの上面側を
樹脂封止する際に、透明な樹脂を注入し加熱硬化させる
ことによりレンズを形成するようにすれば、レンズ形状
を所望の形状にすることにより、所望の配光特性を有す
る照明用途に使用することができる。According to a sixth aspect of the present invention, in the first to fifth aspects of the present invention, when the upper surface of the LED chip is sealed with a resin, a transparent resin is injected and cured by heating. If it is formed, it can be used for lighting applications having desired light distribution characteristics by making the lens shape a desired shape.
【図１】本発明の一実施形態に係る半導体装置の一部の
断面状態を示す模式図である。FIG. 1 is a schematic diagram showing a cross-sectional state of a part of a semiconductor device according to an embodiment of the present invention.
【図２】同上に係るＬＥＤチップをＭＩＤ基板の凹部に
搭載した状態を示す概略構成図である。FIG. 2 is a schematic configuration diagram showing a state where the LED chip according to the above is mounted in a concave portion of an MID substrate.
【図３】本発明の他の実施形態に係る半導体装置の一部
の断面状態を示す模式図である。FIG. 3 is a schematic diagram showing a cross-sectional state of a part of a semiconductor device according to another embodiment of the present invention.
【図４】半導体装置の参考例の一部の断面状態を示す模
式図である。FIG. 4 is a schematic diagram illustrating a partial cross-sectional state of a reference example of a semiconductor device .
【図５】本発明のさらに他の実施形態に係る半導体装置
の一部の断面状態及び平面状態を示す模式図である。FIG. 5 is a schematic diagram showing a cross-sectional state and a planar state of a part of a semiconductor device according to still another embodiment of the present invention.
【図６】同上に係るＭＩＤ基板の凹部の他の形態の断面
状態及び平面状態を示す模式図である。FIG. 6 is a schematic diagram showing a cross-sectional state and a planar state of another mode of the concave portion of the MID substrate according to the above.
【図７】従来のＬＥＤ素子の断面状態を示す模式図であ
る。FIG. 7 is a schematic diagram showing a cross-sectional state of a conventional LED element.
１ ＬＥＤチップ ３ ３次元成形基板（ＭＩＤ基板） ４ 接着剤 ５ 導電性接着剤 ６ 半田ペースト ７ 配線パターン ８ 配線パターン ９ レンズ １０ 座ぐり １１ 電極 １２ 電極 ３１ 凹部 ３２ 底面 ３３ 側壁 ３４ 貫通孔 ３５ スルーホール DESCRIPTION OF SYMBOLS 1 LED chip 3 Three-dimensional molded board (MID board) 4 Adhesive 5 Conductive adhesive 6 Solder paste 7 Wiring pattern 8 Wiring pattern 9 Lens 10 Counterbore 11 Electrode 12 Electrode 31 Depression 32 Bottom 33 Side wall 34 Through hole 35 Through hole
───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7，ＤＢ名) H01L 33/00 H01L 5/00 - 5/50 ──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. 7 , DB name) H01L 33/00 H01L 5/00-5/50
Claims (6)
の各々を収納する複数の凹部が形成された３次元成形基
板とを有し、前記凹部の側壁に貫通孔を形成し、前記Ｌ
ＥＤチップの電極面でない面が前記凹部の底面側になる
ように前記ＬＥＤチップを搭載し、隣接するＬＥＤチッ
プの電極間を前記貫通孔を介して導電性部材により接続
するようにしたことを特徴とする半導体装置。1. A three-dimensional molded substrate having a plurality of LED chips and a plurality of recesses for accommodating each of the LED chips, wherein a through hole is formed in a side wall of the recess, and
The LED chip is mounted such that the surface of the ED chip that is not the electrode surface is on the bottom side of the recess, and the electrodes of adjacent LED chips are connected by a conductive member via the through hole. Semiconductor device.
い、前記貫通孔を介して導電性接着剤により隣接するＬ
ＥＤチップの電極間を接続するようにしたことを特徴と
する請求項１記載の半導体装置。2. A use of a conductive adhesive as before Kishirube conductive member, adjacent the conductive adhesive via the through-hole L
2. The semiconductor device according to claim 1, wherein the electrodes of the ED chip are connected.
面に配線パターンを形成し、前記導電性部材として半田
ペーストを用い、前記貫通孔を介して半田ペーストによ
り隣接するＬＥＤチップの電極間を接続するようにした
ことを特徴とする請求項１記載の半導体装置。3. A wiring pattern is formed on both sides of the inner surface and the side wall of the front Kinuki hole, using a solder paste as the conductive member, LED chip electrodes adjacent the solder paste through the through hole 2. The semiconductor device according to claim 1, wherein the connection is established.
載する際に接着剤により仮止めするようにしたことを特
徴とする請求項１乃至請求項３記載の半導体装置。4. The semiconductor device according to claim 1, wherein said LED chip is temporarily fixed by an adhesive when said LED chip is mounted on a bottom surface of said concave portion.
うにしたことを特徴とする請求項１乃至請求項４記載の
半導体装置。5. The semiconductor device according to claim 1, wherein the side wall and the bottom surface of the recess form an obtuse angle.
る際に、透明な樹脂を注入し加熱硬化させることにより
レンズを形成するようにしたことを特徴とする請求項１
乃至請求項５記載の半導体装置。6. A lens is formed by injecting a transparent resin and curing by heating when sealing the upper surface side of the LED chip with a resin.
The semiconductor device according to claim 5.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4027197A JP3267183B2 (en) | 1997-02-25 | 1997-02-25 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4027197A JP3267183B2 (en) | 1997-02-25 | 1997-02-25 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH10242519A JPH10242519A (en) | 1998-09-11 |
| JP3267183B2 true JP3267183B2 (en) | 2002-03-18 |
Family
ID=12575984
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4027197A Expired - Fee Related JP3267183B2 (en) | 1997-02-25 | 1997-02-25 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3267183B2 (en) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000349306A (en) | 1999-06-02 | 2000-12-15 | Mitsubishi Electric Corp | Semiconductor device with condensation lens |
| JP4120493B2 (en) * | 2003-06-25 | 2008-07-16 | 松下電工株式会社 | Light emitting diode and light emitting device |
| JP5326204B2 (en) | 2006-11-29 | 2013-10-30 | 富士通株式会社 | LIGHT EMITTING COMPONENT, ITS MANUFACTURING METHOD, LIGHT EMITTING COMPONENT ASSEMBLY AND ELECTRONIC DEVICE |
| JP6481458B2 (en) * | 2015-03-27 | 2019-03-13 | 日亜化学工業株式会社 | Method for manufacturing light emitting device |
| JP2019145577A (en) * | 2018-02-16 | 2019-08-29 | 京セラ株式会社 | Semiconductor module and manufacturing method of semiconductor module |
| CN114035699B (en) * | 2021-03-10 | 2023-03-28 | 重庆康佳光电技术研究院有限公司 | LED touch chip, preparation method thereof and display device |
-
1997
- 1997-02-25 JP JP4027197A patent/JP3267183B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH10242519A (en) | 1998-09-11 |
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