JP3242761B2 - Burst waveform generator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a baseband waveform generator used in a transmitting section of digital mobile communication.

[0002]

2. Description of the Related Art FIG. 6 shows a conventional burst waveform generator, and shows, as an example, a case where a multiplier is used in a ramp control circuit. In FIG. 6, reference numeral 20 denotes an input terminal to which transmission data is applied, 21 denotes a waveform data generation circuit that outputs digital waveform data corresponding to the transmission data, 2
Reference numeral 2 denotes a lamp control circuit that realizes lamp control by multiplying the output of the waveform data generation circuit 21 by a window function obtained from the window function generation circuit 24 using a multiplier 23.
Reference numeral 5 denotes a D / A converter for converting digital data output from the lamp control circuit 22 into an analog sample value signal.
6 is a post filter for smoothing the output waveform of the D / A converter 25, and 27 is an output terminal from which the output of the burst waveform generator is obtained.

Next, the operation of the above conventional example will be described.
In FIG. 6, after digital data to be transmitted is applied to an input terminal 20, digital waveform data corresponding to the transmission data is output via a waveform data generation circuit 21 and supplied to a lamp control circuit 22. Therefore, the digital waveform data is multiplied by the window function shown in FIG. 7B obtained from the window function generator 24 using the multiplier 23, and the rising and falling of the burst are smoothed. Perform control. Lamp control circuit 2
2 is converted into an analog sampled value signal by a D / A converter 25, and then smoothed by a post filter 26.
It is output from the output terminal 27 as the output of the burst waveform generator. FIG. 7A shows an output waveform of the burst waveform generator when the ramp control is not performed. When the above-described ramp control is performed on the output waveform, the output of the burst waveform generator as shown in FIG. A waveform is obtained, from which it can be seen that the rise and fall of the burst are smoothed by the ramp control described above.

As described above, even in the above-described conventional burst waveform generator, a desired waveform can be obtained by multiplying the ramp control circuit by the window function using the multiplier and smoothing the rise and fall of the burst. .

[0005]

However, in the above-mentioned conventional burst waveform generator, since a multiplier is used in the ramp control circuit, there is a problem that the power consumption and the circuit scale are increased.

An object of the present invention is to solve the above-mentioned conventional problems, and an object of the present invention is to provide a burst waveform generator capable of reducing power consumption and circuit scale.

According to the present invention, in order to attain the above object, in a ramp control circuit, a plurality of bit shift circuits and an adder are used instead of multiplying a window function using a multiplier.
Is equipped with a subtractor, and by combining these,
Amplitude control of waveform data to M / 2 ^k (M, k: integer) times
And, by changing the amplitude level is obtained to perform the ramp control.

[0008]

According to the present invention, the above configuration eliminates the need for a multiplier, thereby reducing power consumption and circuit scale.

[0009]

(Embodiment 1) An embodiment of the present invention will be described below. In each of the following embodiments, two bit shift circuits are used, but up to N (positive integers) can be provided. FIG. 1 is a block diagram of a burst waveform generator according to a first embodiment of the present invention, and FIG. 2 is a block diagram illustrating a configuration of a ramp control circuit used in the first embodiment.
In FIG. 1, 1 is an input terminal to which transmission data is applied,
2 is a waveform data generating circuit for outputting digital waveform data for transmission data, 3 is a ramp control circuit for performing bit control on the output of the waveform data generating circuit 2 and changing the amplitude level to perform ramp control, and 4 is a ramp control circuit. A D / A converter for converting digital data output from the circuit 3 into an analog sampled value signal, 5 is a post filter for smoothing the output waveform of the D / A converter 4, and 6 is an output of the burst waveform generator. The resulting output terminal.

In FIG. 2, reference numerals 7 and 8 denote first and second bit shift circuits for performing bit shift on output data of the waveform data generation circuit 2 to change the amplitude level, and reference numeral 9 denotes an output of the first bit shift circuit 7. And an adder for adding the output of the second bit shift circuit 8.

Next, the operation of the first embodiment will be described with reference to FIG.
This will be described with reference to FIG. In FIG. 1, after digital data to be transmitted is applied to an input terminal 1, digital waveform data corresponding to the transmission data is output through a waveform data generation circuit 2, and a ramp control circuit 3
Supplied to Therefore, as shown in FIG. 2, a first bit shift circuit 7
, The waveform data is multiplied by 1/2 ⁱ ,
At the same time, when the second bit shift circuit 8 shifts j bits, the waveform data becomes 1/2 ^j times (i, j (i ≦ j)):
The output is added by the adder 9 to obtain an output whose amplitude is controlled to (2 ^(ji) +1) / 2 ^j times the waveform data. For example, when i = 1 and j = 2, an output whose amplitude is controlled to 3/4 times the input waveform data is obtained. By performing such control a plurality of times in the ramp time while changing the bit shift numbers i and j, the ramp level is stepped up or down to perform ramp control. The output of the lamp control circuit 3 is
After being converted into an analog sample value signal by the D / A converter 4, it is smoothed by the post filter 5 and output from the output terminal 6 as an output of the burst waveform generator.

FIG. 5A shows the output waveform of the burst waveform generator when the ramp control is not performed.
By performing the above-described ramp control, the output waveform of the burst waveform generator as shown in FIG. 5 (b) is obtained. From these figures, the rise and fall of the burst become smooth by the above-described ramp control. You can see that there is.

As described above, according to the first embodiment,
In the ramp control circuit 3, instead of multiplying the window function using the multiplier, the ramp control is performed by changing the amplitude level by bit-shifting the waveform data. This has the effect of reducing the circuit scale.

(Embodiment 2) Next, a second embodiment of the present invention will be described. The configuration of the burst waveform generator in this embodiment is the same as that of the first embodiment shown in FIG. 1, but the configuration of the ramp control circuit 3 is different from that of the first embodiment, which is shown in FIG. . In FIG. 3, 10 and 11
Is a first and a second bit shift circuit for performing a bit shift on the output data of the waveform data generation circuit 2 to change the amplitude level, and 12 is an output of the first bit shift circuit 10 and an output of the second bit shift circuit 11 Is a subtractor for subtracting.

Next, the operation of the second embodiment will be described with reference to FIG.
This will be described with reference to FIG. In FIG. 1, after digital data to be transmitted is applied to an input terminal 1, digital waveform data corresponding to the transmission data is output through a waveform data generation circuit 2, and a ramp control circuit 3
Supplied to Therefore, as shown in FIG. 3, the first bit shift circuit 1
If i-bit shift is performed by 0, the waveform data is multiplied by 1/2 ⁱ . At the same time, if the second bit shift circuit 11 shifts j bits, the waveform data is 1/2 ^j times (i, j (i ≦ i)
j): a positive integer), and the output thereof is subtracted by the subtractor 12 to obtain (2 ^(ji) -1) / 2 for the waveform data.
An output whose amplitude is controlled by ^j times is obtained. For example, i = 1,
When j = 3, an output whose amplitude is controlled to ／ times the input waveform data is obtained. By performing such control a plurality of times in the ramp time while changing the bit shift numbers i and j, the ramp level is stepped up or down to perform ramp control. Lamp control circuit 3
Is converted into an analog sampled value signal by the D / A converter 4, smoothed by the post filter 5, and output from the output terminal 6 as an output of the burst waveform generator.

FIG. 5A shows the output waveform of the burst waveform generator when the ramp control is not performed.
By performing the above-described ramp control, the output waveform of the burst waveform generator as shown in FIG. 5 (b) is obtained. From these figures, the rise and fall of the burst become smooth by the above-described ramp control. You can see that there is.

As described above, according to the second embodiment,
In the ramp control circuit 3, instead of multiplying the window function using the multiplier, the ramp control is performed by changing the amplitude level by bit-shifting the waveform data. This has the effect of reducing the circuit scale.

(Embodiment 3) Next, a third embodiment of the present invention will be described. The configuration of the burst waveform generator in this embodiment is the same as that of the first embodiment shown in FIG. 1, but the configuration of the ramp control circuit 3 is different from that of the first embodiment, and this is shown in FIG. . In FIG. 4, 13, 14, 1
Reference numerals 5 and 16 denote a first bit shift circuit, a second bit shift circuit, a third bit shift circuit, and a fourth bit shift circuit, respectively, for performing bit shift on output data of the waveform data generating circuit to change the amplitude level. A first adder for adding the output of the first bit shift circuit to the output of the second bit shift circuit;
Is a second adder for adding the output of the third bit shift circuit 15 and the output of the fourth bit shift circuit 16,
9 is a subtractor for subtracting the output of the second adder 18 from the output of the first adder 17.

Next, the operation of the third embodiment will be described with reference to FIG.
This will be described with reference to FIG. In FIG.
Digital data to be transmitted is applied to input terminal 1.
Then, the transmission data is transmitted through the waveform data generation circuit 2.
Digital waveform data is output, and the lamp control circuit 3
Supplied to Therefore, as shown in FIG.
The first bit shift circuit 1
When i-bit is shifted by 3, the waveform data becomes 1/2.ⁱDouble
At the same time, the second bit shift circuit 14
Shift the waveform data to 1/2^jTimes (i, j (i
.Ltoreq.j): a positive integer), and the output is
When added, the waveform data becomes (2^(ji)+1) / 2^jDouble
It is. In addition, the third bit shift circuit 15 shifts k bits.
The waveform data is 1/2^kDoubled and at the same time
When the fourth bit shift circuit 16 shifts by h bits,
Waveform data is 1/2^hTimes (k, h (k ≦ h): positive integer)
Then, when the output is added by the second adder 18, the waveform
The data is (2^(hk)+1) / 2 ^hMultiplied. This first
The output of the second adder is subtracted from the output of the adder 17 by a subtractor 19.
Is subtracted from the waveform data, (2^(hi)
+2^(hj)-2^(hk)-1) / 2^hDoubled amplitude control
The output is obtained. For example, i = 1, j = 2, k = 3, h =
In the case of 4, 9/16 times the input waveform data
An output whose amplitude is controlled is obtained. Run such control
Change bit shift numbers i, j, k, h
Performing multiple times while adjusting the amplitude level
Ramp control is performed by ascending or descending. Lamp control
The output of the circuit 3 is an analog sampled value by the D / A converter 4.
After being converted into a signal, it is smoothed by a post filter 5,
Output from output terminal 6 as output of burst waveform generator
Is done.

FIG. 5A shows an output waveform of the burst waveform generator when the ramp control is not performed.
By performing the above-described ramp control, the output waveform of the burst waveform generator as shown in FIG. 5 (b) is obtained. From these figures, the rise and fall of the burst become smooth by the above-described ramp control. You can see that there is.

As described above, according to the third embodiment,
In the ramp control circuit 3, instead of multiplying the window function using the multiplier, the ramp control is performed by changing the amplitude level by bit-shifting the waveform data. This has the effect of reducing the circuit scale.

[0022]

According to the present invention, as is apparent from the above embodiment , a plurality of bit shift circuits and an adder are used in a ramp control circuit instead of multiplying a window function using a multiplier .
Or with a subtractor and combine these
The amplitude of the waveform data by M / 2 ^k (M, k: integer) times
Controlled, because by changing the width level vibration is performed lamp control, multiplier is not required, but can be realized an excellent burst waveform generator can reduce power consumption and circuit scale.

[Brief description of the drawings]

FIG. 1 is a block diagram of a burst waveform generator according to each embodiment of the present invention.

FIG. 2 is a block diagram of a lamp control circuit used in the first embodiment of the present invention.

FIG. 3 is a block diagram of a lamp control circuit used in a second embodiment of the present invention.

FIG. 4 is a block diagram of a lamp control circuit used in a third embodiment of the present invention.

FIG. 5 (a) is a schematic output waveform diagram of a burst waveform generating device when ramp control is not performed in each embodiment of the present invention. (B) Burst waveform when ramp control is performed in each embodiment of the present invention. Schematic output waveform diagram of the generator

FIG. 6 is a block diagram of a conventional burst waveform generator.

7A is a schematic output waveform diagram when ramp control is not performed in a conventional burst waveform generator. FIG. 7B is a schematic output waveform diagram of a window function. Output waveform diagram

[Explanation of symbols]

 Reference Signs List 1 input terminal 2 waveform data generation circuit 3 ramp control circuit 4 D / A converter 5 post filter 6 output terminal 7, 10, 13 first bit shift circuit 8, 11, 14 second bit shift circuit 15 third Bit shift circuit 16 Fourth bit shift circuit 9, 17, 18 Adder 12, 19 Subtractor

──────────────────────────────────────────────────続 き Continuation of the front page (72) Inventor Kazuhiro Umezu 3-1 Tsunashima Higashi 4-chome, Kohoku-ku, Yokohama-shi, Kanagawa Prefecture Inside Matsushita Communication Industrial Co., Ltd. (56) References JP-A-3-213029 (JP, A) JP-A-2-207620 (JP, A) JP-A-2-20911 (JP, A) JP-A-6-296183 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) ) H04L 27/00-27/38

Claims (3)

(57) [Claims] 1. A waveform data generation circuit connected to an input terminal for outputting digital waveform data corresponding to digital data to be transmitted, and a bit shift is performed on an output of the waveform data generation circuit to change an amplitude level and thereby a ramp is generated. A lamp control circuit for performing control, a D / A converter for converting digital data output from the lamp control circuit into an analog sampled signal, and a post filter for smoothing an output waveform of the D / A converter. a burst waveform generating equipment provided with the lamp control circuit, parallel to the output of the waveform data generating circuit
The first, second,..., Nth bit shift circuits connected to the column
, The outputs of the first, second,..., Nth bit shift circuits
And an adder for adding
M / 2 ^k (M, k: positive integer) for input waveform data
Burst waveform generator characterized by amplitude control
Place. 2. A digital device connected to an input terminal and to be transmitted.
Output digital waveform data for total data
Waveform data generation circuit and output of the waveform data generation circuit
Bit shift to change the amplitude level and ramp
A lamp control circuit for performing control, and an output of the lamp control circuit.
Digital data as power is converted into an analog sampled value signal.
D / A converter for conversion and output waveform of the D / A converter
Burst waveform with post filter for smoothing
A generator, the lamp control circuit, the first, second is connected in parallel to the output of the waveform data generation circuit, ..., and a bit shift circuit of the N, the output of the first bit shift circuit From 2nd to 2nd
3,... For subtracting the output of the Nth bit shift circuit
Of a subtractor, before SL ^{M / 2 k (M, k} : positive integer) output to the input waveform data of the subtracter Ru is amplitude controlled
Burst waveform generator, characterized in that. 3. A digital device connected to an input terminal and to be transmitted.
Output digital waveform data for total data
Waveform data generation circuit and output of the waveform data generation circuit
Bit shift to change the amplitude level and ramp
A lamp control circuit for performing control, and an output of the lamp control circuit.
Digital data as power is converted into an analog sampled value signal.
D / A converter for conversion and output waveform of the D / A converter
Burst waveform with post filter for smoothing
A generator, the lamp control circuit, the first are connected in parallel to the output of the waveform data generating circuit, second, ..., and a bit shift circuit of the N, the first, second, ..., a I (1 <I <N, I: positive
First for adding the output of the bit shift circuit of integer>
And adder, before Symbol I + 1, ..., bit shift circuit of the first N
A second adder for adding the outputs of the first and second outputs.
Subtraction for subtracting the output of the second adder from the output of the arithmetic unit
A adder, the subtracter ^{M / 2 k (M, k} : positive integer) output to the input waveform data of the amplitude-controlled Rukoto
Burst waveform generator according to claim.