JP3238246B2 - Semiconductor wafer inspection repair device and burn-in inspection device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an inspection / repair apparatus and a burn-in inspection apparatus capable of performing a burn-in inspection of a semiconductor chip in a state of a semiconductor wafer.

[0002]

2. Description of the Related Art As a final step of a semiconductor manufacturing process,
A plurality of inspection processes are required to prevent defective chips from being distributed to the user. A typical example of this type of inspection process is a probe inspection. This probe inspection is to provide a probe needle that contacts all the electrode pads for one chip of a large number of semiconductor chips existing on a semiconductor wafer, send a signal pattern to the semiconductor chip, and monitor the output of the semiconductor chip. Inspection of the electrical characteristics of In this probe inspection apparatus, in order to inspect all the chips on the semiconductor wafer, it is necessary to repeat the vertical movement of the wafer chuck mounting the semiconductor wafer and the step movement of one chip every time the inspection of one chip is completed. there were. In addition, as a final step of the semiconductor manufacturing process, in addition to the probe inspection, it is necessary to perform marking by a method such as an ink method on a defective chip determined to be defective by the inspection, or a repair step of repairing a repairable defective chip. Implemented and as a final inspection process,
There is a demand for visual appearance inspection by enlarging a semiconductor chip on a semiconductor wafer. There has been proposed an apparatus for performing various inspections and repairs of this kind in an in-line system.

One of the methods is disclosed in Japanese Patent Laid-Open No. 26525/1990.
As shown in Japanese Patent Application Publication No. 5 (1999) -2005, a plurality of inspection sections and repair sections are arranged on both sides or one side of a linear transport path for transporting a cassette loaded with a plurality of semiconductor wafers. The cassette is transported and supplied.

[0004] Another method is disclosed in Japanese Patent Laid-Open No. 4-13985.
As disclosed in Japanese Patent Application Publication No. 1-2003, a plurality of inspection sections and repair sections are arranged on both sides or one side of a rotary transfer path for transferring semiconductor wafers, and one semiconductor wafer is transferred to each inspection section and repair section one by one. Supply.

The above two methods differ depending on whether a cassette is transported or a semiconductor wafer is transported.
The inspection / replacement is performed by replacing the so-called cluster tool system of the rotary transfer type disclosed in Japanese Patent No.
It can be understood that it is applied to a repair device.

As a final inspection of a semiconductor manufacturing process, there is a so-called burn-in inspection other than the above-described probe inspection. This burn-in test is to perform a device driving state close to an actual driving state in a state in which a temperature stress and / or a voltage stress is applied to a semiconductor chip, thereby trying to find a chip that causes an initial failure beforehand. It is. Conventionally, the burn-in inspection is not performed on semiconductor chips on a semiconductor wafer, but is performed on a packaged semiconductor device after the semiconductor wafer is cut for each chip.

[0007]

The significance of the burn-in inspection of a semiconductor device is to remove a device having an inherent defect and a potential defect by applying a temperature stress or a voltage stress. Even so, it has been almost impossible to repair the semiconductor device after being packaged. As described above, the semiconductor device determined to be defective by the burn-in inspection has to be discarded, and is wasteful in terms of time and economy. Therefore, it is desired to perform this kind of burn-in inspection in a state of a semiconductor wafer.

The biggest problem in performing a burn-in inspection of a semiconductor chip in a semiconductor wafer state, not in a semiconductor device state, is a screening test for finding a semiconductor chip that causes an initial failure in the burn-in inspection. The time required for the burn-in inspection of the chip is longer than that required for the probe inspection. For example, 1
Taking a semiconductor chip of M DRAM as an example, 1024
It is necessary to supply signals sequentially to the word lines, and
In order to find a gate oxide film defect due to stress, it takes a considerable amount of time to inspect each word.
It took approximately 24 hours to perform a burn-in test on the entire M DRAM chip.

Even if the burn-in inspection time is shortened by a device such as a wiring line, there are the following problems in applying the above-described two in-line systems to the burn-in inspection.

For example, if the burn-in inspection is included in the in-line apparatus disclosed in Japanese Patent Application Laid-Open No. 2-265255, the occupancy time of one inspection unit is determined by completing the inspection of all the semiconductor wafers in the loaded cassette. In other words, the semiconductor wafer group is occupied until the inspection of the semiconductor wafer group in units of one lot is completed. In particular, even if another identical inspection section becomes empty, it is impossible to carry an uninspected semiconductor wafer into another empty inspection section. Therefore, the operation rate of the entire apparatus is reduced, and high throughput cannot be expected.

On the other hand, if the burn-in inspection device is applied to the in-line device disclosed in Japanese Patent Application Laid-Open No. 4-139851, the above-mentioned problem can be solved. However, each of the two in-line devices described above is only a probe inspection device or other inspection device that is a finished product arranged on both sides or one side of a linear robot conveyance device, and each inspection unit has a semiconductor device. Every time a wafer is loaded, the same operation, for example, pre-alignment or the like is repeatedly performed.

It is an object of the present invention to solve the above-mentioned conventional problems and to enable a burn-in inspection of a semiconductor chip in a state of a semiconductor wafer, and to perform the same inspection item or another inspection item. An object of the present invention is to provide a semiconductor wafer inspection / repair apparatus and a burn-in inspection apparatus capable of efficiently performing a repair process and the like in an in-line system.

[0013]

According to the present invention, there is provided a semiconductor wafer inspection / repair apparatus, comprising: transport means for transporting a semiconductor wafer having a large number of semiconductor chips formed thereon along a linear transport path; After the alignment, a supply unit that supplies the semiconductor wafer to the transfer unit on the linear transfer path, and is arranged along the linear transfer path,
A plurality of inspection units each performing a plurality of inspection items including a burn-in inspection of the semiconductor chip on the semiconductor wafer transferred from the transfer means, and arranged along the linear transfer path and transferred from the transfer means; And a repair unit for repairing the semiconductor chip determined to be defective at least during a burn-in test or a subsequent test among the semiconductor chips on the semiconductor wafer, wherein the burn-in test unit includes the semiconductor wafer. A wafer chuck having a function of heating and / or cooling the semiconductor wafer; a fine alignment unit for finely aligning the semiconductor wafer on the wafer chuck; A contact portion for simultaneously contacting electrode pads of a semiconductor chip group; Conducting the isolation portion, characterized in that it comprises a tester for burn-in test of said semiconductor chip in a state where plus temperature and / or voltage stress, the.

[0014] The burn-in inspection apparatus according to the present invention comprises a transfer means for transferring a semiconductor wafer on which a large number of semiconductor chips are formed along a linear transfer path; A supply unit that supplies the transfer means on the transfer path; and a burn-in inspection unit that is provided along the linear transfer path and that performs a burn-in inspection on the semiconductor chips on the semiconductor wafer transferred from the transfer means. The burn-in inspection unit includes a wafer chuck having a function of heating and / or cooling the semiconductor wafer, a fine alignment unit that finely aligns the semiconductor wafer on the wafer chuck, and an entire area on the semiconductor wafer. At the same time on the electrode pads of the semiconductor chip group A contact portion for tact, electrically connected to the contact portion, characterized in that it comprises a tester for burn-in test of said semiconductor chip in a state where plus temperature and / or voltage stress, the.

[0015]

According to the present invention, in the supply means for supplying a semiconductor wafer to the linear transport path, the semiconductor wafers are pre-aligned collectively before the supply. It is necessary to perform realignment at the burn-in inspection unit or another inspection unit or repair unit arranged along the straight transport path. In each of these locations, only fine alignment may be performed, and a mechanism for pre-alignment may be used. And the time required for fine alignment can be shortened because pre-alignment is performed collectively in advance.

After the pre-aligned semiconductor wafer is supplied to the transfer means on the linear transfer path via the supply means, the semiconductor wafer is arranged along the transfer path by the transfer means in accordance with a predetermined inspection procedure. Semiconductor wafers are sequentially loaded and unloaded to a plurality of types of inspection units and repair units or to a plurality of burn-in inspection units. Here, in order to perform a plurality of inspections and repairs in-line, it is necessary to reduce the inspection time required by the burn-in inspection unit. Therefore, in the present invention, the burn-in inspection section includes a contact section that simultaneously contacts the electrode pads of the semiconductor chip group in the entire area on one semiconductor wafer or in the divided area divided into planes.
Therefore, the number of times of step driving of the wafer chuck is reduced as compared with the case of contacting the electrode pad of one semiconductor chip, or this step driving is not required during the inspection, so that the inspection time can be shortened accordingly. it can.

Further, according to the semiconductor wafer inspection / repair apparatus of the present invention, the semiconductor wafer having the semiconductor chip determined to be defective after the burn-in inspection is carried into the repair unit, and the repairable defective chip is repaired. Will be. Therefore, as compared with the conventional burn-in inspection performed after packaging, a defective chip which had to be discarded can be repaired as a non-defective product, so that the yield of the final product can be improved.

According to the burn-in inspection apparatus according to the present invention, after the pre-aligned semiconductor wafer is supplied to the transport means on the linear transport path via the supply means, a plurality of burn-in devices arranged along the linear transport path are provided. The semiconductor wafers are sequentially loaded into the inspection unit. Each burn-in inspection unit performs a burn-in inspection on a single wafer basis. However, the entire apparatus of the present invention can perform a burn-in inspection on a plurality of semiconductor wafers intensively and efficiently in an in-line system.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the semiconductor wafer inspection / repair apparatus according to the present invention will be specifically described below with reference to the drawings.

The outline of the entire configuration of the apparatus First, an overall summary of the present embodiment apparatus will be described with reference to FIGS.

FIG. 1 is a schematic plan view of the apparatus of this embodiment, showing an example of a layout of an inspection section and a repair section. In the figure, substantially on the center line of the base 10,
A transfer path 30 for transferring the semiconductor wafer 1 is provided, and a loader section 20 is provided at one end thereof.
For example, various inspection units and repair units are provided on both sides of the “0”.

In the upper area facing the base 10, a downflow section for downflowing clean air toward the transport path 30, various inspection sections and a repair section is provided to take measures against dust generation.

The loader unit 20 includes, for example, four cassettes 2
Each cassette 22 has, for example, 25 semiconductor wafers 1 mounted thereon. A transport path 24 is arranged over the arrangement width of the four cassettes 22, and the transport path 2
The transfer unit 200 is provided so as to be movable along 4. A pre-alignment unit 26 is provided at a position facing the four cassettes 22 with the transport path 24 interposed therebetween and on a line extended from the transport path 30. The pre-alignment unit 26 has a chuck 28a on which the semiconductor wafer 1 can be mounted, and, for example, three push-up pins 28b that can freely protrude and retract from the surface of the chuck 28a. The chuck 28a is movable in the directions of arrows X, Y and θ in FIG. Under the control of the pre-alignment control unit 105, the semiconductor wafer 1 on the chuck 28a is pre-aligned. At this time, the positioning of the orientation flat 1a of the semiconductor wafer 1 is also performed. Further, an ID detection unit 106 for detecting ID information of the semiconductor wafer 1 on the chuck 28a is provided. Characters or barcodes are attached to the semiconductor wafer 1 as ID information, and the ID detection unit 106 optically detects the ID information, for example.

In one row parallel to the transport path 30, for example, three burn-in inspection sections 4 are provided as inspection sections and repair sections for semiconductor wafers disposed on both sides of the transport path 30.
Zero and three probe inspection units 50 are arranged. A repair section 60 including a laser repair section 62 and a deposition repair section 64 is provided in the other row parallel to the transport path 30.
, A marking unit 70, a baking unit 80, and, for example, two visual inspection units 90.

The burn-in inspection section 40 performs a burn-in inspection on the semiconductor chips on the semiconductor wafer 1 in a state where the temperature stress and / or the voltage stress is applied, and the probe inspection section 50 does not apply the above-mentioned respective stresses. In this state, the electrical characteristics of the semiconductor chip are inspected. In the present embodiment, the burn-in inspection unit 4
Since 0 and the probe inspection unit 50 require a longer inspection time than other inspection units, a number of burn-in inspection units 40 and probe inspection units 50 are arranged in proportion to the inspection time. If more time is required for burn-in inspection than for probe inspection, the burn-in inspection unit 40
May be added. Conversely, if the probe test requires more time than the burn-in test,
The probe inspection unit 50 can be added.

One of the laser repair sections 62 of the repair sections 60 is used, for example, when the probe inspection section 50 determines that a pattern short has occurred in the semiconductor chip.
The pattern short is melted and repaired by laser light. The other deposition repair section 64 of the repair section 60 is for generating and repairing a deposition film in the pattern open section when a pattern open has occurred in the semiconductor chip in the probe inspection section 50.

The marking section 70 is for marking a defective chip that cannot be repaired by both the laser repair section 62 and the devotion repair section 64 by, for example, inking or scratching.

The baking section 80 is necessary when the marking section 70 is of the ink marker type, and dries the ink discharged onto the defective chip by baking.

The visual inspection section 90 performs a visual inspection of the appearance of each semiconductor chip 2 on the semiconductor wafer 1 using a microscope or a TV monitor. The visual inspection unit 90 is used as a final inspection item of the apparatus according to the present embodiment, and is also used as the burn-in inspection unit 40 or the probe inspection unit 5.
It can also be used for visual inspection after the end of the inspection at 0.

FIG. 2 shows a control system of the apparatus of this embodiment. The CPU 100 controls the operation of the apparatus of the present embodiment, and includes a storage unit 102 having a built-in ROM and RAM.
In addition to the above-described various inspection units and repair units 50 to 90, the pre-alignment control unit 105, and the ID detection unit 106, the following various control units are connected to the bus line. . The loader control unit 104 controls the rotation of the entire unit of the delivery unit 200 moving along the transport path 24 in the loader unit 20, the rotation drive in the θ direction, the lifting / lowering drive, and the advance / retreat drive of the tweezers. The drive control of the push-up pin 28b which goes up and down is performed. The transport control unit 108 controls the rotation of the entire unit of the transport unit 300 that moves along the transport path 30 in the θ direction, the ascent / descent drive, and the tweezers advance / reverse drive, and also controls the drive of the transport unit 300 along the transport path 30. Do.

Inspection and inspection of a semiconductor wafer having the above configuration
The operation of the entire repair device will be described with reference to the flowchart shown in FIG.

First, one semiconductor wafer 1 is unloaded from the loader unit 20 to the transfer unit 300 on the transfer path 30 (step 110). For this purpose, the CPU 100
Sends a command to the loader control unit 104, and the delivery unit 200 controlled by the loader control unit 104 is stopped at a position facing one cassette 22. Then, one semiconductor wafer 1 is taken out of the cassette 22 by the forward drive, the upward drive, and the backward drive of the tweezers of the delivery unit 200. Further, the delivery unit 2
00 is rotated 180 °, and 1
The semiconductor wafers 1 are placed on the three push-up pins 28b on the chuck 28a. Thereafter, as the push-up pins 28b are lowered, one semiconductor wafer 1 is placed on the chuck 28a. Then, the pre-alignment of the semiconductor wafer 1 is performed on the semiconductor wafer 1 placed on the chuck 28 a according to the drive control of the pre-alignment control unit 105. Further, the ID detection unit 106
Thus, the ID information given on the semiconductor wafer 1 is detected.

In the apparatus of this embodiment, fine alignment is individually performed in each inspection section or repair section after being carried out from the loader section 20. To perform pre-alignment. As described above, by performing the pre-alignment collectively in the loader unit 20, the alignment time in each inspection unit or the repair unit can be reduced, and compared with the case where the pre-alignment unit is provided in each inspection unit and the repair unit. Thus, the number of members can be significantly reduced.

Thereafter, the push-up pin 28b is driven to protrude from the chuck 28a, and further, the pre-aligned single semiconductor wafer 1 is driven by the forward drive, the upward drive and the reverse drive of the tweezers of the transport unit 300 on the transport path 30. It is delivered from the loader unit 20 to the transport unit 300.

Thereafter, the CPU 100 gives a command for carrying in one semiconductor wafer 1 to the transfer control unit 108 to, for example, the burn-in inspection unit 40 for executing the first inspection item (step 112). Transport control unit 108
By controlling the stop position of the transport unit 300 on the transport path 30 and controlling the driving of the tweezers in the unit 300, one of the three burn-in inspectors 40 is placed in the empty burn-in inspector 40. The semiconductor wafers 1 are carried in. At this time, a transfer unit 200 having the same configuration as that in the loader unit 20 is provided between the transport unit 300 and the burn-in inspection unit 40.
The semiconductor wafer 1 can be carried in through the line 00. By doing so, the operation rate of the transport unit 300 can be increased, and the driving stroke of the tweezers in the unit 300 can be shortened.

The CPU 100 repeats the above steps 110 and 112 so that the semiconductor wafer 1 can be loaded into the remaining two burn-in inspection units 40 with a time lag.

Here, in order to smoothly execute the visual inspection, which is the final inspection item from the burn-in inspection, in an in-line system, even if a plurality of burn-in inspection units 40 are provided, the first burn-in inspection unit 40 Inspection time must be reduced. In the present embodiment, when performing the burn-in inspection in the burn-in inspection unit 40, the burn-in inspection unit 40 is configured to contact not only a single semiconductor chip on the semiconductor wafer 1 but all the semiconductor chips on the semiconductor wafer 1. ing. In this embodiment, the burn-in test can be performed in the state of the semiconductor wafer instead of the packaged state as in the conventional burn-in test. For example, a dedicated test electrode is provided on the semiconductor wafer. The aim is to reduce the time required for burn-in inspection. In this way, for example, 8
The time required to perform a burn-in test on all 1M DRAMs formed on an inch semiconductor wafer is reduced to about one and a half hours.

In this embodiment, three burn-in inspection units 4
Since the semiconductor wafers 1 are carried in at time intervals of 0, respectively, the burn-in inspection for the semiconductor wafer 1 carried in first is completed by a certain burn-in inspection unit 40. When the burn-in inspection is completed, the CPU 100 transfers the semiconductor wafer 1 for which the burn-in inspection has been completed to the visual inspection unit 90 (step 114).
In the visual inspection section 90, after finely aligning the loaded semiconductor wafer 1, the semiconductor chips on the semiconductor wafer 1 are visually inspected by enlarging them with a microscope, or an enlarged image of the semiconductor chips is displayed on a TV monitor. And display it for visual inspection. Here, when the presence of a defective chip is detected by the visual inspection, the operator can input the information through an input unit provided in the visual inspection unit 90. The information on the defective chip is stored in the storage unit 102 via the CPU 100 in association with the ID information of the wafer 1. Here, as described later, the transport unit 300 has upper and lower tweezers. Therefore, when the transport unit 300 moves to the burn-in inspection unit 40 where the burn-in inspection has been completed, the uninspected semiconductor wafer 1 delivered from the loader unit 20 can be mounted on the upper tweezers, for example. Then, immediately after receiving the semiconductor wafer 1 after the inspection from the burn-in inspection unit 40 on the vacant lower tweezers on the empty lower tweezers, the transport unit 300 removes the untested semiconductor wafer 1 on the upper tweezers, It can be carried into the burn-in inspection unit 40.

Next, the CPU 100 executes the visual inspection section 9.
By controlling the transfer control unit 108 and the transfer control unit 108, one semiconductor wafer 1 on which the visual inspection has been completed is controlled to be transferred to the probe inspection unit 50 that performs the next inspection item (step 116). The transport unit 300 driven and controlled by the transport control 108 is moved to a position facing one of the probe inspection units 50 in an empty state, and thereafter, the semiconductor wafer 1 is received by the probe inspection unit 50 by drive control of tweezers. Will pass.

In the probe inspection section 50, as is well known,
By contacting the electrode pads of the semiconductor chip on the semiconductor wafer 1 and monitoring the output of the input signal given from the tester by the tester, the electrical characteristics of the semiconductor chip under a stress-free state such as burn-in can be improved. Will be inspected. In this probe inspection, a short circuit or an open of a pattern in a semiconductor chip is also inspected.
This inspection result is stored in the storage unit 102 via the CPU 100.

When the probe inspection in the probe inspection section 50 is completed, the CPU 100 controls the transfer of the semiconductor wafer 1 to the visual inspection section 90 again, and the semiconductor chip after the probe inspection is inspected (step 118). ).
Here, when a defective chip is detected, information on the defective chip is input via the input unit in the same manner as described above.

Next, the CPU 100 executes steps 112 to 1
In each of the inspection steps 18, it is determined whether or not any of the semiconductor chips on the semiconductor wafer 1 has a defect (step 120). If there is a defective chip, then C
The PU 100 determines whether or not the failure content can be repaired by the laser repair unit 62 or the deposition repair unit 64 (Step 122). Step 12
If it is determined that repair is possible in step 2, the CPU
100 can then be repaired by laser repair,
In other words, it is determined whether a pattern short exists in the semiconductor chip (step 124). If the content of the defect is a pattern short, the CPU 100 carries the semiconductor wafer 1 into the laser repair section 62 and melts and repairs the pattern short section with a laser beam (step 126). After step 126 is completed, or when the determination in step 124 is NO, C
The PU 100 determines whether the defect content can be repaired by deposition repair, in other words, whether a pattern open has occurred in the semiconductor chip (step 128). If a pattern open has occurred,
CPU 100 carries semiconductor wafer 1 into deposition repair section 64 and repairs the pattern open section by film formation (step 130).

As described above, according to the apparatus of the present embodiment, the burn-in inspection is performed in the state of the semiconductor wafer, and the inherent defects and
A semiconductor chip with a potential defect can be detected in advance. In addition, the semiconductor wafer 1 on which the defective chip is mounted is carried into the repair unit 60 in an in-line manner, and the repairable defective chip is repaired, so that the final yield can be greatly improved.

When the repair is performed in the laser repair section 62 and / or the deposition repair section 64 as described above, the flow returns to step 116 to perform the probe test again. If there is an unrepairable defective chip in step 122 after the end of the first or second probe inspection, CPU 100 then transports the semiconductor wafer 1 to marking section 70 ( Step 132). In this marking part 70,
Under the control of the CPU 100, based on the address information on the presence of the defective chip, for example, ink is ejected onto the defective chip to mark it as a defective chip. After the marking on the defective chip is completed, the CPU 100
Transports the semiconductor wafer 1 to the baking unit 80,
The ink discharged on the defective chip is dried by baking (step 134). This baking part 80
As is well known, the semiconductor wafer 1 is placed on, for example, a hot plate, and ink of defective chips on the semiconductor wafer 1 is dried via the hot plate.

After the baking process in step 134 is completed, or when it is determined in step 120 that there is no defective chip after the probe test, the CPU
Next, 100 carries the semiconductor wafer 1 into the visual inspection unit 90 and performs a final appearance inspection (step 1).
36). After the final visual inspection is completed, the CPU
100 transfers the semiconductor wafer 1 to the transfer unit 300,
Chuck 28a in loader unit 20, delivery unit 200
And is transported back into the original cassette 22 (step 138).

In this manner, a series of processes from the burn-in inspection process to the visual inspection process and the repair process between the burn-in inspection process and the repair process for one semiconductor wafer 1 are performed in an in-line manner. Further, after the processing is completed in a certain inspection unit or repair unit, the CPU 100 receives a semiconductor wafer from the inspection unit or repair unit, and at the same time, carries in a new semiconductor wafer 1 and repeats this. By doing so, the above-described inline processing can be repeatedly performed on all the semiconductor wafers 1 in the four cassettes 22 mounted in the loader unit 20.

The burn-in inspection unit and the probe inspection unit
In order to carry out the burn-in inspection and the probe inspection efficiently in an in-line system, it is preferable to suitably employ the structure of the probe device disclosed in the previous patent application (Japanese Patent Application No. 4-226378) filed by the present applicant. it can. This structure is shown in FIGS. Each drawing shows a common structure as the burn-in inspection unit 40 and the probe inspection unit 50. When these are used as the burn-in inspection unit 40, a heating or cooling mechanism is mounted in the wafer chuck 402 shown in each drawing. Test head 440
However, the input signal specific to the burn-in inspection may be given to each semiconductor chip on the semiconductor wafer 1 and the output signal may be monitored. The connection unit 42 on the back side of the probe card 420
A heating or cooling mechanism may be mounted in 8.

As a common configuration of the burn-in inspection section 40 and the probe inspection section 50, a wafer chuck 402 on which the semiconductor wafer 1 can be mounted and fixed by, for example, a vacuum suction method is provided in the housing 400. When configuring the burn-in inspection unit 40, the wafer chuck 40
2 may be, for example, a hot chuck. Below this wafer chuck 402, there is provided a rotation mechanism 404 for driving the wafer chuck 402 to rotate around a vertical axis,
Below the rotating mechanism 404, an elevating mechanism 406 that drives the rotating mechanism 404 up and down is provided.

Below the elevating mechanism 406, there are provided an X-direction fine movement mechanism 408 and a Y-direction fine movement mechanism 410 for finely moving the wafer chuck 402 by a few semiconductor chips in the X and Y directions, respectively. These fine movement mechanisms 40
For 8,410, for example, a mechanism using a ball screw or a piezo element can be used. In this embodiment, the X-direction fine movement mechanism 408, the Y-direction fine movement mechanism 410, and the rotation mechanism 404 constitute a fine alignment mechanism for finely aligning the position of the semiconductor wafer 1 in the plane.

A probe card 420 is supported above the wafer chuck 402. The probe card 420 is supported by an insert ring 430 attached to the housing 400. This probe card 4
A surface 422 made of an elastic material is provided on the surface side of the surface 20, and a large number of conductive protrusions 424 projecting below the surface are formed on the surface 422. The conductive protrusions 424 are arranged by the number corresponding to the total number of electrode pads of all the semiconductor chips existing on the semiconductor wafer 1. Therefore, by raising the wafer chuck 402 on which the semiconductor wafer 1 is mounted, all the electrode pads of all the semiconductor chips existing on the semiconductor wafer 1 become
The conductive protrusions 424 of the probe card 420 are collectively contacted. Also, even if the semiconductor wafer 1 or the probe card 420 is tilted or bent, the elastic deformation of the planar body 422 itself made of an elastic body absorbs the variation in the height direction, thereby enabling the collective contact.

On the rear surface of the probe card 420, a connection unit 428 having electrodes electrically connected to all the conductive protrusions 424 is mounted. In addition, a test head 440 is arranged on the upper part of the housing 400 so as to face the connection unit 428. The test head 440 has a built-in tester, and has many pogo pins 426 connected to signal lines in the test head 440, respectively.
Each of the pogo pins 426 is constantly urged to move in the protruding direction. Then, each pogo pin 426 is connected to the connection unit 42.
By making elastic contact with the eight electrodes, the test head 440 and the conductive protrusions 424 of the probe card 420 are brought into conduction. When this apparatus is used as the burn-in inspection unit 40, a heating or cooling mechanism is mounted in the connection unit 428, and the conductive protrusions 424 of the probe card 420 that comes into contact with the semiconductor wafer 1 are heated or cooled. The temperature can be set to be substantially the same as the cooling temperature.

The wafer chuck 402 and the probe card 4
A cylindrical fine alignment detecting section 450 is provided between the moving section 20 and the movable section 20. Both ends of the fine alignment detecting section 450 are guided by two guide rails 460, 460 installed inside the upper wall of the housing 400. As a result, the fine alignment detecting section 450 can be retreated to a region below the conductive protrusions 424 and outside the elevating region of the wafer chuck 402.

This fine alignment detecting section 450
Are opening portions 450a, 45
0b. Further, the fine alignment detecting section 450 has a TV camera 45 at one end in the longitudinal direction.
2, a half mirror 454 is disposed at an intermediate portion, and a total reflection mirror 456 is disposed at the other end. The half mirror 454 is mounted on the moving unit 458. By moving the moving unit 458 along the longitudinal direction of the fine alignment detecting unit 450, the half mirror 45 is moved.
4 is movable over a range from one end to the other end of each row of semiconductor chips arranged on the semiconductor wafer 1.

Next, the burn-in inspection unit 4 having the above-described structure.
The operation of 0 will be described. As described above, one semiconductor wafer 1 is supplied to the burn-in inspection unit 40 via the transfer unit 300 and the delivery unit 200.
Will be carried in. The semiconductor wafer 1 is placed on the wafer chuck 402 by the tweezers drive of the delivery unit 200. Note that the wafer chuck 402 has, for example, three push-up pins (not shown) so as to be able to protrude and retract, and after supporting the semiconductor wafer 1 on the tweezers of the delivery unit 200 on the three push-up pins. The semiconductor wafer 1 is driven by the lowering of the pins.
Can be placed on the wafer chuck 402. Since the wafer chuck 402 is formed of a hot chuck, the semiconductor wafer 1 formed of a silicon substrate having good thermal conductivity can be heated to a predetermined temperature, for example, 125 ° C. in a relatively short time.

On this semiconductor wafer 1, for example, several hundred 8 mm × 12 mm semiconductor chips provided with 32 electrode pads are formed. In order to accurately contact the electrode pads of all the semiconductor chips on the semiconductor wafer 1 with the conductive protrusions 424 of the probe card 420, the X, Y of the semiconductor chips on the semiconductor wafer 1 with respect to the conductive protrusions 424 of the probe card 420 , Θ direction.

For this purpose, a fine alignment detecting section 450 is set at a position between the probe card 420 and the semiconductor wafer 1. The X-direction fine movement mechanism 408, the Y-direction fine movement mechanism 410, and the rotation mechanism 404 are driven by the TV camera 452 in the fine alignment detection section 450 while observing the conductive protrusions 424 and the image of the surface of the semiconductor wafer 1. In addition, it is possible to position the semiconductor chip with respect to the conductive protrusion 424 in the X, Y, and θ directions.

The image of the conductive protrusion 424 is taken in from the opening 450 a on the upper side of the fine alignment detecting section 450, reflected by the half mirror 454, and
An image is taken by the V camera 452. On the other hand, semiconductor wafer 1
The upper image is taken in from the opening 450b on the lower side of the fine alignment detecting section 450. Then, this image is reflected by the half mirror 454 at 90 ° toward the total reflection mirror 456, and then reflected by the total reflection mirror 456.
, Are transmitted through the half mirror 454, and imaged by the TV camera 452.

At this time, the half mirror 454 is moved
By moving the fine alignment detection section 450 in the Y direction by moving the fine alignment detection section 450 in the Y direction, it is possible to capture an image of any of the semiconductor chips in the entire area on the semiconductor wafer 1.

After the above fine alignment is completed, the fine alignment detecting section 450 is retracted from the area below the probe card 420. Thereafter, the wafer chuck 402 is raised by the lifting mechanism 406, and the electrode pads of all the semiconductor chips on the semiconductor wafer 1 are removed.
The conductive protrusions 424 of the probe card 420 are collectively contacted. Thereafter, a known burn-in test, that is, a dynamic burn-in test, a static burn-in test, a monitor burn-in test, or the like can be performed on all the semiconductor chips on the semiconductor wafer 1. At this time, the arrangement pattern on the semiconductor wafer 1 can be configured so that the voltage stress is applied to all the semiconductor chips on the semiconductor wafer 1 at the same time. In this case, the processing time of the burn-in inspection can be reduced. Can be greatly reduced.

Further, if the above structure is used, the probe inspection by the probe inspection section 50 can be performed in a state where all the semiconductor chips on the semiconductor wafer 1 are collectively contacted and a temperature stress and a voltage stress are not applied. Well-known probing tests can be performed.

As described above, according to the above-described burn-in inspection and probe inspection, the inspection can be performed in a state where the semiconductor chip 1 is in contact with the electrode pads of all the semiconductor chips, so that each semiconductor chip is measured. It is not necessary to move the wafer chuck 402 up and down and step by step each time, and the inspection time can be shortened by the amount that the moving time can be omitted, and high throughput can be achieved. Further, as described above, alignment can be performed only by finely moving the wafer chuck 402 in the X and Y directions, so that the burn-in inspection unit 40 and the probe inspection unit 50 can be reduced in size.

The data on the defective chip obtained by the burn-in inspection and the probe inspection is stored in the CPU 1.
00 in the storage unit 102 via the bus line 00.
The information is stored in association with the D information, and is subjected to the repair operation in the repair unit 60 described above, and the unrepairable defective chip is provided as the marking information in the marking unit 70 described above.

Next, a modified example of the burn-in inspection section 40 and the probe inspection section 50 will be described with reference to FIG.

In this embodiment, on the semiconductor wafer 1,
Of the semiconductor chips 1a arranged in the X and Y directions, for example, they are arranged corresponding to all the electrode pads of one row of semiconductor chips 2 (hatched portions) arranged in the Y direction, and are contacted collectively with these pads. A probe card 470 provided with a probe needle 472 is provided.

Below the wafer chuck 402, a rotating mechanism 404, a lifting mechanism 406, and a Y-direction fine movement mechanism 410 are provided as in the above embodiment. Below the Y direction fine movement mechanism 410, a moving mechanism 480 for moving the wafer chuck 402 in the X direction between the delivery area S1 of the semiconductor wafer 1 and the alignment area S2 is provided. The moving mechanism 480 includes a motor 482 and a ball screw 484 driven by the motor 482. In the embodiment shown in FIG. 6, the wafer chuck 402 is positioned in the delivery area S1, and the semiconductor wafer 1 is placed and fixed on the wafer chuck 402 at this position. Further, in the subsequent fine alignment of the semiconductor wafer 1, the wafer chuck 402 is set in the alignment region S2, and the position of the semiconductor wafer 1 is determined using the fine alignment detecting section 450 as in the above embodiment.

In the burn-in inspection and the probe inspection in the apparatus of this embodiment, the probe needles 472 formed on the probe card 470 are applied to all the electrode pads of the semiconductor chips 2 arranged in one row in the Y direction of the semiconductor wafer 1. Is performed by contacting all at once. Each time the inspection of one row of semiconductor chips 2 in the Y direction is completed,
By moving the wafer chuck 402 in the X direction by one chip of the semiconductor chip 2 by the moving mechanism 480 and repeating this, burn-in inspection or probe inspection can be performed on all the semiconductor chips 2 on the semiconductor wafer 1. .

According to this embodiment, it is necessary to move the semiconductor chips 2 by one step in the X direction every time the measurement of one row of semiconductor chips 2 in the Y direction is completed, as compared with the above-described batch contact method. Compared with the method in which the chip 2 is driven stepwise in the X and Y directions every time the measurement of each chip 2 is completed, the size of the device and the number of members can be reduced, and the inspection time is shortened.

Delivery unit 200 and transport unit 3
First, the configuration of the delivery unit 200 disposed in the loader unit 20 and at the preceding stage of each inspection unit and repair unit will be described with reference to FIG.

In the delivery unit 200, as shown in FIG. 7, a pair of articulated arms 202 and 204 are arranged so as to be inclined so that their movement planes intersect. And
An inclined portion 206a whose both ends are inclined at the same angle as the articulated arms 202 and 204, and a horizontal portion 206 formed between the inclined portions 206a.
b is provided. The inclined portions 206a and 206 of the arm connecting portion 206
“a” is rotatably supported by the moving ends of the pair of articulated arms 202 and 204.

Tweezers 208 are fixed on the arm connecting portion 206 along a direction perpendicular to the longitudinal direction of the arm connecting portion 206. This tweezers 20
Numeral 8 has vacuum suction portions 208a, 208a that can support the semiconductor wafer 1 at both ends by, for example, vacuum suction.

One articulated arm 202 is composed of a first arm 202a and a second arm 202b. Similarly, the other articulated arm 204 is composed of a first arm 204a and a second arm 204b. Have been. By making both ends of each arm freely rotatable, three joints (a,
b, c).

A base 210 for rotatably supporting the first arms 202a and 204a is provided.
A tweezers 2 is driven by rotating one of the first arms 202 by a motor 212 and a belt 214.
08 can be driven forward and backward. In addition, the base 210
Itself can be driven to rotate in the θ direction in FIG. 7, and
It can move up and down in the Z direction which is the height direction.

Delivery unit 2 arranged in loader section 20
Reference numeral 00 indicates that one semiconductor wafer 1 can be loaded into and unloaded from the cassette 22 by moving the tweezers 208 forward and backward and the whole unit up and down. Further, the above-described operation of the delivery unit 200 enables the delivery of the semiconductor wafer 1 to and from the chuck 28 a disposed in the loader unit 20.

Similarly, the delivery unit 200 disposed before each inspection unit and the repair unit also transfers the semiconductor wafer 1 between the transport unit 300 moving on the transport path 30 and each inspection unit and the repair unit. Is possible.

Next, the transport unit 300 will be described with reference to FIGS. This transport unit 300
As shown in FIG. 9, upper and lower tweezers 302,
304. These tweezers 302 and 304
Can move linearly along the transport path 30,
At the stop position, vertical movement and rotational driving are possible. The upper and lower tweezers 302 and 304 can be independently driven forward and backward.

The two tweezers 302 and 304 are formed as flat plates whose free ends are formed in a U-shape, and employ, for example, anodized aluminum impregnated with Teflon (trade name). I have.

Each of the tweezers 302 and 304 has first and second protrusions 306 and 308 projecting from the flat plate surface by a predetermined height, for example, 0.5 mm, at two U-shaped tip positions. . In addition, each tweezer 302, 30
On the center line of No. 4, the third protruding 0.5 mm from the flat plate surface
Are formed. Each projection 306, 3
The material of 08 and 310 is preferably Teflon (trade name) having low sliding resistance, and ceramic, Delrin or the like can be used.

The two tweezers 302 and 304 support the semiconductor wafer 1 at three points on the respective projections 306, 308 and 310, respectively. Each tweezer 302,3
In order to prevent the semiconductor wafer 1 from moving on the surface 04, a suction opening 312 is formed in the third projection 310 so that the semiconductor wafer 1 can be vacuum-sucked.

Motors 320, 320 for independently driving the upper and lower tweezers 302, 304 respectively.
(Only one of them is shown in FIG. 9). A first pulley 322 is fixed to an output shaft of the motor 320, and a second pulley 324 is rotatably supported diagonally above the first pulley 322. The first and second
The belt 326 is stretched between the pulleys 322 and 324.

As shown in FIG. 8, a third pulley 328, which is coaxial and rotatable integrally with the second pulley 320, is rotatably supported at one end of each of the tweezers 302, 304 in the forward and backward directions. . A fourth pulley 330 is rotatably supported on the other end of each of the tweezers 302 and 304 in the forward and backward directions. Then, the third and fourth pulleys 328, 3
A belt 332 is stretched between the thirty.

At the base end of each of the tweezers 302 and 304, there is provided a support arm 340 extending in different directions. The support arm 340 has a connecting portion 342, and the connecting portion 342 allows the tweezers 302,
304 and belts 332 and 332 are connected. Therefore, by independently driving the two motors 320, 320, the motor output is transmitted to the tweezers 302, 304 via the belts 326, 332, respectively.
Each of the tweezers 302 and 304 can be independently driven forward and backward.

According to the transport unit 300 having such a double tweezers structure, as described above, the inspection unit and the repair unit existing on both sides of the transport path 30
Processed semiconductor wafer 1 and new semiconductor wafer 1
Can be delivered immediately. For example, in a state where the new semiconductor wafer 1 supplied from the loader unit 20 is mounted on the upper tweezers 302, the transport unit 3 is located at a position facing the burn-in inspection unit 40 where the inspection is completed.
Move 00. Then, the burn-in inspection unit 40 receives the semiconductor wafer that has been inspected by the forward and backward driving of the lower tweezers 304, and then carries the new semiconductor wafer 1 into the burn-in inspection unit 40 by driving the upper tweezers 302. it can.

As described above, according to the apparatus of the present embodiment, the burn-in test for the semiconductor chip can be performed in the state of the semiconductor wafer instead of the conventional method of performing the burn-in test for the packaged semiconductor device. it can. Therefore, a defective chip that causes an initial failure can be detected in the state of the semiconductor wafer. Further, by performing the burn-in inspection and the subsequent repair process in an in-line manner, many defective chips having an initial failure can be repaired, and as a result, the overall yield can be improved. In particular, an element that is not packaged, for example, an element such as a chip used for bare chip mounting (COB) or a multi-chip module (MCM), can be subjected to an efficient burn-in inspection for the first time by the apparatus of this embodiment. Further, even if the semiconductor manufacturing process shifts to a cassette-less single-wafer processing due to an increase in the diameter of a semiconductor wafer in the future, even if the semiconductor manufacturing process shifts to cassette-less single-wafer processing, cassette-less inspection and repair are performed as a post-process of the semiconductor manufacturing process. It can correspond as a device which can do.

Next, an embodiment of the burn-in inspection apparatus according to the present invention will be described with reference to FIG.

The burn-in inspection apparatus is configured by arranging a plurality of, for example, six burn-in inspection units 40 on, for example, one side of the transport path 30 on the base 10. Other configurations,
That is, the loader unit 20, the transport unit 300 moving on the transport path 30, and the delivery unit 200 between the transport path 30 and the burn-in inspection unit 40 are the same as those in the above-described embodiment. Further, each burn-in inspection unit 40 is configured as shown in FIG.
Either the structure shown in FIG. 5 or the structure shown in FIG. 6 can be adopted.

In this embodiment, only a plurality of burn-in inspection units 40 having the same inspection item are arranged. Therefore, unlike the above-described embodiment, in the apparatus of this embodiment, the transport unit is transferred to the burn-in inspection unit 40 which is empty among the plurality of burn-in inspection units 40 in accordance with the cycle time required by the burn-in inspection unit 40. One semiconductor wafer 1 may be carried in one after another through 300. Therefore, each burn-in inspection unit 40 can efficiently carry in and out the semiconductor wafer 1 by the transport unit 300 shared by the plurality of burn-in inspection units 40 while performing the burn-in inspection of the semiconductor wafer 1 in a single wafer. By doing, 1
The burn-in inspection of a large number of semiconductor wafers 1 can be intensively performed by one burn-in inspection apparatus.

The apparatus according to the present embodiment is also similar to the above-described embodiment in that a semiconductor chip causing an initial failure can be detected in a state of a semiconductor wafer. Further, the address and the content of the defect regarding the defective chip are registered in the storage unit, and then the defective chip on the semiconductor wafer 1 is repaired by another repair device. This is similar to the above-described embodiment in that a high yield can be achieved.

The present invention is not limited to the above embodiment, and various modifications can be made within the scope of the present invention.

For example, in the embodiment shown in FIG.
As for other inspection units or repair units other than the burn-in inspection unit 40 arranged on the base 10, other inspection units and repair units other than FIG. 1 can be mounted. However, the present invention is not limited to the flowchart shown in FIG. For example, a preheater unit that preheats the semiconductor wafer 1 before being loaded into the burn-in inspection unit 40 or a cooling unit that cools the semiconductor wafer 1 after the burn-in inspection is placed in the loader unit 20 or at a position facing the transfer path 30. They can also be placed. The pre-heater unit and the cooling unit may be disposed inside the burn-in inspection unit 40.

Further, in the embodiment shown in FIGS. 1 and 10, the delivery unit 200 is arranged between the transport path 30 and each inspection section and repair section. However, it is possible to omit this. In this case, the wafer 1 may be directly carried into the inspection unit or the repair unit via the transfer unit 300.
Even when the delivery unit 200 is provided between the transport path 30 and each of the inspection units and the repair units, one delivery unit 200 can be moved along the arrangement direction of the inspection units or the repair units, and one delivery unit is provided. The unit 200 can be shared by a plurality of inspection units and repair units.

Further, in the embodiment shown in FIGS. 1 and 10, the loader section 20 is arranged at one end of the transport path 30, but it can be arranged at the same position as other inspection sections and repair sections. is there. By doing so, the transport unit 30
Sequence drive control of tweezers of 0 can be made simpler.

As described above, the transport unit 300 that moves along the linear transport path 30 of the semiconductor wafer 1 preferably has a double tweezers structure, but may have a single tweezers structure, or may further have a transport unit. May have three or more tweezers in order to increase the operation rate. Also, the transport unit 30
A stocker capable of stocking one or more semiconductor wafers may be connected to 0 itself so that tweezers provided in the transport unit 300 can access the stocker.

[0093]

As described above, according to the semiconductor wafer inspection / repair apparatus according to the present invention, a plurality of inspection units including a burn-in inspection unit and a repair unit are provided along a linear transfer path for a semiconductor wafer. And a plurality of inspection items including burn-in inspection and repair of a defective chip are repaired in an in-line system by carrying a pre-aligned semiconductor wafer into each inspection section and repair section via a transfer means on a wafer transfer path. Can be implemented. In carrying out this in-line inspection, the burn-in inspection unit simultaneously contacts a part or all of the electrode pads of the semiconductor chip group on the semiconductor wafer and applies a plurality of electrodes under a temperature and / or voltage stress. The semiconductor chip can be subjected to burn-in inspection at the same time, so that the time required for burn-in inspection can be reduced and the in-line inspection can be smoothly performed.

According to the burn-in inspection apparatus according to the present invention, a plurality of burn-in inspection units are arranged along the transfer path on which the semiconductor wafer is linearly transferred, and the pre-aligned semiconductor wafer is transferred by the transfer means on the transfer path. Each burn-in inspection unit performs a single-wafer inspection by carrying it into each burn-in inspection unit, but from the viewpoint of the entire system, a plurality of semiconductor wafers are intensively and efficiently burned in an in-line system. can do.

[Brief description of the drawings]

FIG. 1 is a plan view showing an embodiment of a semiconductor wafer inspection / repair apparatus according to the present invention.

FIG. 2 is a control system block diagram of the embodiment apparatus shown in FIG.

FIG. 3 is a flowchart illustrating an operation of the device illustrated in FIG. 1;

FIG. 4 is a schematic perspective view showing a structure of a burn-in inspection unit and a probe inspection unit shown in FIG.

FIG. 5 is a schematic sectional view of a burn-in inspection unit and a probe inspection unit shown in FIG.

FIG. 6 is a schematic perspective view showing a modified example of the burn-in inspection unit and the probe inspection unit.

FIG. 7 is a schematic perspective view of the delivery unit shown in FIG.

FIG. 8 is a schematic plan view of the transport unit shown in FIG.

FIG. 9 is a schematic sectional view of the transport unit shown in FIG.

FIG. 10 is a schematic plan view showing one embodiment of a burn-in inspection device according to the present invention.

[Explanation of symbols]

 Reference Signs List 1 semiconductor wafer 2 semiconductor chip 20 loader unit 26 pre-alignment unit 30 transport path 40 burn-in inspection unit 50 probe inspection unit 60 repair unit 62 laser repair unit 64 deposition repair unit 70 marking unit 80 baking unit 90 visual inspection device 100 CPU 105 pre Alignment control unit 106 ID detection unit 200 Delivery unit 300 Transfer unit 402 Wafer chuck 404 Rotation mechanism 406 Elevation mechanism 408 X-direction fine movement mechanism 410 Y-direction fine movement mechanism 420 Probe card 424 Conductive protrusion 440 Test head 450 Fine alignment detection unit

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-4-314346 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 21/66 G01R 31/26

Claims (4)

(57) [Claims] A transfer means for transferring a semiconductor wafer on which a large number of semiconductor chips are formed along a linear transfer path; and pre-aligning the semiconductor wafer and transferring the semiconductor wafer to the transfer means on the linear transfer path. A supply unit, a plurality of inspection units arranged along the linear conveyance path, and a plurality of inspection units each performing a plurality of inspection items including a burn-in inspection of the semiconductor chip on the semiconductor wafer transferred from the conveyance unit, disposed along said linear transport path, of the semiconductor chip on the semiconductor wafer which is delivery from the conveying means, at least a burn-in test or during the burn test
Has a repair unit for repairing the semiconductor chip judged to be defective at the time of the other tests after 査, wherein the burn-in test portion, at least one of the machine <br/> capacity heating and cooling of the semiconductor wafer A fine alignment unit for finely aligning the semiconductor wafer on the wafer chuck; and simultaneously providing electrode pads of the semiconductor chip group in an entire area or a divided area on the semiconductor wafer. a contact portion which contacts, electrically connected to the contact portion, inspection of semiconductor wafers which comprises a tester for burn-in test of said semiconductor chip in at least one of the added condition of temperature stress and voltage stress, the 査Ri Pair device. 2. The semiconductor device according to claim 1, wherein the inspection section other than the burn-in inspection section includes: a probe inspection section for inspecting electrical characteristics of the semiconductor chips on the semiconductor wafer; a visual inspection unit for visually appearance inspection image, inspection 査Ri pairs apparatus for a semiconductor wafer, characterized by comprising either one or both. 3. An apparatus according to claim 1 or 2, biopsy 査Ri pairs apparatus for a semiconductor wafer, characterized by comprising further a marking portion for applying a marking to irreparable faulty chips in the repair section. 4. A transfer means for transferring a semiconductor wafer on which a number of semiconductor chips are formed along a linear transfer path, and after pre-aligning the semiconductor wafer, transferring the semiconductor wafer to the transfer means on the linear transfer path. a supply means for supplying, a plurality of arranged along the linear transport path, anda burn-in test unit for burn-in test of the semiconductor chip on the semiconductor wafer which is delivery from the conveyor means, the bar down in inspection A wafer chuck having at least one function of heating and cooling the semiconductor wafer; a fine alignment unit for finely aligning the semiconductor wafer on the wafer chuck; A capacitor that simultaneously contacts the electrode pads of the semiconductor chip group in a region or in a divided region divided into areas. A burn-in inspection device for a semiconductor wafer, comprising: a tact portion; and a tester that conducts to the contact portion and performs a burn-in test on the semiconductor chip in a state where at least one of a temperature stress and a voltage stress is applied.