JPH06342836A - Inspection and repair device and burn-in inspection device for semiconductor wafer - Google Patents

Abstract

PURPOSE:To provide an inspection and repair device for a semiconductor device which executes a burn-in inspection process for many semiconductor chips on semiconductor wafers and a later repair process by in-line method. CONSTITUTION:A loader 20, which supplies semiconductor wafers 1 one by one, is provided at one end of a straight carriage path 30 for a carrying unit 300, and further burn-in inspection parts 40, probe inspection parts 50, and a laser repair part 60, a deposition part 64, a marking part 70, a baking part 80, and visual inspection parts 90 are arranged, respectively, on both sides of the carriage path 30. The loader 20 prealigns, on a chuck 28a, the semiconductor wafers 1 taken out of a cassette 22, and detects the ID information given to the wafer 1.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an inspection / repair device and a burn-in inspection device capable of performing a burn-in inspection of semiconductor chips in a semiconductor wafer state.

[0002]

2. Description of the Related Art As a final step of a semiconductor manufacturing process,
A plurality of inspection processes are required to prevent defective chips from being distributed to the user side. A typical example of this type of inspection process is probe inspection. The probe inspection includes a probe needle that contacts all electrode pads of one chip of a large number of semiconductor chips existing on a semiconductor wafer, sends a signal pattern to the semiconductor chip, and monitors the output of the semiconductor chip. Inspecting the electrical characteristics of. In this probe inspection device, in order to inspect all the chips on the semiconductor wafer, it is necessary to repeatedly move up and down the wafer chuck on which the semiconductor wafer is mounted and perform step movement for one chip every time inspection of one chip is completed. there were. Further, as a final step of the semiconductor manufacturing process, in addition to the probe inspection, it is necessary to perform marking on a defective chip determined to be defective by the inspection by an ink method or a repair process for repairing a repairable defective chip. As a final inspection process,
There is a demand for visual inspection by enlarging a semiconductor chip on a semiconductor wafer. There has been proposed an apparatus for performing various inspections and repairs of this kind by an in-line method.

One of such methods is disclosed in Japanese Patent Laid-Open No. 26525/1990.
As disclosed in Japanese Patent Publication No. 5, a plurality of inspection parts and repair parts are arranged on both sides or one side of a linear transfer path for transferring a cassette on which a plurality of semiconductor wafers are mounted, and each inspection part and repair part are provided. The cassette is conveyed and supplied.

Another method is disclosed in Japanese Patent Laid-Open No. 4-13985.
As disclosed in Japanese Unexamined Patent Publication (Kokai) No. 1, a plurality of inspection parts and repair parts are arranged on both sides or one side of a rotary transfer path for transferring semiconductor wafers, and one semiconductor wafer is transferred to each inspection part and repair part. To supply.

The above-mentioned two methods are different depending on whether a cassette or a semiconductor wafer is carried, but both are disclosed in Japanese Patent Publication No. 3-22057 or Japanese Patent Laid-Open No. 3-19.
The rotation conveyance type so-called cluster tool method disclosed in Japanese Patent No. 2525 is replaced with a linear conveyance path for inspection /
It can be understood as being applied to a repair device.

As a final inspection of the semiconductor manufacturing process, there is a so-called burn-in inspection in addition to the above-mentioned probe inspection. The burn-in inspection is to detect a chip that causes an initial failure by performing an element driving state close to an actual driving state while applying a temperature stress and / or a voltage stress to the semiconductor chip. Is. Conventionally, this burn-in inspection is not performed on semiconductor chips on a semiconductor wafer, but is performed on semiconductor devices that are packaged after the semiconductor wafer is cut into chips.

[0007]

The significance of burn-in inspection of semiconductor devices is to remove devices having inherent defects and potential defects by applying temperature stress or voltage stress. Even if the contents of the defects are found out. However, it was almost impossible to repair the semiconductor device after it was packaged. As described above, the semiconductor device determined to be defective by the burn-in inspection has to be discarded, and there is much waste in terms of time and economy. Therefore, it has been earnestly desired to carry out this type of burn-in inspection in the state of a semiconductor wafer.

The biggest problem in conducting the burn-in inspection of the semiconductor chip in the state of the semiconductor wafer, not in the state of the semiconductor device, is that the burn-in inspection is a screening test for finding a semiconductor chip causing an initial defect. This means that the time required for the burn-in inspection of the chip is longer than that required for the probe inspection. For example, 1
Taking the semiconductor chip of M DRAM as an example, 1024
It is necessary to sequentially supply signals to the word lines of the book, and
In order to find a gate oxide film defect due to stress, it takes a considerable amount of time to inspect each word.
It took about 24 hours to perform the burn-in inspection of the entire chip of the M DRAM.

Even if this burn-in inspection time is shortened by devising a wiring line or the like, there are the following problems in applying the above two in-line methods to the burn-in inspection.

For example, if a burn-in inspection is included in the in-line apparatus disclosed in Japanese Patent Laid-Open No. 2-265255, the inspection time of all the semiconductor wafers in the carried-in cassette is finished as long as one inspection unit is occupied. It takes time to do so, in other words, it is occupied until the inspection of the semiconductor wafer group for each lot is completed. In particular, even if another identical inspection unit becomes empty, it is impossible to carry an uninspected semiconductor wafer into another empty inspection unit. Therefore, the operating rate of the entire device is reduced, and high throughput cannot be expected.

On the other hand, if the burn-in inspection apparatus is applied to the in-line apparatus disclosed in Japanese Patent Laid-Open No. 4-139851, the above-mentioned problems can be solved. However, each of the above-mentioned two in-line devices is merely a probe inspection device or other inspection device that is a finished product arranged on both sides or one side of a linear robot transfer device, and each inspection unit has a semiconductor device. There was a waste of repeating the same operation, such as pre-alignment, every time a wafer was loaded.

Therefore, an object of the present invention is to solve the above-mentioned conventional problems and enable burn-in inspection of a semiconductor chip in a state of a semiconductor wafer. It is an object of the present invention to provide a semiconductor wafer inspection / repair device and a burn-in inspection device capable of efficiently performing a repair process or the like by an in-line method.

[0013]

A semiconductor wafer inspection / repair device according to the present invention comprises a transfer means for transferring a semiconductor wafer on which a large number of semiconductor chips are formed along a straight transfer path, and a semiconductor wafer pre-cleaning device. After alignment, the semiconductor wafer is arranged along the linear transfer path with a supply means for supplying the semiconductor wafer to the transfer means on the linear transfer path,
A plurality of inspection units that respectively carry out a plurality of inspection items including burn-in inspection of the semiconductor chips on the semiconductor wafer delivered by the transport unit, and are arranged along the straight transport path, and delivered by the transport unit. Of the semiconductor chips on the semiconductor wafer, a repair unit for repairing at least the semiconductor chip determined to be defective at the time of burn-in inspection or at the time of subsequent inspection, and the burn-in inspection unit includes the semiconductor wafer. A wafer chuck having a function of heating and / or cooling a wafer, a fine alignment section for finely aligning the semiconductor wafer on the wafer chuck, and a fine alignment section in the entire area of the semiconductor wafer or in a divided area divided into planes. The contact portion that simultaneously contacts the electrode pads of the semiconductor chip group and the contact Conducting the isolation portion, characterized in that it comprises a tester for burn-in test of said semiconductor chip in a state where plus temperature and / or voltage stress, the.

In the burn-in inspection apparatus according to the present invention, a semiconductor wafer having a large number of semiconductor chips formed thereon is conveyed along a linear conveying path, and the semiconductor wafer is pre-aligned, and then the semiconductor wafer is linearly moved. A supply unit that supplies the transfer unit on the transfer path; and a burn-in inspection unit that is arranged along the linear transfer path and that performs a burn-in inspection of the semiconductor chips on the semiconductor wafer transferred from the transfer unit. The burn-in inspection unit includes a wafer chuck having a function of heating and / or cooling the semiconductor wafer, a fine alignment unit for finely aligning the semiconductor wafer on the wafer chuck, and an entire region on the semiconductor wafer. Simultaneously with the electrode pads of the semiconductor chip group in the inner or surface-divided divided areas. A contact portion for tact, electrically connected to the contact portion, characterized in that it comprises a tester for burn-in test of said semiconductor chip in a state where plus temperature and / or voltage stress, the.

[0015]

In the present invention, the semiconductor wafer is pre-aligned in a lump before the semiconductor wafer is supplied to the linear conveying path by the supplying means. It is necessary to re-align at the burn-in inspection section or other inspection section or repair section arranged along the straight conveyance path. However, at each of these places, it is sufficient to perform only fine alignment, and a mechanism for pre-alignment. Since it is unnecessary and pre-aligned in a lump in advance, the time for fine alignment can be shortened.

After the pre-aligned semiconductor wafer is supplied to the transfer means on the linear transfer path through the supply means, the transfer means arranges the semiconductor wafer along the transfer path in accordance with a predetermined inspection procedure. Semiconductor wafers are sequentially loaded into and unloaded from a plurality of types of inspection units and repair units, or a plurality of burn-in inspection units. Here, in order to perform a plurality of inspections and repairs inline, it is necessary to shorten the inspection time required in the burn-in inspection unit. In view of this, in the present invention, the burn-in inspection section is provided with a contact section that simultaneously contacts the electrode pads of the semiconductor chip group in the entire area on one semiconductor wafer or in the surface-divided divided areas.
Therefore, it is not necessary to reduce the number of times of step driving of the wafer chuck or to carry out this step driving during the inspection as compared with the case of contacting the electrode pad of one semiconductor chip, and the inspection time can be shortened accordingly. it can.

Further, according to the semiconductor wafer inspection / repair apparatus of the present invention, the semiconductor wafer having the semiconductor chip determined to be defective after the burn-in inspection is carried into the repair section, and the repairable defective chip is repaired. Will be. Therefore, as compared with the burn-in test performed after the conventional packaging, the defective chip that had to be discarded can be repaired as a good product, and the final product yield can be improved.

According to the burn-in inspection apparatus of the present invention, after the pre-aligned semiconductor wafer is supplied to the transfer means on the straight transfer path through the supply means, a plurality of burn-in devices are arranged along the straight transfer path. The semiconductor wafers are sequentially loaded into the inspection section. Each of the burn-in inspection units individually performs the burn-in inspection. However, when viewed as the entire apparatus of the present invention, a plurality of semiconductor wafers can be intensively and efficiently subjected to the burn-in inspection by the in-line method.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a semiconductor wafer inspection / repair device according to the present invention will be specifically described below with reference to the drawings.

Outline of Overall Structure of Device First, an outline of the entire structure of this embodiment will be described with reference to FIGS. 1 and 2.

FIG. 1 is a schematic plan view of the apparatus of this embodiment, showing an example of the layout of the inspection section and the repair section. In the figure, almost on the center line of the base 10,
A transfer path 30 for transferring the semiconductor wafer 1 is provided, the loader section 20 is provided at one end of the transfer path 30, and the transfer path 3 is provided.
For example, various inspection units and repair units are provided on both sides of 0.

In the upper area facing the base 10, a downflow section for downflowing clean air toward the transport path 30, various inspection sections and repair section is provided to prevent dust generation.

The loader section 20 includes, for example, four cassettes 2
2, each cassette 22 is loaded with, for example, 25 semiconductor wafers 1. A transport path 24 is arranged across the array width of the four cassettes 22.
The delivery unit 200 is movably provided along the line 4. A pre-alignment unit 26 is provided at a position facing the four cassettes 22 with the transport path 24 in between, and on a position on the extension line of the transport path 30. The pre-alignment unit 26 has a chuck 28a on which the semiconductor wafer 1 can be mounted, and, for example, three push-up pins 28b which can be projected and retracted from the surface of the chuck 28a. The chuck 28a is movable in the directions of arrows X, Y and θ in the figure under the control of the pre-alignment controller 105. Under the control of the pre-alignment controller 105, the semiconductor wafer 1 on the chuck 28a is pre-aligned. At this time, positioning of the orientation flat 1a of the semiconductor wafer 1 is also performed. Further, an ID detection unit 106 for detecting ID information of the semiconductor wafer 1 on the chuck 28a is provided. The semiconductor wafer 1 is provided with characters or a bar code as ID information, and the ID detection unit 106 optically detects this ID information.

As a semiconductor wafer inspection section and a repair section arranged on both sides of the transfer path 30, one burn-in inspection section 4 is provided in one row parallel to the transfer path 30, for example.
0 and three probe inspection units 50 are arranged. A repair section 60 including a laser repair section 62 and a deposition repair section 64 is provided in the other row parallel to the transport path 30.
A marking unit 70, a baking unit 80, and two visual inspection units 90, for example, are arranged.

The burn-in inspection unit 40 is for performing a burn-in inspection of the semiconductor chip on the semiconductor wafer 1 under the condition that the temperature stress and / or the voltage stress is applied, and the probe inspection unit 50 does not apply the above stresses. In this state, the electrical characteristics of the semiconductor chip are inspected. In the apparatus of this embodiment, the burn-in inspection unit 4
0 and the probe inspection unit 50 require a longer inspection time than the other inspection units, the burn-in inspection units 40 and the probe inspection units 50 are arranged in a number proportional to the inspection time. If the burn-in inspection requires more time than the probe inspection, the burn-in inspection unit 40
You can add more. On the other hand, if the probe inspection requires more time than the burn-in inspection,
The probe inspection unit 50 can be added.

One laser repair section 62 of the repair section 60 is, for example, when the probe inspection section 50 finds that a pattern short circuit has occurred in the semiconductor chip.
The pattern short-circuited portion is fused and repaired by laser light. The other deposition repair unit 64 of the repair unit 60 is for repairing a deposition film formed in the pattern open portion when a pattern open occurs in the semiconductor chip in the probe inspection unit 50.

The marking section 70 is for marking, for example, by inking or scratching on a defective chip that cannot be repaired by both the laser repair section 62 and the debodiment repair section 64 described above.

The baking section 80 is necessary when the marking section 70 is of the ink marker type, and is used to dry the ink ejected onto the defective chip by baking.

The visual inspection section 90 is for visually inspecting the external appearance of each semiconductor chip 2 on the semiconductor wafer 1 by using a microscope or a TV monitor. The visual inspection unit 90 is used as a final inspection item of the apparatus of this embodiment, and also the burn-in inspection unit 40 or the probe inspection unit 5 is used.
It can also be used for visual inspection after the inspection at 0.

FIG. 2 shows the control system of the apparatus of this embodiment. The CPU 100 controls the control of the apparatus according to the present embodiment, and has a storage unit 102 having a built-in ROM and RAM.
In addition to the above-mentioned various inspection units and repair units 50 to 90, the pre-alignment control unit 105 and the ID detection unit 106, the following various control units are connected to the bus line. . In the loader unit 20, the loader control unit 104 performs rotational drive in the θ direction of the entire unit of the delivery unit 200 that moves along the transport path 24, vertical drive, and forward / backward drive of the tweezers. The drive control of the push-up pin 28b that is pushed in and out is performed. The transport control unit 108 controls the drive of the transport unit 300 along the transport path 30 as well as the rotational drive in the θ direction of the entire transport unit 300 that moves along the transport path 30, the raising / lowering drive thereof, and the forward / backward drive of tweezers. To do.

Inspection of a semiconductor wafer having the above structure
The operation of the entire repair apparatus will be described with reference to the flowchart shown in FIG.

First, one semiconductor wafer 1 is unloaded from the loader section 20 toward the carrying unit 300 on the carrying path 30 (step 110). For this purpose, the CPU 100
Sends a command to the loader control unit 104, and the delivery unit 200 controlled by the loader control unit 104 is stopped at a position facing one cassette 22. After that, one semiconductor wafer 1 is taken out from the cassette 22 by the forward drive, the upward drive and the backward drive of the tweezers of the delivery unit 200. Furthermore, the delivery unit 2
00 rotates 180 °, then 1 by the arm drive
The semiconductor wafer 1 is placed on the three push-up pins 28b on the chuck 28a. After that, the push-up pin 28b is lowered, so that one semiconductor wafer 1 is placed on the chuck 28a. Then, the pre-alignment of the semiconductor wafer 1 is performed on the semiconductor wafer 1 mounted on the chuck 28a according to the drive control of the pre-alignment controller 105. Furthermore, the ID detection unit 106
Thus, the ID information provided on the semiconductor wafer 1 is detected.

In the apparatus of this embodiment, each inspection section or repair section after being carried out from the loader section 20 performs fine alignment individually. I am doing pre-alignment. In this way, by performing the pre-alignment collectively by the loader unit 20, the alignment time at each inspection unit or repair unit can be shortened, and compared with the case where the pre-alignment unit is provided at each inspection unit and repair unit. Therefore, the number of members can be significantly reduced.

Thereafter, the push-up pin 28b is driven to project from the chuck 28a, and the pre-alignment of one semiconductor wafer 1 is performed by the forward drive, the upward drive and the backward drive of the tweezers of the transport unit 300 on the transport path 30. It is transferred from the loader unit 20 to the transport unit 300.

After this, the CPU 100 gives a command for carrying in one semiconductor wafer 1 to the transfer control unit 108 toward, for example, the burn-in inspection unit 40 which carries out the first inspection item (step 112). Transport control unit 108
Performs the stop position control of the transport unit 300 on the transport path 30 and the drive control of the tweezers in the unit 300, so that the burn-in test section 40 in the empty state of the three burn-in test sections 40 has 1 A single semiconductor wafer 1 is loaded. At this time, a delivery unit 200 having the same configuration as that in the loader section 20 is provided between the transport unit 300 and the burn-in inspection section 40.
The semiconductor wafer 1 can be carried in via 00. In this way, the operating rate of the transport unit 300 can be increased, and the drive stroke of the tweezers in the unit 300 can be shortened.

The CPU 100 repeats the above steps 110 and 112 so that the semiconductor wafer 1 can be loaded into the remaining two burn-in inspection units 40 with a time lag.

Here, in order to smoothly carry out the visual inspection, which is the final inspection item, from the burn-in inspection by the in-line method, even if a plurality of burn-in inspection units 40 are provided, the first burn-in inspection unit 40 is used. Inspection time must be shortened. In the present embodiment, when performing a burn-in inspection in the burn-in inspection unit 40, not only a single semiconductor chip on the semiconductor wafer 1 is contacted but all semiconductor chips on the semiconductor wafer 1 are contacted. ing. Further, in the present embodiment, since the burn-in inspection can be performed in the state of the semiconductor wafer instead of performing the packaged state like the conventional burn-in inspection, for example, a dedicated electrode for inspection is provided on the semiconductor wafer. In this way, the time required for burn-in inspection is shortened. With this, for example, 8
The time required to perform the burn-in inspection of all 1M DRAMs formed on an inch semiconductor wafer is reduced to about one and a half hours.

In this embodiment, the three burn-in inspection units 4 are used.
Since the semiconductor wafers 1 are loaded at 0 with a time lag, the burn-in test for the first loaded semiconductor wafer 1 is completed at a certain burn-in test unit 40. When the burn-in inspection is completed, the CPU 100 next transfers the semiconductor wafer 1 for which the burn-in inspection is completed to the visual inspection section 90 (step 114).
In the visual inspection unit 90, after finely aligning the loaded semiconductor wafer 1, the semiconductor chip on the semiconductor wafer 1 is magnified and visually inspected with a microscope, or an enlarged image of the semiconductor chip is displayed on a TV monitor. Will be displayed and a visual inspection will be performed. Here, when the presence of a defective chip is detected by this visual inspection, the operator can input the information through the input unit provided in the visual inspection unit 90. The information regarding the defective chip is stored in the storage unit 102 via the CPU 100 in association with the ID information of the wafer 1. Here, as will be described later, the transport unit 300 has two upper and lower tweezers. Therefore, when the transfer unit 300 moves to the burn-in inspection unit 40 that has completed the burn-in inspection, the uninspected semiconductor wafer 1 delivered from the loader unit 20 can be mounted on, for example, the upper tweezers. Then, the transfer unit 300 receives the uninspected semiconductor wafer 1 on the upper tweezers immediately after receiving the semiconductor wafer 1 after the inspection from the burn-in inspection unit 40 on the lower tweezers in the empty state. It can be carried into the burn-in inspection unit 40.

Next, the CPU 100 has its visual inspection section 9
0 and the transfer control unit 108 are controlled to control the transfer of one semiconductor wafer 1 that has undergone the visual inspection to the probe inspection unit 50 that carries out the next inspection item (step 116). The transport unit 300 driven and controlled by the transport control 108 is moved to a position facing any one probe inspection unit 50 in the empty state, and then the semiconductor wafer 1 is received by the probe inspection unit 50 by the tweezers drive control. Will be passed.

In the probe inspection section 50, as is well known,
By contacting the electrode pads of the semiconductor chip on the semiconductor wafer 1 and monitoring the output of the input signal given by the tester with the tester, the electrical characteristics of the semiconductor chip in a stress-free state such as burn-in can be obtained. To be inspected. In this probe inspection, a short circuit or an open pattern in the semiconductor chip is also inspected.
The inspection result is stored in the storage unit 102 via the CPU 100.

When the probe inspection by the probe inspection unit 50 is completed, the CPU 100 then controls the transfer of the semiconductor wafer 1 to the visual inspection unit 90 again, and the appearance inspection of the semiconductor chip after the probe inspection is performed (step 118). ).
Here, when a defective chip is detected, information about the defective chip is input via the input unit in the same manner as above.

Next, the CPU 100 executes steps 112-1.
In each of the inspection steps of 18, it is determined whether or not any semiconductor chip on the semiconductor wafer 1 has a defect (step 120). If there is a defective chip, then C
The PU 100 determines whether or not the defect content can be repaired by the laser repair unit 62 or the deposition repair unit 64 (step 122). Step 12
If it is determined that repair is possible in step 2, the CPU
100 is then repairable by laser repair,
In other words, it is determined whether or not there is a pattern short circuit in the semiconductor chip (step 124). When the content of the defect is a pattern short circuit, the CPU 100 carries the semiconductor wafer 1 into the laser repair section 62, and fuses the pattern short section by laser light to repair (step 126). After completion of step 126 or when the determination in step 124 is NO, C
The PU 100 determines whether the content of the defect can be repaired by deposition repair, in other words, whether a pattern open has occurred in the semiconductor chip (step 128). If a pattern open has occurred,
The CPU 100 carries the semiconductor wafer 1 into the deposition repair section 64 and repairs the pattern open section by film formation (step 130).

As described above, according to the apparatus of this embodiment, the burn-in inspection is performed in the state of the semiconductor wafer, so that the intrinsic defect is caused by applying the temperature stress or the voltage stress.
A semiconductor chip with a potential defect can be detected in advance. Moreover, the semiconductor wafer 1 having the defective chip mounted thereon is carried into the repair section 60 by the in-line method to repair the defective chip that can be repaired, whereby the final yield can be greatly improved.

When the laser repair section 62 and / or the deposition repair section 64 have been repaired as described above, the procedure returns to step 116 and the probe inspection is carried out again. In step 122 after completion of the first or second probe inspection, if there is a defective chip that cannot be repaired, the CPU 100 then carries the semiconductor wafer 1 to the marking unit 70 ( Step 132). In this marking part 70,
Under the control of the CPU 100, for example, ink is ejected onto the defective chip based on the address information of the defective chip, and the defective chip is marked. After the marking on the defective chip is completed, the CPU 100
Conveys the semiconductor wafer 1 to the baking section 80,
The ink ejected on the defective chip is dried by baking (step 134). This baking section 80
As is well known, the semiconductor wafer 1 is placed on a hot plate, for example, and the ink of the defective chip on the semiconductor wafer 1 is dried through the hot plate.

After the baking process in step 134 is completed, or when it is determined in step 120 that no defective chip exists even after the probe inspection, the CPU
Next, 100 carries in the semiconductor wafer 1 to the visual inspection part 90 to perform a final visual inspection (step 1).
36). After the final visual inspection, the CPU
Reference numeral 100 denotes a transfer unit 300 for transferring the semiconductor wafer 1.
The chuck 28a in the loader unit 20, the delivery unit 200
Then, the sheet is returned to the original cassette 22 via the (step 138).

In this way, a series of processes from the burn-in inspection process to the visual inspection process and the repair process therebetween for one semiconductor wafer 1 is carried out by the in-line method. Further, the CPU 100 receives the semiconductor wafer from the inspection section or the repair section after the processing is completed in the inspection section or the repair section, and at the same time, carries in a new semiconductor wafer 1 and repeats this. By doing so, it is possible to repeatedly execute the above-mentioned in-line processing for all the semiconductor wafers 1 in the four cassettes 22 mounted in the loader unit 20.

Of the burn-in inspection unit and the probe inspection unit
In order to efficiently carry out the burn-in test and the probe test by the in-line method, the structure of the probe device disclosed in the previous patent application (Japanese Patent Application No. 4-226378) filed by the applicant of the present invention is preferably adopted. it can. This structure is shown in FIGS. Each drawing shows a structure common to the burn-in inspection unit 40 and the probe inspection unit 50. When this is used as the burn-in inspection unit 40, a heating or cooling mechanism is mounted in the wafer chuck 402 shown in each drawing. And test head 440
However, the input signal peculiar to the burn-in inspection can be applied to each semiconductor chip on the semiconductor wafer 1, and the output signal thereof can be monitored. In addition, the connection unit 42 on the back side of the probe card 420
A heating or cooling mechanism may be mounted in the unit 8.

As a common structure of the burn-in inspection unit 40 and the probe inspection unit 50, a wafer chuck 402 capable of mounting and fixing the semiconductor wafer 1 in the housing 400 by, for example, a vacuum suction method is provided. When configuring the burn-in inspection unit 40, the wafer chuck 40
2 may be a hot chuck, for example. Below the wafer chuck 402, a rotating mechanism 404 for rotating the wafer chuck 402 around a vertical axis is provided.
Below the rotating mechanism 404, an elevating mechanism 406 that drives the rotating mechanism 404 up and down is provided.

Below the elevating mechanism 406, there are provided an X-direction fine movement mechanism 408 and a Y-direction fine movement mechanism 410 for finely moving the wafer chuck 402 by a few semiconductor chips in the X and Y directions, respectively. These fine movement mechanism 40
For 8, 410, for example, a mechanism using a ball screw or a piezo element can be used. In the present embodiment, the X-direction fine movement mechanism 408, the Y-direction fine movement mechanism 410, and the rotation mechanism 404 constitute a fine alignment mechanism for finely aligning the position of the semiconductor wafer 1 in the plane.

A probe card 420 is supported above the wafer chuck 402. The probe card 420 is supported by an insert ring 430 attached to the housing 400. This probe card 4
A sheet-like body 422 made of an elastic material is provided on the surface side of 20, and a large number of conductive protrusions 424 projecting downward from the surface thereof are formed on the sheet-like body 422. The conductive protrusions 424 are arranged in a number corresponding to the total number of electrode pads of all the semiconductor chips existing on the semiconductor wafer 1. Therefore, by driving up the wafer chuck 402 on which the semiconductor wafer 1 is mounted, all the electrode pads of all the semiconductor chips existing on the semiconductor wafer 1 are
The conductive protrusions 424 of the probe card 420 are collectively contacted. Further, even if the semiconductor wafer 1 or the probe card 420 is tilted or bent, elastic deformation of the planar body 422 made of an elastic body absorbs variations in the height direction to enable collective contact.

On the back surface side of the probe card 420, a connection unit 428 having electrodes electrically connected to all the conductive protrusions 424 is mounted. A test head 440 is arranged on the upper part of the housing 400 so as to face the connection unit 428. The test head 440 has a built-in tester, and has a large number of pogo pins 426 connected to signal lines in the test head 440,
Each pogo pin 426 is constantly urged to move in the protruding direction. Then, each pogo pin 426 is connected to the connection unit 42.
By making elastic contact with the electrode 8 of FIG. 8, the test head 440 and the conductive protrusion 424 of the probe card 420 are brought into conduction. When this device is used as the burn-in inspection unit 40, a heating or cooling mechanism is mounted in the connection unit 428, and the conductive protrusions 424 of the probe card 420 that come into contact with the semiconductor wafer 1 are not heated or heated. It can be set to almost the same temperature as the cooling temperature.

Wafer chuck 402 and probe card 4
A cylindrical fine alignment detection unit 450 is provided between the unit 20 and the unit 20 so as to be movable back and forth. Both ends of the fine alignment detection section 450 are guided by two guide rails 460 and 460 provided inside the upper wall of the housing 400. As a result, the fine alignment detector 450 can be retracted and moved to a region below the conductive protrusions 424 and outside the ascending / descending region of the wafer chuck 402.

This fine alignment detecting section 450
Are openings 450a and 45 on the upper and lower surfaces of the central portion, respectively.
With 0b. Further, the fine alignment detection section 450 has a TV camera 45 at one end in the longitudinal direction.
2, a half mirror 454 is arranged at the middle portion thereof, and a total reflection mirror 456 is arranged at the other end portion thereof. The half mirror 454 is mounted on the moving unit 458. By moving the moving unit 458 along the longitudinal direction of the fine alignment detecting unit 450, the half mirror 45 is moved.
4 can be moved over a range from one end side to the other end side of each row of semiconductor chips arranged on the semiconductor wafer 1.

Next, the burn-in inspection section 4 having the above-mentioned structure
The operation of 0 will be described. As described above, one semiconductor wafer 1 is transferred to the burn-in inspection section 40 via the transfer unit 300 and the delivery unit 200.
Will be delivered. The semiconductor wafer 1 is placed on the wafer chuck 402 by driving the delivery unit 200 with tweezers. The wafer chuck 402 has, for example, three push-up pins (not shown) capable of projecting and retracting, and after supporting the semiconductor wafer 1 on the tweezers of the delivery unit 200 on the three push-up pins. , The semiconductor wafer 1 is driven by the downward drive of this pin.
Can be placed on the wafer chuck 402. Since the wafer chuck 402 is formed of a hot chuck, the semiconductor wafer 1 formed of a silicon substrate having good thermal conductivity can be heated to a predetermined temperature, for example, 125 ° C. in a relatively short time.

On this semiconductor wafer 1, for example, several hundreds of 8 mm × 12 mm semiconductor chips provided with 32 electrode pads are formed. In order to accurately contact the electrode pads of all the semiconductor chips on the semiconductor wafer 1 with the conductive protrusions 424 of the probe card 420, X, Y of the semiconductor chips on the semiconductor wafer 1 with respect to the conductive protrusions 424 of the probe card 420. Fine alignment in the θ direction is performed.

For this reason, the fine alignment detecting section 450 is set at a position between the probe card 420 and the semiconductor wafer 1. Then, the TV camera 452 in the fine alignment detection unit 450 drives the X-direction fine movement mechanism 408, the Y-direction fine movement mechanism 410, and the rotation mechanism 404 while observing the conductive protrusion 424 and the image of the surface of the semiconductor wafer 1. It is possible to align the semiconductor chip with the conductive protrusions 424 in the X, Y, and θ directions.

The image of the conductive protrusion 424 is taken in through the opening 450a on the upper side of the fine alignment detection section 450, reflected by the half mirror 454, and then transferred to the T
An image is taken by the V camera 452. On the other hand, semiconductor wafer 1
The upper image is taken in through the opening 450b on the lower side of the fine alignment detection section 450. Then, this image is reflected by 90 ° toward the total reflection mirror 456 by the half mirror 454, and then the total reflection mirror 456.
The light is totally reflected at, is transmitted through the half mirror 454, and is imaged by the TV camera 452.

At this time, the half mirror 454 is moved to the moving unit 4
By moving the X-direction by 58 and the entire fine alignment detecting section 450 in the Y-direction, it is possible to image any of the semiconductor chips in the entire region on the semiconductor wafer 1.

After the above fine alignment is completed, the fine alignment detecting section 450 is retracted from the lower region of the probe card 420. After that, the wafer chuck 402 is raised by the elevating mechanism 406 to remove the electrode pads of all the semiconductor chips on the semiconductor wafer 1.
The conductive protrusions 424 of the probe card 420 are collectively contacted. After that, a known burn-in test, that is, a dynamic burn-in test, a static burn-in test, a monitor burn-in test, or the like can be performed on all the semiconductor chips on the semiconductor wafer 1. At this time, the array pattern on the semiconductor wafer 1 can be configured so that the voltage stress is applied to all the semiconductor chips on the semiconductor wafer 1 at the same time. In this way, the processing time of the burn-in inspection can be reduced. Can be greatly shortened.

Further, by using the above structure, the probe inspection by the probe inspection unit 50 can be performed without contacting all the semiconductor chips on the semiconductor wafer 1 with temperature stress and voltage stress. Known probing tests can be performed.

As described above, according to the burn-in test and the probe test described above, the test can be performed in a state of being in contact with the electrode pads of all the semiconductor chips on the semiconductor wafer 1, so that each semiconductor chip is measured. It is not necessary to move the wafer chuck 402 up and down and stepwise every time, and the inspection time can be shortened as much as the movement time can be omitted, and high throughput can be achieved. Further, since the wafer chuck 402 can perform the alignment only by slightly moving in the X and Y directions as described above, the burn-in inspection unit 40 and the probe inspection unit 50 can be downsized.

The data relating to the defective chip obtained by the burn-in test and the probe test is stored in the CPU 1
I of the wafer is stored in the storage unit 102 via the bus line 00.
It is stored in association with the D information, and is used for the repair operation in the repair section 60 described above, and is provided as the marking information in the marking section 70 for the defective chip that cannot be repaired.

Next, a modified example of the burn-in inspection section 40 and the probe inspection section 50 will be described with reference to FIG.

In this embodiment, on the semiconductor wafer 1,
Of the semiconductor chips 1a arranged in the X and Y directions, for example, they are arranged corresponding to all the electrode pads of one row of semiconductor chips 2 (hatched portions) arranged in the Y direction, and are collectively contacted to these pads. A probe card 470 having probe needles 472 is provided.

Below the wafer chuck 402, a rotating mechanism 404, an elevating mechanism 406, and a Y-direction fine moving mechanism 410 are provided as in the above embodiment. Below the Y-direction fine movement mechanism 410, a movement mechanism 480 for moving the wafer chuck 402 in the X direction between the delivery area S1 of the semiconductor wafer 1 and the alignment area S2 is provided. The moving mechanism 480 includes a motor 482 and a ball screw 484 driven by the motor 482. In the embodiment shown in FIG. 6, the wafer chuck 402 is positioned in the delivery area S1, and the semiconductor wafer 1 is placed and fixed on the wafer chuck 402 at this position. Further, in the subsequent fine alignment of the semiconductor wafer 1, the wafer chuck 402 is set in the alignment area S2, and the semiconductor wafer 1 is positioned by using the fine alignment detection section 450 as in the above embodiment.

Regarding the burn-in test and the probe test in the apparatus of this embodiment, the probe needles 472 formed on the probe card 470 are attached to all the electrode pads of the semiconductor chips 2 arranged in a row on the semiconductor wafer 1 in the Y direction. This is done by contacting all at once. Then, every time the inspection on the semiconductor chip 2 in one row in the Y direction is completed,
By moving the wafer chuck 402 in the X direction by one chip of the semiconductor chip 2 by the moving mechanism 480 and repeating this, burn-in inspection or probe inspection can be performed on all the semiconductor chips 2 on the semiconductor wafer 1. .

According to this embodiment, it is necessary to move the semiconductor chip 2 in the X direction by one step each time the measurement of one row of the semiconductor chips 2 in the Y direction is completed, as compared with the collective contact method described above. Compared to the step driving in the X and Y directions each time the measurement of each chip 2 is completed, the device can be downsized and the number of members can be reduced, and the inspection time can be shortened.

Delivery unit 200 and transport unit 3
Structure of 00 First, the structure of the delivery unit 200 arranged in the loader unit 20 and in the preceding stage of each inspection unit and repair unit will be described with reference to FIG. 7.

In this delivery unit 200, as shown in FIG. 7, a pair of articulated arms 202 and 204 are arranged so as to be inclined so that their moving planes intersect. And
An inclined portion 206a whose both ends are inclined at the same angle as the articulated arms 202 and 204, and a horizontal portion 206 formed between them.
An arm connecting portion 206 configured with b is provided. The inclined portions 206a, 206 of the arm connecting portion 206
The a is rotatably supported by the moving ends of the pair of articulated arms 202 and 204.

Tweezers 208 are fixed on the arm connecting portion 206 along a direction orthogonal to the longitudinal direction of the arm connecting portion 206. This tweezers 20
The reference numeral 8 has vacuum suction portions 208a, 208a capable of supporting the semiconductor wafer 1 on both ends thereof by, for example, vacuum suction.

One articulated arm 202 is composed of a first arm 202a and a second 202b, and similarly, the other articulated arm 204 is composed of a first arm 204a and a second arm 204b. Has been done. Then, by making both ends of each arm rotatable, three joints (a,
The structure has b, c).

A base 210 for rotatably supporting the first arms 202a and 204a is provided.
10 rotates tWo the? Rst arm 202 by a motor 212 and a belt 214, and thus tweezers 2
08 can be driven back and forth. In addition, the base 210 is
It can be rotationally driven in the θ direction of FIG. 7, and
It is vertically movable in the Z direction, which is the height direction.

Delivery unit 2 arranged in loader section 20
00 is capable of loading / unloading one semiconductor wafer 1 into / from the cassette 22 by advancing / retreating the tweezers 208 and raising / lowering the entire unit. Further, the semiconductor wafer 1 can be delivered to the chuck 28a arranged in the loader section 20 by the above-described operation of the delivery unit 200.

Similarly, in the delivery unit 200 arranged in front of each inspection section and repair section, the semiconductor wafer 1 is delivered between the transfer unit 300 moving on the transfer path 30 and each inspection section and repair section. Is possible.

Next, the transport unit 300 will be described with reference to FIGS. 8 and 9. This transport unit 300
As shown in FIG. 9, the upper and lower tweezers 302,
It has 304. This tweezers 302, 304
Is linearly movable along the transport path 30, and
It is possible to move up and down and rotate at the stop position. Further, the upper and lower tweezers 302 and 304 can be independently moved forward and backward.

The two tweezers 302 and 304 are formed as flat plates whose free ends are formed in a U shape, and the material thereof is, for example, anodized aluminum impregnated with Teflon (trade name). There is.

In each of the tweezers 302 and 304, first and second protrusions 306 and 308 protruding by a predetermined height, for example, 0.5 mm from the flat plate surface are formed at two U-shaped tip positions, respectively. . Also, each tweezers 302, 30
On the center line of 4, the 3rd protruding 0.5mm from the flat plate surface
The protrusion 310 is formed. Each protrusion 306, 3
The material of 08 and 310 is preferably Teflon (trade name), which has a small sliding resistance, and other materials such as ceramic and Delrin can be adopted.

The two tweezers 302 and 304 support the semiconductor wafer 1 at three points on the protrusions 306, 308 and 310, respectively. Each tweezers 302,3
In order to prevent the semiconductor wafer 1 from moving on 04, a suction opening 312 is formed in the third protrusion 310, so that the semiconductor wafer 1 can be vacuum-sucked.

Motors 320, 320 for independently advancing and retracting the upper and lower tweezers 302, 304, respectively.
(FIG. 9 shows only one of them). A first pulley 322 is fixed to the output shaft of the motor 320, and a second pulley 324 is rotatably supported diagonally above the first pulley 322. This first, second
A belt 326 is stretched between the pulleys 322 and 324.

As shown in FIG. 8, a third pulley 328 that is rotatable integrally with the second pulley 320 coaxially is rotatably supported at one end side of the tweezers 302 and 304 in the advancing / retreating direction. . A fourth pulley 330 is rotatably supported on the other end side of the tweezers 302, 304 in the advancing / retreating direction. Then, the third and fourth pulleys 328, 3
A belt 332 is stretched between 30.

Support arms 340 extending in mutually different directions are provided at the base ends of the tweezers 302 and 304. The support arm 340 has a connecting portion 342, and the tweezers 302,
304 and the belts 332 and 332 are connected. Therefore, by independently driving the two motors 320, 320, this motor output is transmitted to the tweezers 302, 304 via the belts 326, 332.
Each tweezers 302, 304 can be driven forward and backward independently.

According to the transport unit 300 having such a double tweezers structure, as described above, the inspection section and the repair section existing on both sides of the transport path 30 are
Processed semiconductor wafer 1 and new semiconductor wafer 1
Can be delivered to and from immediately. For example, in a state where the new semiconductor wafer 1 supplied from the loader unit 20 is mounted on the upper tweezers 302, the transfer unit 3 is placed at a position facing the burn-in inspection unit 40 that has been inspected.
Move 00. Then, by driving the lower tweezers 304 forward and backward, the burn-in inspection unit 40 receives the semiconductor wafer that has been inspected, and then by driving the upper tweezers 302, a new semiconductor wafer 1 can be carried into the burn-in inspection unit 40. it can.

As described above, according to the apparatus of this embodiment, the burn-in inspection can be performed on the semiconductor chip in the state of the semiconductor wafer, instead of the conventional method in which the packaged semiconductor device is subjected to the burn-in inspection. it can. Therefore, a defective chip that causes an initial defect can be detected in the state of the semiconductor wafer. Furthermore, by performing the burn-in inspection and the subsequent repair process by the in-line method, many of the defective chips that have caused initial defects can be repaired, and as a result, the overall yield can be improved. In particular, an element which is not packaged, for example, an element such as a chip used for bare chip mounting (COB) or an element such as a multi-chip module (MCM) can be efficiently burned-in for the first time by the apparatus of this embodiment. Further, even if the semiconductor manufacturing process shifts to cassette-less single-wafer processing due to an increase in the diameter of a semiconductor wafer in the future, the apparatus of this embodiment can perform cassetteless inspection and repair as a post-process of the semiconductor manufacturing process. It can be used as a device that can

Next, an embodiment of the burn-in inspection apparatus according to the present invention will be described with reference to FIG.

This burn-in inspection apparatus is constructed by arranging a plurality of, for example, six burn-in inspection units 40 on one side of the transport path 30 on the base 10. Other configurations,
That is, the loader unit 20, the transport unit 300 moving on the transport path 30, and the delivery unit 200 between the transport path 30 and the burn-in inspection unit 40 are the same as those in the above-described embodiments. Further, each burn-in inspection unit 40 is shown in FIG.
Either the structure shown in FIG. 5 or the structure shown in FIG. 6 can be adopted.

In the apparatus of this embodiment, only a plurality of burn-in inspection units 40 having the same inspection items are arranged. Therefore, unlike the above-described embodiment, in the apparatus of this embodiment, the transport unit is provided to the burn-in inspection unit 40 which is in an empty state among the plurality of burn-in inspection units 40 according to the cycle time required by the burn-in inspection unit 40. One semiconductor wafer 1 may be carried in one after another via 300. Therefore, each of the burn-in inspection units 40 burns-in the semiconductor wafer 1 in a single-wafer manner, and the carrier unit 300 shared by the plurality of burn-in inspection units 40 efficiently loads and unloads the semiconductor wafer 1. By doing 1
It is possible to intensively perform a burn-in inspection of a large number of semiconductor wafers 1 with a burn-in inspection device on a stand.

The apparatus of this embodiment is also similar to the above-described embodiment in that the semiconductor chip causing the initial failure can be detected in the state of the semiconductor wafer. Further, by registering the address and the content of the defect related to the defective chip in the storage unit, and then repairing the defective chip on the semiconductor wafer 1 by another repair device, the final chip is finally obtained as in the above-described embodiment. The point that the yield can be increased is the same as that of the above-described embodiment.

The present invention is not limited to the above embodiment, and various modifications can be made within the scope of the gist of the present invention.

For example, in the apparatus of the embodiment shown in FIG.
As for other inspection units or repair units other than the burn-in inspection unit 40 arranged on the base 10, other inspection units and repair units other than those shown in FIG. 1 can be mounted, and the procedure for the inspection and repair is also described. However, the present invention is not limited to the flowchart shown in FIG. For example, a pre-heater unit that preheats the semiconductor wafer 1 before being carried into the burn-in inspection unit 40 or a cooling unit that cools the semiconductor wafer 1 after the burn-in inspection is provided in the loader unit 20 or at a position facing the transfer path 30. It can also be arranged. The preheater unit and the cooling unit may be arranged inside the burn-in inspection unit 40.

Further, in the embodiment shown in FIGS. 1 and 10, the delivery unit 200 is arranged between the transport path 30 and each inspection section and repair section, but this can be omitted, and this can be omitted. In this case, the wafer 1 may be directly loaded into the inspection section or the repair section via the transfer unit 300.
Even when the delivery unit 200 is provided between the transport path 30 and each inspection unit and repair unit, one delivery unit 200 can be moved along the arrangement direction of the inspection unit or repair unit. It is also possible to use 200 as a plurality of inspection sections and repair sections.

Further, in the embodiment shown in FIGS. 1 and 10, the loader section 20 is arranged at one end side of the conveying path 30, but it may be arranged at the same row as the other inspection section and repair section. is there. In this way, the transport unit 30
The sequence drive control of 0 tweezers can be made simpler.

As the structure of the transfer unit 300 that moves along the straight transfer path 30 of the semiconductor wafer 1, the structure of the double tweezers structure is preferable as described above, but it may be one of the tweezers, or further the transfer unit. In order to improve the operation rate of the above, the tweezers may have three or more tweezers. In addition, this transport unit 30
A stocker capable of stocking one or a plurality of semiconductor wafers may be connected to 0 itself so that tweezers provided in the transfer unit 300 can access the stocker.

[0093]

As described above, according to the semiconductor wafer inspection / repair device of the present invention, a plurality of inspection units including a burn-in inspection unit and a repair unit are provided along a straight transfer path for the semiconductor wafer. And a pre-aligned semiconductor wafer is carried into each inspection section and repair section via a transfer means on the wafer transfer path, so that a plurality of inspection items including burn-in inspection and defective chip repair are performed in an in-line method. Can be implemented at. In carrying out this in-line inspection, the burn-in inspection unit simultaneously makes contact with the electrode pads of some or all of the semiconductor chip groups on the semiconductor wafer, and a plurality of them are subjected to temperature and / or voltage stress. The semiconductor chips can be simultaneously subjected to the burn-in inspection, the time required for the burn-in inspection can be shortened, and the inline inspection can be smoothly performed.

According to the burn-in inspection apparatus of the present invention, a plurality of burn-in inspection units are arranged along the transfer path along which the semiconductor wafer is linearly transferred, and the pre-aligned semiconductor wafer is transferred to the transfer means on the transfer path. While each burn-in inspection unit carries out single-wafer inspection by carrying in through each burn-in inspection unit, multiple semiconductor wafers can be intensively and efficiently burned-in in an in-line method from the viewpoint of the device as a whole. can do.

[Brief description of drawings]

FIG. 1 is a plan view showing an embodiment of a semiconductor wafer inspection / repair device according to the present invention.

FIG. 2 is a block diagram of a control system of the embodiment apparatus shown in FIG.

FIG. 3 is a flowchart illustrating an operation of the device shown in FIG.

4 is a schematic perspective view showing structures of a burn-in inspection unit and a probe inspection unit shown in FIG.

5 is a schematic cross-sectional view of a burn-in inspection unit and a probe inspection unit shown in FIG.

FIG. 6 is a schematic perspective view showing a modified example of a burn-in inspection unit and a probe inspection unit.

7 is a schematic perspective view of the delivery unit shown in FIG.

FIG. 8 is a schematic plan view of the transport unit shown in FIG.

9 is a schematic sectional view of the transport unit shown in FIG.

FIG. 10 is a schematic plan view showing an embodiment of the burn-in inspection apparatus according to the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor wafer 2 Semiconductor chip 20 Loader part 26 Pre-alignment part 30 Conveyance path 40 Burn-in inspection part 50 Probe inspection part 60 Repair part 62 Laser repair part 64 Deposition repair part 70 Marking part 80 Baking part 90 Visual inspection device 100 CPU 105 pre Alignment control unit 106 ID detection unit 200 Delivery unit 300 Transfer unit 402 Wafer chuck 404 Rotation mechanism 406 Elevation mechanism 408 X direction fine movement mechanism 410 Y direction fine movement mechanism 420 Probe card 424 Conductive protrusion 440 Test head 450 Fine alignment detection unit

Claims (4)

[Claims] 1. A transfer means for transferring a semiconductor wafer on which a large number of semiconductor chips are formed along a linear transfer path; and a pre-alignment of the semiconductor wafer, and then the semiconductor wafer is transferred to the transfer means on the linear transfer path. Supplying means for supplying, a plurality of inspecting portions arranged along the linear conveying path, and performing a plurality of inspection items including burn-in inspection of the semiconductor chips on the semiconductor wafer transferred from the conveying means, respectively. A repair for repairing at least the semiconductor chip which is arranged along the straight transfer path and is determined to be defective at least during the burn-in inspection or the subsequent inspection among the semiconductor chips on the semiconductor wafer transferred from the transfer means. The burn-in inspection unit has a function of heating and / or cooling the semiconductor wafer. An e-chuck, a fine alignment part for finely aligning the semiconductor wafer on the wafer chuck, and a contact part for simultaneously contacting the electrode pads of the semiconductor chip group in the entire region on the semiconductor wafer or in a divided region divided into planes. And a tester for conducting a burn-in test of the semiconductor chip in a state of being electrically connected to the contact portion and being subjected to a temperature stress and / or a voltage stress, a semiconductor wafer inspection / repair device. 2. The probe inspection unit for inspecting electrical characteristics of a semiconductor chip on the semiconductor wafer as an inspection unit other than the burn-in inspection unit, and enlargement of the semiconductor chip on the semiconductor wafer according to claim 1. An inspection / repair device for a semiconductor wafer, which is provided with either one or both of a visual inspection section for visually inspecting an image and visual inspection. 3. The inspection / repair device for a semiconductor wafer according to claim 1, further comprising a marking portion for marking a defective chip that cannot be repaired by the repair portion. 4. A transfer means for transferring a semiconductor wafer on which a large number of semiconductor chips are formed along a linear transfer path; and a pre-alignment of the semiconductor wafer, and then the semiconductor wafer is transferred to the transfer means on the linear transfer path. A burn-in inspecting unit disposed along the linear transfer path for inspecting the semiconductor chips on the semiconductor wafer transferred from the transfer unit. A wafer chuck having a function of heating and / or cooling the semiconductor wafer; a fine alignment section for finely aligning the semiconductor wafer on the wafer chuck; A contact portion that simultaneously contacts the electrode pads of the semiconductor chip group in the region; Conducts the serial contact portion, the burn-in test apparatus for a semiconductor wafer, characterized in that it comprises a and a tester for burn-in test of said semiconductor chip in a state where plus temperature stress and / or voltage stress.