JP3223884B2 - Duty ratio determination circuit and duty ratio determination method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a duty ratio determining circuit for determining a duty ratio of a pulse, and more particularly to a duty ratio determining circuit for determining an arbitrary duty ratio.

[0002]

2. Description of the Related Art Conventionally, a duty ratio determination circuit is used to determine various operation states by determining a duty ratio of a pulse. As an example, it may be used for the purpose of detecting the running direction of a tape in a video device.

Techniques for judging or measuring the duty ratio are disclosed in JP-A-64-84475 and JP-A-2-194722.
And Japanese Patent Laid-Open Publication No. Hei 5-315910 and Japanese Utility Model Laid-Open Publication No. Hei 6-34340.

In the technique disclosed in Japanese Patent Application Laid-Open No. 64-84475, a reset signal slightly delayed from the rising edge of the pulse and a reset signal slightly delayed from the rising edge of the pulse are used to determine the two types of duty ratios. The circuit is controlled by generating a strobe signal that is earlier than the pulse width of the clock.

In the technique disclosed in Japanese Patent Application Laid-Open No. 2-194722, counting is performed using two clocks according to the level of an input pulse signal. Then, it is determined from the count value at the end of one cycle whether the duty ratio of the input pulse signal is equal to or greater than the reference duty ratio.

In the technique disclosed in Japanese Patent Laid-Open No. 5-315910, a duty ratio determination is performed by changing a duty ratio of a PWM wave to set a reference duty ratio. Then, in order to set the reference duty ratio, an AND circuit is used for a combinational logic circuit of the input signal and the PWM wave, and the reference duty ratio is changed at 50 to 100%. Also, the input signal and P
The reference duty ratio is changed from 0 to 50% by using a NOR circuit as the combinational logic circuit of the WM wave.

In the technique disclosed in Japanese Utility Model Laid-Open Publication No. 6-34340, the counter performs up-counting and down-counting according to the level of the input pulse. The decoder is configured to measure the duty ratio so that the count value immediately before the counter is reset at the rising edge of the pulse corresponds to the duty ratio of the input pulse signal.

[0008]

Problems to be Solved by the Invention
In the technique disclosed in Japanese Patent Laid-Open No. 5 (1993) -1995, the reset signal and the strobe signal are generated such that the timings of the rising edge of the pulse, the reset signal, and the strobe signal are shifted from each other, so that the circuit configuration is complicated.

The technique disclosed in Japanese Patent Application Laid-Open No. 2-194722 requires two clocks corresponding to the reference duty ratio, and the clock must be changed every time the reference duty ratio is changed. There's a problem.

In the technique disclosed in Japanese Patent Laid-Open No. 5-315910, the reference duty ratio is set to, for example, 30%.
In order to change from 60% to 60%, there is a problem that both the AND circuit and the NOR circuit must be provided in advance or the circuit must be changed each time.

In the technique disclosed in Japanese Utility Model Laid-Open Publication No. 6-34340, a magnitude comparator for comparing the output of the decoder with the reference duty ratio and the like are additionally provided in order to determine the duty ratio at an arbitrary reference duty ratio. And requires a large circuit scale.

Accordingly, an object of the present invention is to provide a duty ratio determination circuit having a small circuit size and a simple circuit configuration.

[0013]

In order to achieve the above object, a duty ratio determining circuit according to a first aspect of the present invention comprises a detecting means for detecting a change in the level of an input pulse, and the detecting means. Detects a level change
Counting means for starting counting of a reference clock , and then starting counting in the opposite direction of the reference clock in response to the detection means detecting a level change; and Setting means for setting to a value corresponding to a reference duty ratio, and two consecutive counts of the counter in the opposite direction as one set, and from the count value at the end of the set of counts, the duty of the pulse Determining means for determining whether the ratio is less than or equal to a reference duty ratio.

According to the present invention, since the duty ratio can be determined with a simple circuit configuration, the circuit scale can be reduced. Therefore, it can be built in a microcomputer and can be applied to other electronic devices. Further, since the determination is made based on the count value at the end of one cycle, it is possible to make a duty ratio determination excellent in speed followability.

[0015] The setting means may include a start value of a set of counts such that when a pulse having a reference duty ratio is applied , the count value becomes 0 at the end of the set of counts. May be set.

[0016] The determination means may determine whether the duty ratio of the pulse is less than or greater than a reference duty ratio based on whether the count value is positive or negative.

[0017] If the count value counted by the counting means during one cycle of the pulse is known, a circuit for obtaining a duty ratio from one count value of the set of counts may be further provided.

According to a second aspect of the present invention, there is provided a duty ratio determining method, comprising: an inputting step of inputting a pulse; a detecting step of detecting a level change of the pulse input in the inputting step; As detected
It starts counting the reference clock, and then according to the level change is detected by the detecting step, the reference clock
A counting step of starting counting in the reverse direction, and a setting step of setting a count start value to a value corresponding to a reference duty ratio, which is performed in the counting step,
A determination step of determining whether the duty ratio of the pulse is less than or equal to a reference duty ratio from a count value at the end of the counting of the pair, wherein , Is provided.

According to the present invention, since the duty ratio can be determined by a simple method, the circuit scale can be reduced. Further, since the determination is made based on the count value at the end of one cycle, it is possible to make a duty ratio determination excellent in speed followability.

[0020] The setting step, wherein in the counting step, when the pulse in relation to the standard duty ratio is applied, the so count value becomes 0 when a pair of terminal count start value of a set of count May be provided.

[0021] The determining step may include a step of determining whether the duty ratio of the pulse is less than or greater than a reference duty ratio based on whether the count value is positive or negative.

[0022] The method may further include a step of obtaining a duty ratio from one count value of the set of counts when a count value counted by the count step during one cycle of the pulse is known.

[0023]

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing a configuration of the duty ratio determination circuit according to the first embodiment of the present invention.

The duty ratio determination circuit includes an edge detection circuit 1, an up / down counter 2, an up / down counter status flag register 3, an input unit 4,
(Central Processing Unit) 5
And a register 6.

The edge detection circuit 1 detects both rising and falling edges of an input pulse signal (a signal whose duty ratio is to be determined), and outputs a signal indicating the detection of each edge to an up / down counter 2. Output to When detecting the rising edge, the edge detection circuit 1 outputs a preset signal to the up / down counter 2. Note that the rising edge detection signal is output slightly after the timing at which the preset signal is output. However, this delay is sufficiently shorter than the cycle of the clock.

The up / down counter 2 starts counting up in response to a rising edge detection signal from the edge detection circuit 1 using a fixed reference clock, and counts down in response to a falling edge detection signal. Start counting. Further, the up / down counter 2 takes in a signal from the register 6 in response to the input of a preset signal from the edge detection circuit 1 in order to set a start value when starting up counting.

The up / down counter status flag register 3 temporarily stores the sign bit of the output data of the up / down counter 2 and outputs it as a stable output signal to an external device. This output signal becomes 1 when the count value of the up / down counter 2 is negative, that is, when a borrow occurs, and becomes 0 when the count value is positive.

The input section 4 inputs a start value when the up / down counter 2 starts counting up.

The CPU 5 sets the start value input from the input unit 4 in the register 6.

The register 6 temporarily stores the start value set by the CPU 5, and stores the start value
Output to

Next, the operation of the duty ratio determination circuit shown in FIG. 1 will be described.

FIG. 2 is a waveform diagram for explaining a first circuit operation example of the duty ratio determination circuit.

Here, as shown in the figure, the period is T1
A case will be described in which it is determined whether the duty ratio is larger or smaller than a certain threshold value for an input pulse signal having a specific cycle of = T2 = T3. This threshold value is a duty ratio serving as a reference for determining the magnitude of the duty ratio of the pulse.

The setting of the threshold value is performed as follows. First, in an input pulse signal having a reference duty ratio, a start value for starting up-counting is determined by experiment, calculation, or the like so that the count value of the up-down counter 2 becomes 0 at the end of one cycle. For example, FIG.
When a pulse signal having a duty ratio as shown in (a) is used as a reference, a start value C of an up-count is obtained such that the count value becomes 0 at the end of one cycle. In the pulse signal of the reference duty ratio, the section (T
₀₀ ) plus an up-counting section (T ₀₁ ; a section in which the pulse signal is at a high level) is equal to a down-counting section (T ₀₂ ). When the start value C is input from the input unit 4, the CPU 5 sets the input start value C in the register 6. The up / down counter 2 responds to a preset signal output when the edge detection circuit 1 detects a rising edge of the pulse, and takes in the start value C from the register 6 and sets it.

When a pulse signal as shown in FIG. 2 (b) is input to the edge detection circuit 1, the edge detection circuit 1 detects a rising edge of the pulse signal in a section T1.
The rising edge detection signal and the preset signal are output to the up / down counter 2. The up / down counter 2 receives a preset signal from the edge detection circuit 1, receives a start value C, and counts up from the start value C in response to a rise detection signal. The up / down counter 2 starts counting down in response to a falling edge detection signal indicating that the falling of the pulse signal from the edge detection circuit 1 has been detected.

As shown in figure, in the interval T1, the interval for up-counting period (T ₀₀₎ indicated by the start value _C; plus (T ₁₁ pulse signals is interval at a high level), the down-count It is shorter than the section (T ₁₂ ). For this reason, the count value of the up / down counter 2 at the end of one cycle (immediately before the rise of the pulse in the T2 section) becomes negative, that is, a borrow occurs halfway, and the output of the up / down counter status flag register 3 becomes 1. Therefore, it can be seen that the duty ratio in the T1 section is less than the threshold.

In the section T2, when the edge detection circuit 1 detects the rise of the pulse signal, the up / down counter 2 starts counting up from the start value C in the same manner as described above, and at the timing of the fall of the pulse signal. , Start counting down.

In the section T2, the section (T ₂₁ ) in which the up-count is added to the section (T ₀₀ ) indicated by the start value C is added to the section (T ₂₂ ) in which the down-count is performed. Is also long. Therefore, T
Since the count value of the up / down counter 2 at the end of the two sections (immediately before the pulse in the T3 section rises) is positive, the up / down counter status flag register 3
Is 0. Therefore, it is understood that the duty ratio in the T2 section is larger than the threshold.

As described above, if the output of the up / down counter status flag register 3 is 1, the duty ratio of the input pulse signal is less than the set threshold, and if it is plus, the duty ratio of the pulse signal is low. It turns out that it is more than a threshold value. Therefore, the duty ratio can be determined simply by referring to the output of the up / down counter status flag register 3 at an arbitrary threshold value.

Next, a duty ratio determination circuit according to a second embodiment of the present invention will be described.

With an input pulse signal of a specific cycle, the count value of the up / down counter 2 for one cycle can be obtained in advance by calculation or the like from the resolution of the counter. Therefore, if the count value in the section between the rise and fall of the pulse signal is known, the duty ratio of the input pulse signal can be calculated.

To determine the duty ratio, in addition to the duty ratio determination circuit shown in FIG. 1, as shown in FIG.
The falling edge detection signal from the edge detection circuit 1 and the output of the up / down counter 2 are also input to the CPU 5. The CPU 5 has a function of obtaining a duty ratio from a count value in one cycle and a count value in a section from rising to falling of a pulse, in addition to the function described in the first embodiment. The CPU 5 has an output terminal for outputting the obtained duty ratio.

FIG. 4 is a waveform chart for explaining the operation for obtaining the duty ratio. The start value of the up-count of the up-down counter 2 in this case is set to 0.

Up / down counter 2 obtained in advance
The count value of one cycle (section from point A to point C) counted by is input from the input unit 4 to the CPU 5.

When a pulse signal of a specific cycle is input and the edge detection circuit 1 detects the rise of the pulse, the up / down counter 2 starts counting up. When the edge detection circuit 1 detects the falling edge of the pulse, the up / down counter 2 starts counting down. At this time, in response to the falling edge detection signal from the edge detection circuit 1, the CPU 5 calculates the count value from the rising edge (point A) to the falling edge (point B) of the pulse from the count value of the up / down counter 2. Ask. Then, the CPU 5 performs the following calculation using the count value of one cycle previously input from the input unit 4 and the count value from the point A to the point B to obtain the duty ratio. (Count value between point A and point B) / (Count value of one cycle of input pulse signal)

Note that this duty ratio determination circuit can also determine the duty ratio with respect to an arbitrary threshold value as described in the first embodiment.

In the above-described embodiment, in one cycle of the input pulse, the up / down counter 2 first counts up and then counts down, but first counts down. Next, a down count may be performed. Even in this case, the duty ratio can be determined simply by referring to the output of the up / down counter status flag register 3 if the start value of the down count is set in the same manner as described above.

The same counting as described above is performed with one cycle from the pulse falling to the next falling as one cycle, and it is determined from the count value at the end of one cycle whether the pulse duty ratio is less than or equal to the reference duty ratio. It is also possible to make a determination.

In the setting of the start value, the current flowing from the register 6 to the input line to the up / down counter 2 can be controlled by manually operating a plurality of switches without using the CPU. It is.

[0051]

As is apparent from the above description, in the present invention, since the duty ratio is determined based on the status of the up / down counter status flag, the duty ratio can be determined with excellent speed following ability. Also, since the duty ratio is determined by a simple counter circuit,
The duty ratio determination circuit has a small circuit scale.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a duty ratio determination circuit.

FIG. 2 is a waveform chart for explaining an operation of the duty ratio determination circuit.

FIG. 3 is a block diagram illustrating another configuration of the duty ratio determination circuit.

FIG. 4 is a waveform chart for explaining an operation for obtaining a duty ratio.

[Explanation of symbols]

 1 edge detection circuit 2 up / down counter 3 up / down counter status flag register 4 input unit 5 CPU 6 register

Claims (8)

(57) [Claims] 1. A detecting means for detecting a level change of an input pulse, and a reference clock in response to the detecting means detecting a level change .
Counting means for starting counting of locks , and then starting counting in the opposite direction of the reference clock in response to the detection means detecting a level change; and Setting means for setting to a value corresponding to the ratio, two consecutive counts in the opposite direction of the counting means as a set, from the count value at the end of the set of counts, the duty ratio of the pulse, the reference A determination means for determining whether the duty ratio is less than or greater than a duty ratio. Wherein said setting means, said counting means, when the pulse in relation to the standard duty ratio is applied, the so count value becomes 0 when a pair of terminal count of a set of count The duty ratio determination circuit according to claim 1, wherein a start value is set. 3. The duty ratio determination according to claim 1, wherein the determination unit determines whether the duty ratio of the pulse is less than or greater than a reference duty ratio based on whether the count value is positive or negative. circuit. 4. The apparatus according to claim 1, further comprising a circuit for calculating a duty ratio from one count value of said set of counts when a count value counted by said count means during one cycle of said pulse is known. Claims 1 to 3
The duty ratio determination circuit according to any one of the above. 5. An inputting step of inputting a pulse, a detecting step of detecting a level change of the pulse input in the inputting step, and a reference according to a level change being detected in the detecting step.
A counting step of starting counting of a clock , and then starting counting in a reverse direction of the reference clock in response to a level change being detected in the detecting step, and a count start value performed in the counting step. A setting step of setting a value corresponding to a reference duty ratio; and a set of two consecutively-counted counter-directions in the counting step, and determining the duty of the pulse from the count value at the end of the set of counting. A determining step of determining whether the ratio is less than or greater than a reference duty ratio. Wherein said setting step, in the counting step, when the pulse in relation to the standard duty ratio is applied, the so count value becomes 0 when a pair of terminal count of a set of count The method according to claim 5, further comprising a step of setting a start value. 7. The method according to claim 5, wherein the judging step includes a step of judging whether the duty ratio of the pulse is less than or greater than a reference duty ratio based on whether the count value is positive or negative. Duty ratio determination method. 8. The method according to claim 1, further comprising a step of obtaining a duty ratio from one count value of the set of counts when a count value counted by the count step during one cycle of the pulse is known. Claims 5 to 7
The duty ratio determination method according to any one of the above.