JP3248143B2 - Digital AC servo device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital AC servo device for controlling an AC servomotor.

[0002]

2. Description of the Related Art In order to control an AC servomotor, a speed detecting device as disclosed in Japanese Patent Application Laid-Open No. 5-15184 is used. Hereinafter, a conventional digital AC servo device will be described with reference to FIGS. FIG. 5 is a block diagram of a conventional digital AC servo device. As shown in FIG. 5, the A-phase and B-phase pulses of the encoder 2 output from the motor 1 to be controlled are converted into four pulses by the quadruple counter circuit 3.
A pulse count value indicating the amount of rotation of the motor 1 is counted by multiplication and the time is measured by the timer counter circuit 4. The 4 × counter circuit 3 includes a pulse register 5
The timer counter circuit 4 holds the count value in the timer register 6 in synchronization with the holding signal. Further, the edge detection signal generation circuit 7 outputs a detection signal in synchronization with the falling and rising edges of the A-phase and B-phase pulse signals of the encoder 2 and the clock output from the clock circuit 8.

When the CPU 9 reads the pulse register 5 and the timer register 6 successively, the contents of one of the registers do not change during reading.
As shown in the timing chart, the read flag H level is output from the CPU 9 to the holding signal generation determination circuit 13,
When the detection signal is output from the edge detection signal generation circuit 7, the read flag L level is output from the hold signal generation determination circuit 13 to the CPU 9, and the hold signal is generated in the pulse register 5 and the timer register 6. The CPU 9 confirms that the read flag is at the L level, reads the pulse count value from the pulse register 5 and the timer count value from the timer register 6, calculates the motor rotation speed, and controls the motor. As described above, when the CPU 9 reads two registers consecutively, the content of one register does not change during reading, so that the motor rotation speed read by the CPU 9 is delayed by one reading cycle from the actual speed.

[0004]

In such a conventional digital AC servo device, when the CPU 9 reads two registers successively, the contents of one of the registers do not change. It is difficult to obtain accurate motor speed information due to the delay of one reading cycle from the actual speed.

An object of the present invention is to solve the above problem and to obtain accurate motor speed information without causing the motor rotation speed read by the CPU to be delayed by one reading cycle from the actual speed.

[0006]

In order to achieve the above object, the present invention provides a pulse count value representing the amount of rotation of a motor by counting the encoder A-phase and B-phase pulses output from a motor to be controlled by four times. A quadruple counter circuit for measuring a clock signal, a clock circuit for generating a drive clock, an edge detection signal generation circuit for outputting a detection signal in synchronization with falling and rising edges of the encoder A-phase and B-phase pulse signals, and a clock, A pulse register for holding a pulse count value of the quadruple counter circuit by the detection signal, a timer counter circuit for measuring time, a timer register for holding the timer count value by a holding signal,
CPU that continuously reads the pulse count value held in the pulse register and the timer count value held in the timer register, calculates the motor rotation speed, and controls the motor.
If, during the access wait time by the CPU is generated when reading the pulse register and the timer register in a continuous,
Said edge detection signal a detection signal output from the generation circuit <br/> delayed, generating a hold signal for holding the tie <br/> Makaunta circuit so that the value of the timer register is unchanged in the timer register And a timer holding signal delay circuit.

Further, a quadruple counter circuit for counting the pulse counts of the encoder A-phase and B-phase output from the motor to be controlled by four, and measuring a pulse count value representing the rotation amount of the motor, and a clock for generating a drive clock Circuit and
An edge detection signal generation circuit that outputs a detection signal in synchronization with the falling and rising edges and the clock of each of the encoder A-phase and B-phase pulse signals, a pulse register that holds a pulse count value of a quadruple counter circuit with a holding signal, A timer counter circuit that measures time, a timer register that holds the timer count value of the timer counter circuit with a holding signal, and a motor that reads the pulse count value held in the pulse register and the timer count value held in the timer register continuously. A CPU that calculates the rotational speed and controls the motor, and a prohibition signal is output when the pulse register value and the timer register value are read from the CPU, and the prohibition signal is synchronized with a clock circuit to output a hold prohibition signal. When the inhibit signal generation circuit and its hold inhibit signal are input A holding signal generating circuit that outputs an edge detection signal output from the edge detection signal generating circuit as a holding signal of the two registers when the holding signal is not output and the holding inhibition signal is not input. is there.

[0008]

According to the present invention, the register hold signal is generated by delaying the access wait time so that the register hold signal is not generated during the access wait time generated when the CPU reads the register continuously. Let it.

Further, when the CPU continuously reads a register, a prohibition signal is output from the CPU so as not to generate a holding signal of the register during the continuous reading, and a holding signal of the register is not generated.

Therefore, accurate motor speed information can be obtained without rewriting the contents of the register and without the motor rotation speed read by the CPU being delayed by one reading cycle from the actual speed.

[0011]

【Example】

Embodiment 1 First, a first embodiment of the present invention will be described with reference to FIG.
This will be described with reference to FIG. The same components as those described in the conventional example are denoted by the same reference numerals. FIG.
1 is a block diagram of a digital AC servo device according to a first embodiment of the present invention, and FIG. 2 is a diagram showing the timing.

In FIG. 1, the A-phase and B-phase pulses of the encoder 2 output from the motor 1 to be controlled are counted by the quadruple counter circuit 3 by four, and a pulse count value representing the rotation amount of the motor 1 is measured. , Timer counter circuit 4
To measure the time. The count value is held in synchronism with the hold signal by the quadruple counter circuit 3 to the pulse register 5 and the timer counter circuit 4 to the timer register 6. In the edge detection signal generation circuit 7, the A
A detection signal is output in synchronization with the falling and rising edges of the phase and B phase pulse signals and the clock output from the clock circuit 8.

When the CPU 9 reads the pulse register 5 and the timer register 6 successively, the contents of one of the registers do not change during reading.
First, the CPU 9 reads the pulse count value from the pulse register 5, and then reads the timer count value from the timer register 6, as shown in the timing chart of FIG. At this time, an access wait time δt occurs between the continuous reading of the pulse count value and the reading of the timer count value. An edge detection signal is output from the edge detection signal generation circuit 7 also when an edge of the encoder pulse occurs during the access wait time δt. At this time,
In order to prevent the contents of the timer register 6 from being changed, the timer holding signal delay circuit 10 delays by the edge detection signal access wait time δt and inputs it to the timer register 6 as a holding signal. Therefore, when the CPU 9 continuously reads the pulse register 5 and the timer register 6, even if an edge detection signal is generated during the reading, the signal held in the timer register 6 is always delayed by the access wait time δt, and one of the timer registers 6 is read. Register contents are not rewritten. As described above, the motor rotation speed when reading by the CPU 9 does not delay by one reading cycle from the actual speed.

(Embodiment 2) Next, a second embodiment of the present invention will be described with reference to FIGS. The same components as those described in the conventional example are denoted by the same reference numerals. FIG. 3 shows a digital AC according to a second embodiment of the present invention.
FIG. 4 is a block diagram of the servo device, and FIG.

In FIG. 3, the A-phase and B-phase pulses of the encoder 2 output from the motor 1 to be controlled are counted by the quadruple frequency counter circuit 3 by a factor of 4, and the pulse count value representing the rotation amount of the motor 1 is measured. , Timer counter circuit 4
To measure the time. The count value is held in synchronism with the hold signal by the quadruple counter circuit 3 to the pulse register 5 and the timer counter circuit 4 to the timer register 6. In the edge detection signal generation circuit 7, the A
A detection signal is output in synchronization with the falling and rising edges of the phase and B phase pulse signals and the clock output from the clock circuit 8.

When the CPU 9 reads the pulse register 5 and the timer register 6 successively, the contents of one of the registers do not change during reading.
First, the CPU 9 reads the pulse count value from the pulse register 5, and then reads the timer count value from the timer register 6, as shown in the timing chart of FIG. At this time, an access wait time δt occurs between the continuous reading of the pulse count value and the reading of the timer count value. An edge detection signal is output from the edge detection signal generation circuit 7 also when an edge of the encoder pulse occurs during the access wait time δt. At this time,
To prevent the contents of the timer register 6 from being updated, the CPU
9 is output from the holding inhibition signal generation circuit 11 in synchronization with the clock. When the hold inhibit signal is input, the hold signal generating circuit 12 inhibits generation of the hold signal to the timer register 6, and outputs the edge detection signal as the hold signal when the hold inhibit signal is not input. I do. For this reason, the CPU 9
When reading the pulse register 5 and the timer register 6 continuously, even if an edge detection signal is generated during reading,
Since the edge detection signal is not received, the contents of one of the timer registers 6 are not rewritten. As described above, the motor rotation speed when reading by the CPU 9 does not delay by one reading cycle from the actual speed.

[0017]

As is apparent from the above description, according to the present invention, during the access wait time generated when the CPU continuously reads the register, the access wait time is reduced so that the register holding signal is not generated. Since the configuration is such that the register holding signal is generated with a delay,
To obtain accurate motor speed information without the contents of one register being rewritten when the PU reads two registers successively, and without the motor rotation speed read by the CPU being one reading cycle later than the actual speed. Can be.

[Brief description of the drawings]

FIG. 1 is a block diagram of a digital AC servo device according to a first embodiment of the present invention.

FIG. 2 is a diagram showing the timing of the digital AC servo device.

FIG. 3 is a block diagram of a digital AC servo device according to a second embodiment of the present invention.

FIG. 4 is a diagram showing the timing of the digital AC servo device.

FIG. 5 is a block diagram of a conventional digital AC servo device.

FIG. 6 is a diagram showing timing of a conventional digital AC servo device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Motor 2 Encoder 3 4 Multiplication counter circuit 4 Timer counter circuit 5 Pulse register 6 Timer register 7 Edge detection signal generation circuit 8 Clock circuit 9 CPU 10 Timer holding signal delay circuit 11 Holding prohibition signal generation circuit 12 Holding signal generation circuit

────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-4-344466 (JP, A) JP-A-4-295287 (JP, A) JP-A-5-130789 (JP, A) (58) Field (Int.Cl. ⁷ , DB name) G01P 3/489 G01P 3/42-3/44 H02P 5/00-5/28

Claims (2)

(57) [Claims] 1. A quadruple counter circuit for counting an encoder A-phase and a B-phase pulse output from a motor to be controlled by a factor of 4, and measuring a pulse count value representing a rotation amount of the motor, and a clock for generating a drive clock. Circuit, an edge detection signal generation circuit that outputs a detection signal in synchronization with the falling and rising edges of the encoder A-phase and B-phase pulse signals, and a clock, and holds the pulse count value of the quadruple counter circuit based on the detection signal. A pulse register, a timer counter circuit for measuring time, a timer register for holding the timer count value by a holding signal,
CPU that continuously reads the pulse count value held in the pulse register and the timer count value held in the timer register, calculates the motor rotation speed, and controls the motor.
If, during the access wait time by the CPU is generated when reading the pulse register and the timer register in a continuous,
Said edge detection signal a detection signal output from the generation circuit <br/> delayed, generating a hold signal for holding the tie <br/> Makaunta circuit so that the value of the timer register is unchanged in the timer register A digital AC servo device having a timer holding signal delay circuit. 2. A quadruple-counter circuit for counting the encoder A-phase and B-phase pulses output from a motor to be controlled by a factor of 4, and measuring a pulse count value representing a rotation amount of the motor, and a clock for generating a drive clock. Circuit, an edge detection signal generation circuit that outputs a detection signal in synchronization with the falling and rising edges and clocks of the encoder A-phase and B-phase pulse signals, and a pulse that holds the pulse count value of the quadruple counter circuit with the holding signal A register, a timer counter circuit for measuring time, a timer register for holding the timer count value of the timer counter circuit by a holding signal, and a pulse count value held in the pulse register and a timer count value held in the timer register continuously. To calculate the motor rotation speed and control the motor
A PU and a hold prohibition signal generating circuit that outputs a hold prohibition signal in synchronization with a clock circuit when the pulse register value and the timer register value are read from the CPU, and the hold prohibition signal Does not output the holding signal when the signal is input, and outputs the edge detection signal output from the edge detection signal generating circuit as the holding signal of the two registers when the holding inhibition signal is not input. A digital AC servo device having a signal generation circuit.