JP3222452B1 - Active display and camera - Google Patents

Abstract

An active display device with good display quality is provided. An active display device including a driver circuit formed of a thin film transistor and a plurality of pixels, the plurality of pixels including a pixel electrode in contact with a drain electrode of the thin film transistor covered with a planarization film. The drain electrode is connected to a drain of the thin film transistor via a first contact hole, the pixel electrode is connected to a drain electrode via a second contact hole, and the second contact hole is connected to the first contact hole. It does not overlap right above the contact hole.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active display device, and more particularly to an active liquid crystal display device.
It is possible to set a clear gradation level.

[0002]

2. Description of the Related Art Liquid crystal compositions have different dielectric constants in the horizontal and vertical directions with respect to the molecular axis due to their material properties. Can be easily done. The liquid crystal electro-optical device displays ON / OFF by controlling the amount of transmitted light or the amount of dispersion by utilizing the anisotropy of the dielectric constant.

FIG. 2 shows the electro-optical characteristics of a nematic liquid crystal. When the applied voltage is small Va (point A 201),
When the transmitted light amount is almost 0% and Vb (point B 202), 2
About 0%, about 70% in the case of Vc (C point 203),
In the case of Vd (D point 204), it is about 100%. In other words, if only the points A and D are used, black and white two-gradation display is possible, and if the rising portion of the electro-optical characteristic is used like points B and C, intermediate gradation display is possible.

Conventionally, in the case of a gray scale display of a liquid crystal electro-optical device using a TFT, the gray scale display is performed by changing the voltage applied to the gate of the TFT or the voltage applied between the source and drain to adjust the voltage in an analog manner. I was

[0005] However, it is difficult to fabricate all the TFT elements in a matrix configuration so as to have uniform characteristics. In particular, it is difficult to finely adjust and maintain an intermediate voltage required for gradation display. It was very difficult.

[0006]

Therefore, the present invention proposes means for supplying a clear gradation display level to a liquid crystal by performing digital gradation display instead of the conventional analog gradation display. It is. As is generally known, in order to obtain a clear gradation display, it is necessary to supply a clear gradation display level to the liquid crystal and then maintain an intermediate voltage required for the gradation display. Therefore, an object of the present invention is to enable clear gradation display and high-quality display by maintaining an intermediate voltage required for gradation display.

[0007]

An active display device according to the present invention has a driver circuit formed of a thin film transistor and a plurality of pixels in order to maintain an intermediate voltage required for gradation display. Each of the pixels has a thin film transistor, a flattening film formed on the thin film transistor and a pixel electrode in contact with the drain electrode of the thin film transistor, the drain electrode,
Being provided on an interlayer insulator, and connected to a drain of the thin film transistor via a first contact hole formed in the interlayer insulator, the pixel electrode is provided on the flattening film, In addition, the semiconductor device is connected to the drain electrode via a second contact hole formed in the planarizing film, and the second contact hole does not overlap directly with the first contact hole.

[0008] In the above configuration, the flattening film may have a curved surface from the upper surface to the inner surface of the contact hole formed in the flattening film. Further, the diameter of the contact hole formed in the flattening film may be continuously reduced, and the active display device having the above configuration may be used for a view finder of a camera. A more detailed description will be given below with reference to examples.

[0009]

[Embodiment 1] In this embodiment, a means for supplying a clear gradation display level to a liquid crystal by performing digital gradation display instead of the conventional analog gradation display will be described. In order to supply the above-mentioned clear gradation display level to the liquid crystal, in this embodiment, in the active matrix type liquid crystal display device, the display timing related to the unit time t for writing to an arbitrary pixel and the time F for writing one screen is set. In the gray scale display of the display device using the display driving method, the signal during the writing time of the time t is time-divided without changing the time F, whereby the electric field applied to the liquid crystal of the pixel at the time t Is changed in accordance with the division ratio, so that gradation can be displayed.

For the purpose of explanation, a 4 × 4 matrix as shown in FIG. 3 is used. In the case of a conventional display device, as shown in FIG. 4, the strength of the electric field of the signal lines 210 to 213 in the data direction determines the electric field applied to the pixel electrodes 220 to 223 as shown in FIG. The rate is determined. It goes without saying that the reference numerals in FIGS. 3 and 4 correspond to each other.

In this embodiment, instead of performing such analog gradation control, as shown in FIG. 1, a signal during a writing time of a unit time t225 to be written into an arbitrary pixel is set to be time-division and divided. It is possible to display several gradations. At this time, electric field changes 227, 229,
When 31 changes as shown in FIG. 1, the average value becomes 228, 230, and 232 in the non-writing time, and a clear gradation display becomes possible.

FIG. 5 shows an arrangement of electrodes and the like provided in actual pixels corresponding to a liquid crystal display device using the circuit configuration shown in FIG. For simplification of description, only portions corresponding to 2 × 2 are described. FIG. 1 shows an actual drive signal waveform. For the sake of simplicity, the description will be made using signal waveforms in the case of a 4 × 4 matrix configuration.

First, a method for manufacturing a liquid crystal display device used in this embodiment will be described with reference to FIG. In FIG. 6A, a blocking layer 5 is formed on a glass 50 such as quartz glass which can withstand a heat treatment at an inexpensive temperature of 700.degree.
A silicon oxide film as No. 1 is formed to a thickness of 1000 to 3000 °. The process conditions were a 100% oxygen atmosphere, a film formation temperature of 15 ° C., an output of 400 to 800 W, and a pressure of 0.5 Pa. The film formation rate using quartz or single crystal silicon as a target was 30 to 100 ° / min.

A silicon film was formed thereon by an LPCVD (low pressure gas phase) method, a sputtering method or a plasma CVD method. When formed by the reduced pressure gas phase method, the temperature is 1
450-550 ° C lower by 00-200 ° C, for example 530 ° C
CVD of disilane (Si ₂ H ₆ ) or trisilane (Si ₃ H ₈ )
The film was supplied to the apparatus to form a film. Reactor pressure is 30 ~ 300
Pa. The deposition rate was 50-250 ° / min.
In order to control the threshold voltage (Vth) of the NTFT, boron is diborane in a concentration of 1 × 10 ¹⁵ to 1 × 10 ¹⁸ cm.
^-3 may be added during film formation.

When the sputtering method is used, the back pressure before the sputtering is set to 1 × 10 ⁻⁵ Pa or less, and single crystal silicon is used as a target in an atmosphere in which hydrogen is mixed with 20 to 80% of argon. For example, argon was 20% and hydrogen was 80%.
The film formation temperature was 150 ° C., the frequency was 13.56 MHz, the sputter output was 400 to 800 W, and the pressure was 0.5 Pa.

When a silicon film is formed by the plasma CVD method, the temperature is, for example, 300 ° C., and monosilane (SiH ₄ ) or disilane (Si ₂ H ₆ ) is used. These were introduced into a PCVD apparatus, and a high-frequency power of 13.56 MHz was applied to form a film.

The coatings formed by these methods are:
Oxygen is 5 × 10^{twenty one}cm^-3The following is preferred. This acid
If the element concentration is high, it is difficult to crystallize,
High or long thermal annealing times must be used.
If the amount is too small, the lamp is turned off by the backlight.
Current increases. Therefore 4 × 10¹⁹~ 4 × 10 ^{twenty one}
cm^-3Range. Hydrogen is 4 × 10²⁰cm^-3And silicon 4
× 10^{twenty two}cm^-3Was 1 atomic%. Also,
To promote crystallization for source and drain
The oxygen concentration is 7 × 10¹⁹cm^-3Below, preferably 1 × 10¹⁹
cm^-3The following is the channel formation of the TFT that constitutes the pixel
Oxygen is ion-implanted only in the region 5 × 10²⁰~ 5 × 10
^{twenty one}cm^-3You may add so that it may become. At that time, peripheral circuits
Since the constituent TFTs are not irradiated with light,
Less carrier contamination and higher carrier mobility
Is effective for high frequency operation.
You.

According to the above-described method, an amorphous silicon film is formed to a thickness of 500 to 5000 °, for example, 1500 °, and then at a temperature of 450 to 700 ° C. for 12 to 7 °.
The medium was heated at a medium temperature in a non-oxide atmosphere for 0 hour, for example, kept at a temperature of 600 ° C. in a hydrogen atmosphere. Since a silicon oxide film having an amorphous structure is formed on the surface of the substrate under the silicon film, no specific nucleus is present in this heat treatment, and the whole is annealed uniformly. That is, it has an amorphous structure at the time of film formation, and hydrogen is simply mixed therein.

Due to the annealing, the silicon film shifts from an amorphous structure to a highly ordered state, and a part of the silicon film exhibits a crystalline state. In particular, a region having a relatively high order in a state after the formation of silicon is particularly likely to be crystallized to be in a crystalline state. However, since the silicon existing between these regions is bonded to each other, silicon mutually pulls each other. When measured by laser Raman spectroscopy, a single crystal silicon peak 522 is obtained.
A peak shifted to a lower frequency side than cm ⁻¹ is observed. Its apparent particle size is 50 to 5 when calculated from the half width.
Although it is a microcrystal with a size of 00Å, there are actually a large number of regions with high crystallinity and a cluster structure, and a semi-amorphous structure film in which each cluster is bonded to each other by silicon (anchoring). Could be formed.

As a result, the coating exhibits a state substantially free of grain boundaries (hereinafter referred to as GB). Carriers can easily move from one cluster to another through anchored locations, resulting in higher carrier mobility than so-called GB polycrystalline silicon. That is, hole mobility (μh) = 10 to ²⁰⁰ cm ² /
VSec, electron mobility (μe) = 15 to 300 cm ² / V
Sec is obtained.

On the other hand, when the film is polycrystallized by high-temperature annealing at 900 to 1200 ° C. instead of annealing at the medium temperature as described above, segregation of impurities in the film occurs due to solid phase growth from nuclei. , GB contain many impurities such as oxygen, carbon, and nitrogen, and have a high mobility in the crystal. However, a barrier is formed in the GB to hinder the movement of carriers there. As a result, a mobility of 10 cm ² / Vsec or more cannot be easily obtained. That is, in this embodiment, a silicon semiconductor having a semi-amorphous or semi-crystalline structure is used for such a reason.

On top of this, a silicon oxide film was formed as a gate insulating film 54 to a thickness of 500 to 2000 {for example, 1000}. This was made under the same conditions as those for forming the silicon oxide film as the blocking layer. During the film formation, a small amount of fluorine may be added to fix the sodium ions.

Thereafter, 1 to 5 × 10 ²¹ cm of phosphorus is placed on the upper side.
^-3 silicon film or molybdenum (Mo), tungsten (W), MoSi ₂ or
A multilayer film with WSi ₂ was formed. This was patterned using a second photomask to obtain FIG. 6 (B). In FIG. 6 (C), phosphorus was added as an NTFT source 20 and a drain 18 at a dose of 1 to 5 × 10 ¹⁵ cm ⁻² by ion implantation using the gate electrode 9 as a mask. When aluminum (Al) is used as the gate electrode material, the surface is anodized after patterning with a second photomask, so that the self-alignment method can be applied. The contact hole can be formed at a position closer to the gate, so that the mobility and the threshold voltage can be reduced to further improve the characteristics of the TFT.

These operations are performed through the gate insulating film 54. However, in FIG. 6B, the silicon oxide on the silicon film may be removed using the gate electrode 9 as a mask, and then phosphorus may be directly ion-implanted into the silicon film.

Next, annealing was performed again at 600 ° C. for 10 to 50 hours. The source 20 and the drain 18 of the NTFT were formed as N ⁺ by activating impurities. A channel forming region 21 is formed below the gate electrode 9 as a semi-amorphous semiconductor.

In this way, an NTFT can be manufactured without applying a temperature to 700 ° C. or more in all steps even though it is a self-aligned system. Therefore, it is not necessary to use an expensive substrate such as quartz as a substrate material,
This is a process very suitable for the large pixel liquid crystal display device of the present invention.

In this embodiment, the thermal annealing is performed as shown in FIG.
(C) was performed twice. However, the annealing in FIG. 6A may be omitted depending on the desired characteristics, and both may be replaced by the annealing in FIG. 6C to shorten the manufacturing time. In FIG. 6D, a silicon oxide film was formed on the interlayer insulator 65 by the above-described sputtering method. This silicon oxide film may be formed by an LPCVD method, a photo CVD method, or a normal pressure CVD method. For example, it was formed to a thickness of 0.2 to 0.6 μm, and then a window 66 for an electrode was formed using a photomask. Further, aluminum is formed on the whole by sputtering, and leads 71 and 72 and contacts 67 and
After fabricating No. 68 using a photomask, an organic resin 69 for flattening the surface, for example, a translucent polyimide resin was applied and formed, and the electrode hole was formed again using the photomask.

In order to form a TFT as shown in FIG. 6 (G) and connect its output end to the electrode of one pixel of the liquid crystal device as a transparent electrode, ITO is formed by sputtering.
(Indium tin oxide film). This was etched using a photomask to form the pixel electrode 17 and the contact 73 between the pixel electrode and the drain electrode. This ITO is formed at room temperature to 150 ° C.
Achieved by oxygen in the air or in air.

As described above, the NTFT 13 and the electrode 17 of the transparent conductive film as the pixel electrode were formed on the same glass substrate 50. The mobility of the obtained TFT is 40 (cm).
² / Vs) and Vth was 5.0 (V). Thus, a first substrate was obtained.

Next, as a second substrate, an ITO (indium nitride) film was formed on a blue glass sheet by sputtering using a sputtering method and a silicon oxide film having a thickness of 2000 .ANG.
Tin oxide film). This ITO is between room temperature and 15
Films were formed at 0 ° C. and achieved with oxygen at 200-400 ° C. or in air.

A polyimide precursor was printed on the substrate by using an offset method, and baked at 350 ° C. for 1 hour in a non-oxidizing atmosphere such as nitrogen. Thereafter, the surface of the polyimide was modified using a known rubbing method, and at least initially, a means for aligning liquid crystal molecules in a certain direction was provided to form a second substrate.

Thereafter, a liquid crystal composition exhibiting ferroelectricity was sandwiched between the first substrate and the second substrate, and the periphery was fixed with an epoxy adhesive. A drive IC having a TAB shape was connected to the leads on the substrate, and a polarizing plate was stuck on the outside to obtain a transmission type liquid crystal display device.

Pixels A and D when the driving waveform shown in FIG.
FIG. 7 shows the display of F and I. It was found that a clear gradation display was obtained.

[Embodiment 2] In this embodiment, a first substrate and a second substrate were obtained by the same steps as in the first embodiment. However, no alignment film of polyimide was formed on the second substrate. In addition, since it was used as a viewfinder for a video camera, the pixel pitch was 60 μm,
A matrix configuration of 00 × 300 dots horizontally was used.

In this embodiment, a dispersion type liquid crystal display device in which a nematic liquid crystal composition is dispersed in an acrylic organic resin as a liquid crystal composition was used. After dispersing 62% by weight of nematic liquid crystal in an epoxy-modified acrylic resin having ultraviolet curability and sandwiching it between a first substrate and a second substrate,
A UV light source having an output of 00 mW was cured by irradiation for 20 seconds.

[Third Embodiment] An example in which the number of time divisions for gradation display is 16, and a liquid crystal display device capable of displaying a total of 4096 colors with 16 gradations for each color is shown. FIG. 8 shows the driving waveform at that time.

Conventionally, as a method of performing gradation display, there has been proposed a method of performing gradation display according to the ON / OFF ratio using a plurality of writings (display frames), for example, using 16 frames. I was This means that, when 8 frames out of 16 frames are turned on and the remaining 8 frames are turned off, the average transmittance is 50%, and
A gradation display is performed. When four out of the sixteen frames are ON and the remaining twelve frames are OFF, gradation display is performed as transmission with an average transmittance of 25%. However, when this method is used, there is a high possibility that the minimum number of confirmation frames, which is 30 frames, which cannot be confirmed by the human eyes, corresponds to 30 frames, which is a factor of deteriorating display quality.

However, in the method of performing gradation display by increasing the driving frequency of the driver, gradation display can be performed without substantially lowering the frame frequency. Therefore, the display quality can be improved without interrupting the visual confirmation frequency. A high-quality screen without degradation was provided.

By performing the above-described conventional gradation method simultaneously with performing the gradation display method of this embodiment,
It is useful to increase the gray scale display ability as compared with the related art. The present embodiment is a method for controlling the average voltage applied to the liquid crystal pixels when one pixel is displayed, and has a feature that the liquid crystal does not need to completely respond at this time. This prior art, by changing the average voltage is added to the pixel electrodes what was difficult to apply directly the voltage of V _b and V _C of FIG. 2 to the pixel, as if directly voltage of V _b and V _C This is because the same effect as added can be obtained. In other words, this embodiment is a method of controlling a liquid crystal which responds halfway.

In this specification, an NTFT, that is, an N-channel field effect transistor is used.
A T, that is, a P-channel field effect transistor may be used as a driving element.

[0041]

According to the display device having the pixel structure as shown in FIGS. 5 and 6 (G), an intermediate voltage required for gradation display is maintained, and a clear gradation display and high quality Display is possible. Further, as described in paragraph [0017], since a peripheral circuit (driver circuit) and a plurality of pixels are formed by thin film transistors on the same substrate, it is generally known that the size of a display device can be reduced. The production yield can be improved. Further, with such a structure, the driver circuit can be covered with a flattening film made of an organic resin having a low relative dielectric constant, and the electrode formed on the driver circuit (such as the ITO electrode of paragraph number [0029]) ) Can be reduced.

Further, as described in paragraph [0014], the semiconductor film of the thin film transistor is doped with boron by 1 ×.
Since the threshold voltage of the thin film transistor can be controlled by including the concentration of 10 ¹⁵ to 1 × 10 ¹⁸ cm ⁻³ , a desired voltage can be applied to the liquid crystal.

Further, a gradation display of a display device using a display driving method having a display timing related to a unit time t for writing in an arbitrary pixel and a time F for writing one screen can be performed without deflecting the time F. Since the signal during the writing time of the time t is time-divided, a clear gradation display digitally controlled can be obtained, and the in-plane characteristic variation of the TFT can be compensated. In addition, compared to the gradation display method using a plurality of frames, the display frequency does not decrease,
High quality display is possible.

[Brief description of the drawings]

FIG. 1 shows a driving waveform according to an embodiment of the present invention.

FIG. 2 shows electro-optical characteristics of a nematic liquid crystal.

FIG. 3 is an N-channel TFT matrix circuit diagram.

FIG. 4 shows a conventional driving waveform.

FIG. 5 is a plan view of a device according to the embodiment.

FIG. 6 is a diagram illustrating a production process according to the present embodiment.

FIG. 7 is a display example according to the embodiment.

FIG. 8 shows a driving waveform according to the present embodiment.

[Explanation of symbols]

227, 229, 231 ... electric field change during writing time 228, 230, 232 ... electric field applied to pixel electrode during non-writing time 225 ... unit time for writing to pixel

Continuation of front page (58) Field surveyed (Int.Cl. ⁷ , DB name) G02F 1/1368 H01L 29/786

Claims (12)

(57) [Claims] 1. An active display device having a driver circuit formed by a thin film transistor and a plurality of pixels, wherein each of the plurality of pixels includes a thin film transistor, a planarization film formed on the thin film transistor, and A pixel electrode in contact with a drain electrode of the thin film transistor, wherein the drain electrode is provided on an interlayer insulator, and is connected to a drain of the thin film transistor through a first contact hole formed in the interlayer insulator. Connected, the pixel electrode is provided on the flattening film, and
An active display connected to the drain electrode via a second contact hole formed in the flattening film, wherein the second contact hole does not overlap directly on the first contact hole. apparatus. 2. An active display device comprising a driver circuit formed by a thin film transistor and a plurality of pixels, wherein each of the plurality of pixels includes a thin film transistor, a flattening film formed on the thin film transistor, and A pixel electrode in contact with a drain electrode of the thin film transistor, wherein the drain electrode is provided on an interlayer insulator, and is connected to a drain of the thin film transistor through a first contact hole formed in the interlayer insulator. Connected, the pixel electrode is provided on the flattening film, and
The second contact hole is connected to the drain electrode via a second contact hole formed in the flattening film, and the second contact hole does not overlap directly on the first contact hole, and an upper surface of the flattening film An active display device having a curved surface extending from the first contact hole to an inner surface of the second contact hole. 3. An active display device having a driver circuit formed by a thin film transistor and a plurality of pixels, wherein each of the plurality of pixels includes a thin film transistor, a planarization film formed on the thin film transistor, and A pixel electrode in contact with a drain electrode of the thin film transistor, wherein the drain electrode is provided on an interlayer insulator, and is connected to a drain of the thin film transistor through a first contact hole provided in the interlayer insulator. Connected, the pixel electrode is provided on the flattening film, and
The second contact hole is connected to the drain electrode via a second contact hole provided in the flattening film, and the second contact hole does not overlap directly on the first contact hole, and an upper surface of the flattening film An active display device characterized in that the diameter of the second contact hole decreases continuously from the inner surface of the second contact hole to the inner surface of the second contact hole and has a curved surface. 4. The active display device according to claim 1, wherein said flattening film is made of an organic resin. 5. The active display device according to claim 1, wherein said interlayer insulator includes a silicon oxide film. 6. The active display device according to claim 1, wherein the active display device is an active liquid crystal display device. 7. A camera using a driver circuit formed of a thin film transistor and an active display device having a plurality of pixels as a viewfinder, wherein each of the plurality of pixels is formed on a thin film transistor and the thin film transistor. And a pixel electrode in contact with the drain electrode of the thin film transistor, wherein the drain electrode is provided on an interlayer insulator, and has a first contact hole formed in the interlayer insulator. The pixel electrode is provided on the flattening film, and
A camera connected to the drain electrode via a second contact hole formed in the flattening film, wherein the second contact hole does not overlap immediately above the first contact hole. 8. A camera using a driver circuit formed of a thin film transistor and an active display device having a plurality of pixels as a viewfinder, wherein each of the plurality of pixels is formed on a thin film transistor and the thin film transistor. A pixel electrode in contact with the drain electrode of the thin film transistor, wherein the drain electrode is provided on an interlayer insulator, and a first contact hole provided in the interlayer insulator is provided. The pixel electrode is provided on the flattening film, and
A second contact hole provided in the flattening film, connected to the drain electrode, the second contact hole does not overlap directly with the first contact hole, and an upper surface of the flattening film A camera having a curved surface extending from the first contact hole to the inner surface of the second contact hole. 9. A camera using a driver circuit formed of a thin film transistor and an active display device having a plurality of pixels as a viewfinder, wherein each of the plurality of pixels is formed on a thin film transistor and the thin film transistor. A pixel electrode in contact with the drain electrode of the thin film transistor, wherein the drain electrode is provided on an interlayer insulator, and a first contact hole provided in the interlayer insulator is provided. The pixel electrode is provided on the flattening film, and
The second contact hole is connected to the drain electrode via a second contact hole provided in the flattening film, and the second contact hole does not overlap directly on the first contact hole, and an upper surface of the flattening film Wherein the diameter of the second contact hole continuously decreases from the surface to the inner surface of the second contact hole, and has a curved surface. 10. The camera according to claim 7, wherein the flattening film is made of an organic resin. 11. The camera according to claim 7, wherein the interlayer insulator is a silicon oxide film. 12. The camera according to claim 7, wherein the active display device is an active liquid crystal display device.