JP3218801B2 - Defect detection device for solid-state imaging device, defect correction device using the same, and camera - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a defect detection device for detecting a pixel (point) defect of a solid-state image pickup device, a defect correction device using the same , and a camera , and more particularly to a field readout (field accumulation mode) during normal image pickup. defect detecting apparatus of a solid-state imaging element driven by and defect correction apparatus parallel
And a camera using these devices .

[0002]

2. Description of the Related Art In a solid-state imaging device formed of a semiconductor such as a CCD, a defective pixel whose sensitivity is reduced due to a local crystal defect of the semiconductor may occur.
It is known that the image quality deteriorates due to the imaging output of the defective pixel. Conventionally, when such a defective pixel is detected, it is conventionally detected using an expensive device such as a huge memory or an averaging device in an inspection process in the manufacture of the solid-state imaging device, and the defective pixel is detected for each solid-state imaging device. They are shipped with defect data added, and have not been automatically detected in the set. Therefore,
Pixel defects due to scratches or the like caused by some stress factor after shipment could not be dealt with at all.

[0003]

In recent years, therefore, there has been proposed a defect detection / correction system which can detect and correct defective pixels even when the defective pixels are incorporated in a device such as a video camera. By the way, since the level of a defect which is usually a problem is very small, a defective pixel cannot be easily detected. If the signal is amplified to increase the detection sensitivity, noise is also amplified. Therefore, it is desired that the detection sensitivity can be improved by effectively amplifying only the defect level.

Recently, as one method of performing camera shake correction with a video camera, a method of deriving a solid-state imaging device having a larger number of pixels than that required for normal imaging, for example, an NTSC system TV signal. There is known a method in which a solid-state imaging device compatible with the PAL system is used, and a part of the pixel region is used for camera shake correction. In the case of a solid-state imaging device having this camera shake correction function, in actual operation, as will be described in detail later, instead of normal read driving,
An operation of sweeping out signal charges of unused pixels is performed. Therefore, when performing this type of solid-state imaging device defect detection, the signal charges of some pixels are swept away under the above-described driving conditions, so that information of all pixels cannot be read.

The present invention has been made in view of the above problems, and has as its object to detect a defective pixel accurately by effectively amplifying only the defect level.
In addition, a defect detection device capable of supporting a solid-state imaging device having a camera shake correction function, a defect correction device using the same , and
It is to provide a camera .

[0006]

According to the present invention, there is provided a defect detection apparatus comprising: a solid-state imaging device having photosensors arranged two-dimensionally in a matrix and vertical transfer registers arranged for each vertical column of the photosensors; A read pulse for reading signal charges from the photosensor to the vertical transfer register and a vertical transfer clock for driving the vertical transfer register to vertically transfer the signal charges are generated, and during normal imaging, the solid-state image sensor is field-read.
Driven by, at the time of defect detection stop state imaging device and a timing generator for driving at frame read only Fi <br/> Rudo number of 4 or more even occurrence of the read pulse during defect detection, then Generates the read pulse
To read the signal charges of all the pixels, and continuously generate the vertical transfer clock to generate the signal charges of all the pixels.
A control unit for controlling a timing generator to output a load; a defect detection unit for detecting a defective pixel based on an imaging output level of the solid-state imaging device; and a memory for storing defect data for the defective pixel It has become. Further, the defect correction device according to the present invention uses the defect detection device having the above configuration, and generates a correction pulse at a timing given by the defect data read from the memory. Defect correction means for performing defect correction on the imaging output of the solid-state imaging device. This defect detection device is used for a camera that uses a solid-state imaging device as an imaging device.

[0007]

In a solid-state image pickup device driven by field reading, which is adopted as a general driving method, when a defect is detected, it is driven by frame reading, and the defect is detected by long-time accumulation driving. In frame read drive,
The signal charges accumulated in each pixel can be read out over two fields without pixel mixing. Therefore, it is possible to perform a defect inspection in a pixel unit in a short time. Moreover, since only the level of the defect can be amplified by the long-term accumulation, the defective pixel can be detected with high accuracy. Further, originating during prolonged storage, and stopped for four or more even number of full <br/> field generation of the read pulse, then to the read pulse
And read out the signal charges of all the pixels, and continuously generate the vertical transfer clock to generate the signal charges of all the pixels.
Read information of all pixels by outputting charge
Therefore , even in a solid-state imaging device that supports camera shake correction, defect inspection can be performed for all pixels.

[0008]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of the present invention having, for example, a digital signal processing configuration applied to a CCD camera. In FIG. 1, a subject is imaged on an imaging surface of a CCD solid-state imaging device 3 by an optical system including a lens 1 and an iris (IRIS) 2. The aperture 2 of the optical system is controlled to be opened and closed by the microcomputer 4 at the time of defect detection / correction described later. The timing generator 5 generates various signals at appropriate timing, reads out signal charges from each pixel (photo sensor) in the CCD solid-state imaging device 3 to a vertical transfer register, performs vertical transfer by the vertical transfer register,
This is for driving such as horizontal transfer by a horizontal transfer register.

FIG. 2 shows an example of the configuration of a CCD solid-state imaging device 3 having a camera shake correction function. In the figure, a large number of photosensors 31 are two-dimensionally arranged in a matrix,
An image pickup section 34 is constituted by a plurality of vertical transfer registers 33 which are arranged for each vertical column of the photosensors 31 and transfer the signal charges read out via the readout gate 32 in the vertical direction. The signal charges read by the vertical transfer register 33 are sequentially transferred to the horizontal transfer register 35 by a portion corresponding to one scanning line. The signal charges for one scanning line are sequentially transferred in the horizontal direction by the horizontal transfer register 35 and supplied to the charge detection unit 36.

The charge detecting section 36 is constituted by, for example, a floating diffusion amplifier, detects the signal charge transferred by the horizontal transfer register 35, converts the signal charge into a signal voltage, and outputs it as a TV signal. An unnecessary charge discharging gate 37 is continuously provided in the horizontal transfer register 35, and an unnecessary charge discharging drain 38 for discharging the charges in the horizontal transfer register 35 is continuously provided in the unnecessary charge discharging gate 37. . The potential of the unnecessary charge discharging drain 38 becomes sufficiently deep,
When the unnecessary charge discharging gate 37 is opened, a voltage is applied so that charges existing in the horizontal transfer register 35 can flow.

From the above-described timing generator 5, a read pulse XSG for reading the signal charges accumulated in the photosensor 31 of the CCD solid-state image sensor 3 into the vertical transfer register 33, and the signal charges read by the read pulse XSG are vertically read. Vertical transfer clock VCL to transfer
K, a horizontal transfer clock HCLK for horizontally transferring the signal charges transferred to the horizontal transfer register 35, a drain pulse SG for turning on / off the unnecessary charge discharging gate 37, and a switch pulse SP for turning on / off a switch 39 described later. And the like are generated as appropriate.
A switch 3 is provided between the output line of the charge detection unit 36 and the ground.
9 and the resistor 40 are connected in series. This switch 3
9 is normally in the off (open) state, and the switch pulse S
When P is applied, the output line is turned on (closed), and the output line is set to the ground level.

The CCD solid-state image pickup device 3 having the above-mentioned configuration and capable of correcting camera shake has an image pickup area larger than the range shown on the screen. For example, when an NTSC system TV signal is derived, it is better than the NTSC system. Also for the PAL system having a large number of lines is used. Then, for example, in the case of vertical camera shake correction, the signal charges in the upper and lower unnecessary parts of the imaging unit 34 are transferred to the high-speed vertical transfer clock VCLK.
High-speed transfer, is swept away to the unnecessary charge discharging drain 38 via the unnecessary charge discharging gate 37, and uses only the signal charges for the lines corresponding to the NTSC system. That is, by moving the upper and lower unnecessary portions based on motion data according to the amount of camera shake (the detection mechanism is not shown) generated during imaging, the blurring of the surface shown on the CCD solid-state imaging device 3 is absorbed. Thus, camera shake correction is realized.

The imaging output of the CCD solid-state imaging device 3 is S / S
After passing through an H (sample / hold) & AGC (automatic gain control) circuit 6, it is A / D converted by an A / D converter 7 and supplied to a defect correction circuit 8 and a defect detection circuit 9 as, for example, 10-bit data. The image output corrected for defects by the defect correction circuit 8 is subjected to various kinds of signal processing in a signal processing circuit 10 and output as a luminance (Y) signal and a chroma (C) signal. Become.

The defect detecting circuit 9 compares the image pickup output level of the CCD solid-state image pickup device 3 in the frame readout drive with a predetermined detection level to detect a defective pixel, and based on the detection output of the comparator 21. Address detection and conversion circuit 22 for specifying the address of the defective pixel and converting the address in the frame readout drive to the address in the field readout drive, and converts the address data given by the address detection and conversion circuit 22 into odd and even numbers. RAM 23 for storing for each field
It is composed of The read address from the RAM 23 is supplied to the correction pulse generation circuit 12. The correction pulse generation circuit 12 generates a defect correction pulse DEF at a timing according to a read address from the RAM 23 and supplies the defect correction pulse DEF to the defect correction circuit 8.

By the way, usually, defective pixels of the CCD solid-state imaging device 3 exist in a unit of one pixel. When the CCD solid-state imaging device 3 is operated in a field read drive (field accumulation mode) adopted as a general driving method, signal charges of the photosensor 31 accumulated for one field period are adjacent to each other in the vertical direction. Are mixed and output between the two pixels. Therefore, signal charges of all pixels are read out for each field, and a defect of one pixel is output over two fields by changing the line. For this reason, defect correction requires two fields of correction for one pixel.

For this reason, when trying to detect a defect by field read driving, inspection over two fields is required. That is, in the field read drive, all pixels are read for each field. Therefore, when the defect level is amplified by extending the accumulation time of the signal charge in each pixel, an accumulation operation is required for each field. The calculation simply takes twice as much time, and the time required for defect detection becomes longer. FIG. 3 is a timing chart of the field read drive, and FIG.
Shows the case of normal operation, and (B) shows the case of long-time accumulation.

In FIG. 3, VD is a vertical synchronization signal of an NTSC system TV signal, FLD is an (EVEN / ODD) discrimination signal, XS
G is a readout pulse for reading out signal charges from each pixel, ST / SP is a defect detection start / stop signal (rise starts, fall stops), VCLK is a vertical transfer clock, and S / H OUT is a CCD solid-state image sensor. 3, the sample hold output of the imaging output, W pulse is a defect detection pulse, DE
F indicates a defect correction pulse. In the sample-and-hold output S / H OUT, a pulse a indicates a defect output having a low level, and a pulse b indicates a defect output having a high level.

By the way, in the system corresponding to the camera shake correction, in the normal read operation, only the signal charges of the pixels of NTSC are read out as described above, so that all the pixels to be used, in this example, all the pixels of PAL are read out. Inspection will not be possible. Therefore, in the present invention, the CCD solid-state imaging device 3 is set to a frame readout drive (frame accumulation mode) at the time of defect detection so that it does not take much time to detect a defect and can be applied to a system corresponding to camera shake correction. Pulses XSG1, XSG2 and vertical transfer clock V
The timing of CLK is controlled. In addition,
At the time of this defect detection, of course,
No action is taken to sweep away signal charges in unnecessary parts
Shall be. FIG. 4 shows a timing chart in the case of frame read driving. In the figure, (A) shows a case of normal operation, (B) shows a case of normal long-time accumulation,
(C) shows the case of long-time accumulation corresponding to camera shake, respectively.

Here, in the case of a system for camera shake correction
In order to perform defect inspection on all pixels, P
Must read out the signal charges of the number of pixels at AL system is,
Also, as described above, the PAL system is more efficient than the NTSC system.
In all, the number of lines is large, and signal charges for all pixels are
Since the data cannot be read in the period of the field, it is understood that it is necessary to read the signal charges of one field over two fields. Therefore, odd (ODD) and even (EV)
EN) for each field.
To read over two fields, the odd fees
Field and read the even field two fields later.
If an attempt is made to read them out, the field at that time becomes an odd field again, so that the reading of the even field is performed three times after the next field, that is, the first odd field.
Since the operation is performed from the even field of the field , the signal charges for all pixels in both the odd and even fields are read.
It takes a total of five fields to find out . At this time, the read timing of each field signal is shifted by a time corresponding to three fields.

In this manner, the read time of both fields is
Because the ming shifts by 3 fields worth of time
(See FIG. 4 (C).) In order to make the accumulation times of the signal charges in both fields uniform, it is necessary to shift the accumulation start timing in advance in accordance with the readout timing. Staggered. From this, assuming that the number of fields to be stored is n, the total detection time in the frame read drive is n
+5 fields. In such readout of drive timing, detection of a defective pixel and storage of its address can be completed regardless of the field at the start of defect detection. In other words, only the field at the end is different, and it does not matter which field is used later for storing the defect data.

In this driving method, when the timing for stopping the reading of the signal charge is designated by the number of pulses of the vertical synchronizing signal VD, the reading pulse XSG is stopped in ST / SP.
It may be performed at the following timing based on the count number of the vertical synchronization signal VD after the signal rise (START). That is, the read pulse XSG to be stopped is 1,3 to n−2,
n, n + 1, and n + 3. For example, in the case of FIG.
Since n = 6 is set in FIG.
As described above, the read pulse XSG to be stopped is 1, 3, 4,
6, 7, and 9. Here, the number n of fields to be stored
Is an even number of 4 or more from the setting of detection accuracy and detection lower limit .
It is a value arbitrarily determined under conditions . While the read pulse XSG is stopped, the vertical transfer clock VCLK is a continuous pulse without any modulation during vertical blanking.

The above-described defect detection operation in the frame read driving is performed by the microcomputer 4 so that the generation of the read pulse XSG is stopped at the above-described timing and the vertical transfer clock VCLK is continuously generated during the stop period. This is realized by controlling the generator 5. As described above, by performing the defect detection by the frame read drive, the detection time can be significantly reduced as compared with the case of the field read drive. FIG. 5 shows a timing chart when, for example, 10 frames (20 fields) are accumulated. In the same figure, (A) shows a case of normal long-time accumulation, and (B) shows a case of long-time accumulation corresponding to camera shake. In the case of FIG. 9B, the total detection time is 20 fields + 5 in the frame read driving.
It only takes time in the field. On the other hand, in the field read drive, since an accumulation operation is required for each field,
The accumulation time simply doubles.

Next, an algorithm of defect detection and defect correction according to the present invention will be described with reference to the flowchart of FIG. When the power of the CCD camera is turned on, the microcomputer 4 first closes the aperture 2 and opens the CCD solid-state imaging device 3.
The CCD solid-state imaging device 3 is driven by frame reading (step S2). Subsequently, the read pulses XSG1 and XSG2 generated from the timing generator 5 for the CCD solid-state imaging device 3 are stopped (Step S).
3). By stopping the read pulses XSG1 and XSG2 in this manner, as is clear from the timing chart of FIG. 4B, signal charges can be accumulated in each of the photosensors 31 for a long time. Since amplification can be performed, defective pixels can be accurately detected.

Next, the imaging output of the CCD solid-state imaging device 3 is input as an inspection signal to the comparator 21 of the defect detection circuit 9 (step S4). In the defect detection circuit 9,
A defective pixel is detected by the comparison output of the comparator 21 when the imaging output level of the CCD solid-state imaging device 3 becomes equal to or higher than a predetermined detection level (step S5), and then the address of the defective pixel is detected by the address detection conversion circuit 22. At the same time, the line address in the frame read drive is converted to the line address in the field read drive (steps S6 and S7), and the line address data is stored in the RAM 23 (step S8). From the above,
A series of processes of the defect detection in the frame read driving is completed.

After a series of processing for defect detection is completed, the mode shifts to a normal imaging mode in which defect correction needs to be performed (step S9). Under the control of the microcomputer 4, the timing generator 5 reads the CCD solid-state imaging device 3 in the field. (Step S10). In this field read driving state, the address data for the defective pixel is read from the RAM 23 and given to the correction pulse generation circuit 12 (step S11). The correction pulse generation circuit 12 generates a defect correction pulse at a timing given by the data read from the RAM 23 (step S1).
2), supply to the defect correction circuit 8;

The defect correction circuit 8 specifies the imaging output of the defective pixel in the CCD output by using the defect correction pulse, and replaces the imaging output of the defective pixel with the pixel output of the immediately preceding pixel. Correction is performed (step S13). Then, it is determined whether or not the lens aperture 2 is open (step S14). If it is not open, the lens aperture 2 is opened and light is incident on the CCD solid-state imaging device 3 (step S15), and a normal imaging mode is set. enter. Or later,
Until the imaging mode ends, the above-described series of defect correction processing is repeatedly executed.

As described above, the CCD solid-state image pickup device 3 is driven in a frame read mode for a long period of time when a defect is detected. In the frame read operation, the signal charges stored in each pixel are transmitted over two fields. Since reading can be performed without pixel mixing, defect inspection in a pixel unit can be performed in a short time, and since only a defect level can be amplified by accumulation for a long time, a defective pixel can be detected with high accuracy. In addition, in the case of long-time accumulation, the generation of the read pulse XSG is stopped only for a predetermined field, and the vertical transfer clock VCLK is continuously generated during the stop period. Defect inspection can be performed on all pixels.

In the above embodiment, the case where the present invention is applied to the CCD solid-state image pickup device 3 capable of correcting camera shake has been described. However, the present invention is applicable to this type of CCD solid-state image pickup device. The present invention is not limited to this.
Pixel defects can be detected by exactly the same operation regardless of whether it is compatible with the TSC system or PAL system. In the above embodiment, the case where the signal processing system in the CCD video camera is digitally described has been described. However, the present invention is not limited to this, and the present invention is also applicable to the case where the signal processing system is configured analogly. What you get.

Further, when the timing generator 5 generates all timing signals based on the vertical synchronizing signal VD, it is desired to stop the generation of the read pulse XSG for the vertical synchronizing signal VD input to the timing generator 5. Even when blanking is applied to the portion, the same drive operation for defect detection as in the above embodiment can be realized.

[0030]

As described above, according to the present invention,
In a solid-state imaging device driven by field reading, which is adopted as a general driving method, a frame is read when a defect is detected, and driving is performed by accumulation for a long time. Since the stored signal charges can be read out without mixing pixels over two fields, defect inspection can be performed in a short period of time on a pixel-by-pixel basis, and furthermore, only a defect level can be amplified by long-time accumulation. Defective pixels can be accurately detected.

In addition, during the long-time accumulation driving, generation of the read pulse is stopped for an even number of fields of 4 or more ,
After that, the read pulse is generated to
By reading the signal charges and continuously generating the vertical transfer clock to output the signal charges of all the pixels, the information of all the pixels can be read.
Because, in the corresponding solid-state imaging device camera shake correction, thereby capable of performing a defect inspection for all the pixels. Furthermore, since it can be easily realized only by the timing control of the read pulse and the vertical transfer clock, it can be easily applied to the current camera system.

[Brief description of the drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention having a digital signal processing configuration applied to a CCD camera.

FIG. 2 is a block diagram illustrating a configuration example of a CCD solid-state imaging device that supports camera shake correction.

FIGS. 3A and 3B are timing charts at the time of field read driving, in which FIG. 3A shows a case of normal operation, and FIG. 3B shows a case of camera shake response and long-time accumulation.

4A and 4B are timing charts at the time of frame readout driving, where FIG. 4A shows a case of normal operation, FIG. 4B shows a case of normal long-time accumulation, and FIG. 4C shows a case of long-time accumulation for camera shake. Are respectively shown.

5A and 5B are timing charts at the time of accumulation of 10 frames (20 fields), where FIG. 5A shows a case of normal long-time accumulation and FIG. 5B shows a case of long-time accumulation corresponding to camera shake.

FIG. 6 is a flowchart illustrating an algorithm of defect detection and defect correction according to the present invention.

[Explanation of symbols]

 Reference Signs List 3 CCD solid-state imaging device 4 Microcomputer 5 Timing generator 8 Defect correction circuit 9 Defect detection circuit 12 Correction pulse generation circuit 21 Comparator 22 Address detection conversion circuit 23 RAM

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H04N 5/335

Claims (6)

(57) [Claims] 1. A solid-state imaging device comprising a photosensor two-dimensionally arranged in a matrix and vertical transfer registers arranged for each vertical column of the photosensors, wherein a signal charge is transferred from the photosensor to the vertical transfer register. together with the read pulses and to drive the vertical transfer register to generate the vertical transfer clock for vertical transfer of signal charges to be read, the solid in normal imaging
Drives the body image pickup device in the field reading, at the time of defect detection <br/> the timing generator for solid-state image pickup element driving at frame readout, four or more even occurrence of the read pulse when the defect detection
Number of fields and then the readout pulse
To read out the signal charges of all the pixels, and to continuously generate the vertical transfer clocks to read out all the pixels.
Control means for controlling the timing generator so as to output the signal charge of the defect, defect detection means for detecting a defective pixel based on an imaging output level of the solid-state imaging device, and a memory for storing defect data for the defective pixel. A defect detection device comprising: 2. The defect detection device according to claim 1, wherein the solid-state imaging device has a camera shake correction function. 3. A defect correction device using the defect detection device according to claim 1, wherein the correction pulse generation means generates a defect correction pulse at a timing given by defect data read from the memory; A defect correction unit that performs defect correction on an imaging output of the solid-state imaging device in response to a defect correction pulse. 4. A photo two-dimensionally arranged in a matrix.
Sensors and verticals arranged for each vertical column of the photosensors
A solid-state imaging device having a transfer register; and a signal charge from the photosensor to the vertical transfer register.
Pulse and the vertical transfer register read for reading
Vertical transfer to drive the signal and vertically transfer the signal charge
A clock is generated, and during normal imaging, the fixed
When the body image sensor is driven by field reading and a defect is detected
Is a driver for driving the solid-state imaging device by frame reading.
A solid characterized by comprising an imming generator
Imaging device. 5. A solid-state imaging device having photosensors arranged two-dimensionally in a matrix and vertical transfer registers arranged for each vertical column of the photosensors, and reading out signal charges from the photosensors to the vertical transfer registers. And a vertical transfer clock for vertically transferring signal charges by driving the vertical transfer register, and at the time of ordinary imaging , the fixed transfer signal is read.
Drives the body image pickup device in the field reading, at the time of defect detection <br/> the timing generator for solid-state image pickup element driving at frame readout, four or more even occurrence of the read pulse when the defect detection
Number of fields and then the readout pulse
To read out the signal charges of all the pixels, and to continuously generate the vertical transfer clocks to read out all the pixels.
Control means for controlling the timing generator so as to output the signal charge of the defect, defect detection means for detecting a defective pixel based on an imaging output level of the solid-state imaging device, and a memory for storing defect data for the defective pixel. A camera comprising: 6. The camera according to claim 5, further comprising: a correction pulse generator that generates a defect correction pulse at a timing given by the defect data read from the memory; and the solid-state imaging device in response to the defect correction pulse. And a defect correcting means for performing defect correction on the imaging output of the camera.