JPH04115785A - Luminescent spot detector - Google Patents

Abstract

PURPOSE:To detect the position of a defecting picture element accurately by repeating increasing or decreasing the data of each picture element stored in a storage means for plural fields so as to increase only a data corresponding to a luminescent spot in the data of each picture element. CONSTITUTION:An image pickup output signal from a CCD image sensor 4 is compared with a reference signal at a comparator 10, an increment/decrement circuit 12 reads the data corresponding to each picture element of the CCD image sensor 4 stored in a memory 14 and increases or decreases the data in response to a differential output from the processing 10 and stores the result to the memory 14 and the operation above is repeated for plural fields. Thus, since only the data corresponding to a defect picture element from which an image pickup output signal of a specific level is outputted has a large level, the position of the defect picture element is accurately detected without being affected by random noise or the like superimposed on the image pickup output signal and the result is stored in the memory 14 as a defect picture element data being a luminescent spot data.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a bright spot detection device for detecting bright spots caused by defective pixels of a CCD image sensor or the like made of a COD (charge-coupled device), for example.

[Summary of the invention]

The present invention stores data in an address corresponding to each pixel of one frame of an image in a storage means, and compares the levels of an input video signal and a reference signal in a comparison means, so that the image represented by the input video signal is The data stored at the address of the storage means corresponding to each pixel of is incremented or decremented by the increment/decrement means according to the comparison output from the comparison means, and the data of each pixel stored in the storage means is By repeating the operation of incrementing or decrementing for multiple fields and storing the bright point data in the storage means, only the data in the storage means corresponding to the bright points in the display image becomes a large value, and the bright point data is stored in the storage means. This bright spot detection device is capable of detecting the position of a bright spot without being affected by random noise or the like.

[Conventional technology]

In general, in solid-state imaging devices formed from semiconductors such as CCDs, local crystal defects in the semiconductor cause defective pixels in which a constant bias voltage is always added to the imaging output signal depending on the amount of incident light. It is known that image quality deterioration occurs due to image pickup output signals from pixels. An image defect in which a constant bias voltage is always added to the image pickup output signal is called a white spot defect because it appears as a high-intensity spot on the monitor screen when the image defect signal is processed as is.

Conventionally, when detecting bright spots caused by defective pixels,
Summation averaging has been used as an averaging method to remove random noise superimposed on imaging output signals.

FIG. 3 shows a functional block diagram of an arithmetic circuit that performs this total averaging.

In this FIG. 3, the total average calculation circuit includes an adder 52
．． Consisting of an averaging circuit 53 and a delay circuit 54, "X'
The imaging output signal of the current frame, “z−
“y” is the averaged imaging output signal of the previous frame, “
The image pickup output signal is subjected to arithmetic processing based on the theory shown in equation (1) using Y' as the output image pickup output signal.

That is, the adder 52 is supplied with the averaged image pickup output signal (Z-'Y) of the previous frame from the delay circuit 54. The averaged imaging output signal (Z-'Y) of the previous frame is added to the imaging output signal (X) of the current frame supplied from the input terminal 51, and the averaging circuit 53
is supplied to The averaging circuit 53 includes the adder 53
The level of the image pickup output signal supplied from the image pick-up output signal is averaged to 1/2, and the averaged image pickup output signal (Y) is outputted from the output terminal 55.

In this way, by adding the averaged imaging output signal of the previous frame and the imaging output signal of the current frame, and performing the operation of averaging the added imaging output signal over multiple frames, the above-mentioned input Even if random noise is superimposed on the imaging output signal, it can be canceled during the above averaging.

When such summation and average calculation processing is actually performed, a configuration as shown in FIG. 6 is adopted.

In FIG. 6, the adder shifter 58 corresponds to the adder 52 and the averaging circuit 53, and the delay for one frame performed in the delay circuit 54 is as follows:
This is done by reading out the imaging output data stored in the frame memory 59.

That is, the imaging output signal of the current frame supplied via the input terminal 56 is digitized by the A/D conversion circuit 57 and supplied to the adder shifter 58 as imaging output data. When the adder shifter 58 is supplied with the imaging output data of the current frame, it reads the imaging output data of the previous frame from the frame memory 59, and combines the imaging output data of the previous frame with the imaging output data of the current frame. are added, averaged to reduce the level to 1/2, and this averaged imaging output data is supplied to the frame memory 59. This averaged imaging output data is stored in the frame memory 59 as bright point data. Note that reading and writing of imaging output data from the frame memory 59 is performed by the address counter 60.
controlled by

In this way, the frame memory 59 in which the bright point data is stored is provided together with the solid-state image sensor when the solid-state image sensor is used as the image sensor of the solid-state image sensor. When the solid-state imaging device takes an image, the frame memory 5
For example, the bright spot data is read from 9, and the imaging output signal from the defective pixel indicated by this bright spot data is not output, and instead of the imaging output signal from this defective pixel, the imaging from the pixel before the defective pixel is performed. Pixel unevenness is corrected by outputting an output signal.

[Problem to be solved by the invention]

However, in order to perform arithmetic processing based on the theory shown in FIG. 5 to remove random noise, a circuit configuration as shown in FIG. 6 is actually required. The A-D converter 57 and the adder shifter 58 for digitizing the image pickup output signal for addition processing and shift down processing are required, resulting in high cost.

Furthermore, when the image carrier output data of the current frame is supplied, the total average calculation circuit shown in FIG. 6 reads out the imaging output data of the previous frame stored in the frame memory 59, and Add the imaging output data of the frame and the imaging output data of the current frame, average the level of the added imaging output signal to 1/2, and use this averaged imaging output signal as the bright point data for the above frame. There are many processing steps involved in the signal processing of the (2) cycle, such as storing in the memory 59.

The present invention has been made in view of the above-mentioned problems, and it is an object of the present invention to provide a bright spot detection device that can accurately detect the position of a bright spot with simple operation and without being affected by random noise. purpose.

[Means to solve the problem]

The present invention provides storage means for storing data at addresses corresponding to each pixel of one frame of an image, comparison means for comparing the levels of an input video signal and a reference signal, and an image represented by the input video signal. an increment/decrement means for incrementing or decrementing the data stored at the address of the storage means corresponding to each pixel of the storage means in accordance with the comparison output from the comparison means; The above-mentioned problem is solved by storing bright spot data in the storage means by repeatedly incrementing or decrementing pixel data over a plurality of fields.

[Effect]

The bright spot detection device according to the present invention repeatedly performs the operation of incrementing or decrementing the data of each pixel stored in the storage means for a plurality of fields.
Among the data of each pixel stored in the storage means,
Since only the data corresponding to the bright spot is incremented, the position of the defective pixel can be accurately detected without being affected by random noise or the like.

〔Example〕

Embodiments of the bright spot detection device according to the present invention will be described below with reference to the drawings.

The bright spot detection device according to the present invention can be provided, for example, in a solid-state imaging device as shown in FIG.

The solid-state imaging device shown in FIG. 1 is a CCD image sensor that is a solid-state imaging device in which a subject image is formed on an imaging surface by imaging light incident through an imaging optical system 3 such as an imaging lens l and an iris mechanism 2. A sensor 4 is provided in the imaging section.

The iris mechanism 2 of the imaging optical system 3 controls the amount of imaging light irradiated onto the imaging surface of the CCD image sensor 4, and is an iris drive that operates in response to an iris control signal supplied from the system controller 5. It is driven to open and close by section 6.

The CCD image sensor 4 is driven by a CCD drive section 7 that outputs a vertical drive clock (V) and a horizontal drive clock (H) in response to a CCD control signal supplied from the system controller 5. The imaging operation is performed in the operation mode specified by 5.

The CCD image sensor 4 includes, for example, a vertical transfer register VR provided along the vertical direction on one side of a large number of light receiving sections S corresponding to each pixel arranged in a matrix as shown in FIG. , each of these vertical transfer registers HR, and transmits the signal charge obtained by each of the light receiving sections S according to the amount of received light to each vertical transfer register VR corresponding to each vertical line, for example, every one field period or one frame period. The signal charge is transferred to the horizontal register HR through each of the vertical registers VR, and the signal charge for each horizontal line is extracted from the horizontal register HR as an imaging output. is used.

Here, for example, when the switch 15 is turned on and the operation mode becomes the defective pixel position detection mode, the system controller 5 controls the iris mechanism 2 that controls the amount of imaging light irradiated onto the imaging surface of the CCD image sensor 4. A sample and hold circuit (CDS) 8 supplies an iris control signal for closing the iris to the iris drive section 6, supplies a CCD control signal for specifying frame readout of the CCD image sensor 4 to the CCD drive section 7,
A first sampling pulse SHP and a second sampling pulse SHD are supplied to the first sampling pulse SHP and the second sampling pulse SHD.

As a result, the CCD image sensor 4 has the CC
A vertical drive clock (V) and a horizontal drive clock (H) are supplied from the D drive circuit 7. Note that the vertical drive clock and horizontal drive clock are also supplied to the address counter 16.

The CCD image sensor 4 is driven by the supplied vertical drive clock and horizontal drive clock, and supplies an imaging output signal to the sample hold circuit 8.

The sample-and-hold circuit 8 is a correlated double sample-and-hold circuit that reduces the random noise component of the imaging output signal CCD, , T from the CCD image sensor 4 by a correlated double sample-and-hold method, as shown in FIG. The black level L of the imaging output signal CCD, A, is sampled and held by a first sampling pulse SHP, and the black level signal S LIIP sampled and held by this first sampling pulse SHP is further processed by a second sampling pulse. Sample and hold is performed by SHD, and the above-mentioned imaging output signal CCD. ul
The video level L of the above second sampling pulse SH
The difference between the black level signal S LBD sampled and held by the second sampling pulse SHD and the video level signal S L8 is determined as the video signal S. Take it out as Ua. This extracted video signal S. Ua is supplied to a video signal processing system (not shown) via an amplifier 9, and is also supplied to a comparator 10.

The comparator IO receives a reference signal 1s from the reference signal output circuit 11 in addition to the video signal SQLIT.

is supplied. This reference signal S2. , the level of
For example, the level is set to be slightly higher than the video signal from a normal pixel obtained when the iris mechanism 2 is closed (during defective pixel detection mode). The comparator IO compares the levels of the video signal S QLIT and the reference signal S r a I, and supplies the difference to an increment/decrement circuit 12 which is an increment/decrement means.

That is, since the level of the video signal from the defective pixel is higher than the level of the video signal from the normal pixel, when the video signal from the defective pixel is supplied to the comparator 10, the reference A positive difference is generated by comparison with the signal S r *I.

Here, the memory 14 is the CCD shown in FIG. 4(a).
Each pixel G, , , G, , , C of the image sensor 4;

The same figure (b) corresponding to G a4+ Gas...
Memory areas M, , , M, , , M, , , M, , , M shown in
,,······have. Note that this memory 14
Each memory area Ma l + Ma @ + M *
3+M a 4 + M a % . . . stores data with a uniform level in advance.

When the increment/decrement circuit 12 is supplied with the differential output from the comparator IO, it reads data corresponding to the pixel of the supplied differential output from the memory area of the memory 14. Then, if the difference output is a "positive" difference output, the read data is incremented, and if the difference output is other than "positive", the read data is decremented. . This incremented or decremented data is again supplied to the memory 14 and stored in a predetermined memory area. Note that read and write control of data in the memory area of the memory 14 is performed by the address counter 16 to which the horizontal drive clock and vertical drive clock of the CCD image sensor are supplied.

The system controller 5 increments or increments the data stored in the memory areas M, . Control is performed so that the decrementing operation is repeated for several fields of data stored in all memory areas. As a result, the video signal may exceed the reference level due to random noise, etc.
The data in the memory area corresponding to the pixel that falls below is
Since the data is incremented and decremented, it gradually returns to the original level, and the data in the memory area corresponding to the defective pixel whose video signal always exceeds the reference level is incremented every time, so the level of the data becomes large. A pixel corresponding to a large-level memory area on this memory 14 is a defective pixel that outputs all the imaging output signals (bright spots) at a singular level, and the memory 14 stores these data as defective pixel data that is bright spot data. Remember.

In this way, the defective pixel data stored in the memory 14 is read out during the imaging mode.

That is, in the imaging mode, the system controller 5 supplies an iris control signal for opening the iris mechanism 2 to the iris drive section 6, and a COD control signal for designating frame readout of the CCD image sensor 4 to the CCD drive section. 7, and also supplies the first sampling pulse S to the sample hold circuit 8.
HP and the first sampling pulse SHD are supplied.

Further, the system controller 5 controls the memory 14 so that defective pixel data is read out from the memory 14 in synchronization with the horizontal synchronization clock transmitted from the CCD drive unit 7.

As a result, the CCD image sensor 4 has a CCD
A vertical drive clock and a horizontal drive clock are supplied from the drive circuit 7. The CCD image sensor 4 converts the imaging light irradiated via the iris mechanism 2 into an imaging output signal using the vertical drive clock and the horizontal drive clock, and supplies this to the sample hold circuit 8 .

The sample and hold circuit 8 samples and holds the black level LB of the imaging output signal CCD out using the first sampling pulse SHP, as described above,
The black level signal S LIP sampled and held by this first sampling pulse SHP is sampled and held by this first sampling pulse SHP, and the black level signal S LIP sampled and held by this first sampling pulse SHP is further sampled and held by a second sampling pulse SHD. The video level L of A is sampled and held by the second sampling pulse SHD, and the black level signal S sampled and held by the second sampling pulse SHD.
The difference between LBD and video level signals SL and D is the video signal S. Take it out as Ua. However, when the system controller 5 performs signal processing of an imaging output signal from a defective pixel that outputs an imaging output signal of a specific level at a position indicated by the defective pixel data read from the memory 14, , the supply of the first sampling pulse SHP and the second sampling pulse SHD is stopped. As a result, so-called zero-order hold is performed in the sample and hold circuit 8, and the imaging output signal of a peculiar level from the defective pixel is not sampled and held, but the imaging output signal from the normal pixel before the defective pixel is sampled and held. A sampled and held video signal will be output.

Therefore, a video signal obtained by sample-holding the imaging output signal at the above-described specific level is not output.

The video signal after the correction of the imaging output signal of the unusual level is amplified by the amplifier 9 and supplied to, for example, a monitor device or the like via a video signal processing system (not shown). Since the image output signal from the defective pixel is corrected as described above, the image displayed on this monitor device becomes clear without pixel unevenness.

As is clear from the above description, the bright spot detection device according to the present invention compares the imaging output signal from the CCD image sensor 4 with a reference signal in the comparator 10, and the increment/decrement circuit stores the image in the memory 14. The stored data corresponding to each pixel of the CCD image sensor 4 is read out, the data is incremented or decremented according to the differential output from the comparator 10, and stored in the memory 14, and such operations are performed. By repeating the process for multiple fields, among the data stored in the memory 14, only the data corresponding to the defective pixel that outputs the imaging output signal of a singular level becomes a large value, so that random noise etc. superimposed on the imaging output signal becomes large. It is possible to accurately detect the position of a defective pixel that outputs an imaging output signal of a singular level without being influenced by the above, and to store this in the memory 14 as defective pixel data that is bright spot data.

Further, by correcting the imaging output signal at a unique level based on the defective pixel data that indicates the accurate position of the defective pixel stored in this way, a clear image without pixel unevenness can be obtained.

〔Effect of the invention〕

The bright spot detection device according to the present invention stores data in an address corresponding to each pixel of one frame of an image in a storage means, and compares the levels of an input video signal and a reference signal in a comparison means, and The data stored in the address of the storage means corresponding to each pixel of the image indicated by the video signal is incremented or decremented by the increment/decrement means according to the comparison output from the comparison means, and the data is stored in the storage means. By repeating the operation of incrementing or decrementing the data of each pixel in multiple fields and storing the bright point data in the storage means, only the data in the storage means corresponding to the bright points in the display image becomes a large value and the corresponding data is stored. Since the bright spot data is stored in the storage means, it is difficult to detect the position of the bright spot without being affected by random noise or the like.

[Brief explanation of drawings]

FIG. 1 is a block diagram when a bright spot detection device according to the present invention is provided in a solid-state imaging device, FIG. 2 is a schematic diagram showing the structure of a CCD image sensor provided in the solid-state imaging device, and FIG. 3 is a time chart for explaining the operation of the sample and hold circuit provided in the solid-state imaging device,
FIG. 4 is a schematic diagram for explaining the internal structure of the CCD image sensor and memory. FIG. 5 is a functional block diagram for explaining the signal processing process of the summation-average system arithmetic circuit, and FIG. 6 is a block diagram of the summation-average system arithmetic circuit. 1...Imaging lens 2...Iris mechanism 3...Imaging optical system 4...・CCD image sensor 5...
・Water...System controller 6...
...Iris drive section 7 ....... CCD drive section 8 ...... Sample hold circuit 9 ...
......Amplifier 10...Comparator 11...Reference signal output circuit 12...
...Increment/decrement circuit 14
··········memory

Claims (1)

[Scope of Claims] Storage means for storing data at addresses corresponding to each pixel of one frame of an image; comparison means for comparing the levels of an input video signal and a reference signal; an increment/decrement means for incrementing or decrementing data stored at an address of the storage means corresponding to each pixel of the image to be stored in the storage means in accordance with a comparison output from the comparison means; A bright spot detection device characterized in that bright spot data is stored in the storage means by repeatedly performing an operation of incrementing or decrementing data of each pixel in a plurality of fields.