JP3208595B2 - Charge transfer device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention
This is particularly suitable for use in a CCD image sensor, a CCD linear sensor, or the like.

[0002]

2. Description of the Related Art A CCD image sensor, a CCD linear sensor, a CCD delay line, and the like can be cited as examples in which a charge transfer portion is constituted by a CCD.

[0003] Among them, for example, an interline type C
In the CD image sensor, as shown in FIG. 9, light receiving sections 21 each composed of a photodiode are arranged in a matrix in the horizontal and vertical directions, and are provided in common corresponding to the light receiving sections 21 on a common vertical line. Vertical register 22
And a horizontal register 23 provided commonly to each vertical register 22.

In the charge accumulation period, the light receiving section 21
Is read out to the vertical register 22 in the next readout period, the signal charge is transferred row by row in the horizontal blanking period, and the signal charge stored in the last stage of the vertical register 22 is read out horizontally. Transfer to register 23. Then, in the next horizontal output period (1 of the television)
(Corresponding to a horizontal scanning period).
The upper signal charges are sequentially transferred to the output unit 24 side, and
Is performed as an image pickup signal S.

In particular, the vertical register 22 is, for example, 4
Transfer stages each having one set of transfer electrodes are arranged in the vertical direction. By applying drive pulses having different phases to each transfer electrode, the signal charges read from the light receiving unit 21 to the vertical register 22 are horizontally transferred. Transfer to the register 23 side.

In recent years, in order to improve the transfer efficiency of signal charges, a resistor having the same value is connected to each transfer electrode.
The waveform of the drive pulse (square pulse) applied to each transfer electrode is blunted by the time constant of the additional capacitance formed between each transfer electrode and the vertical register 22.

[0007]

When each transfer electrode is formed on the vertical register 22, the transfer electrode is formed using the wiring formation area between the light receiving sections 21, but all the four transfer electrodes are formed in the same pattern. It is impossible to form. Therefore, in forming the wiring, the contact area of each transfer electrode with the vertical register 22 inevitably varies.

For example, as shown in FIG. 10, the transfer electrodes G1 and G3 to which the driving pulses V1 and V3 are applied are changed to the transfer electrodes G2 and G to which the driving pulses V2 and V4 are applied.
4, the additional capacitance of the transfer electrodes G1 and G3 becomes larger than the additional capacitance of the transfer electrodes G2 and G4 when the contact area with the vertical register 22 is larger than that of the drive pulse V1 and the drive pulse V1 due to the time constant. V3 is the drive pulse V
2 and V4.

Accordingly, as shown in FIG. 11, for example, t ₁
At the time, the driving pulse V1 applied to the transfer electrode G1
While no Kira lowered, the rise drive pulse V4 is applied to the transfer electrodes G4 adjacent, and in time t _2, while the drive pulse V2 applied to the transfer electrode G2 is not Kira lowered, the transfer electrodes adjacent G1 Drive pulse V1 applied to the vertical register 2 rises.
2 has a problem that the maximum amount of charge to be handled is reduced and the characteristics are deteriorated.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and an object of the present invention is to improve the transfer efficiency of signal charges without reducing the maximum amount of charges handled in the charge transfer region. It is an object of the present invention to provide a charge transfer device which can be used.

[0011]

According to the present invention, a predetermined number of transfer electrodes G1 and G2 are provided on a charge transfer region 2 formed in a substrate 1.
G2, G3, and G4 as a set are arranged in multiple stages, and drive pulses V1, V2, V3, and V4 having different phases are respectively applied to the transfer electrodes G1, G2, G3, and G4 of each transfer stage.
Is applied, the signal charge e in the charge transfer region 2
Transfer device sequentially transfers the transfer electrodes G1, G2, G3, and G4 to the transfer electrodes G1, G2, G3, and G4.
Additional capacity C1, C2, C3 and C of G2, G3 and G4
Resistances R1, R2, R3 and R4 having a value corresponding to
The connection is made at the periphery of the image area 11 .

[0012]

According to the configuration of the present invention described above, each transfer electrode G
, G2, G3, and G4 to transfer electrodes G1, G2, G
Image of resistors R1, R2, R3 and R4 having values corresponding to the additional capacitances C1, C2, C3 and C4 of G3 and G4
Since the connection is made at the periphery of the area 11, the driving pulses V1, V2, V3 and V4 applied to the transfer electrodes G1, G2, G3 and G4 can be made almost the same. From this, for example, the drive pulse V
Before the drive pulse V1 applied to the transfer electrode G1 to which 1 is applied falls, the drive pulse V4 applied to the adjacent transfer electrode G4 does not rise, and the maximum handled charge amount of the charge transfer region 2 is reduced. The transfer efficiency of the signal charges e can be improved without reducing the transfer rate.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS. FIG. 1 is a schematic configuration diagram showing a principle structure of a CCD image sensor according to the present embodiment, particularly, a vertical transfer portion thereof.

As shown in the figure, the vertical transfer portion according to the present embodiment has a structure in which, for example, a vertical register 2 formed of an N-type impurity diffusion region band is formed on a P-type silicon substrate 1, and a gate insulating layer is formed on the vertical register 2. A transfer stage having a set of four transfer electrodes G1, G2, G3 and G4 via the film 3 is arranged in the vertical direction (Y direction).

The transfer electrodes G1, G2, G3 and G4 are respectively connected to the vertical registers 2 according to the formation pattern.
There is a case where the contact area differs from the contact area. In the illustrated example, if the contact areas of the transfer electrodes G1, G2, G3, and G4 with the vertical register 2 are A1, A2, A3, and A4, respectively, A
It is assumed that 1>A2>A3> A4. Therefore,
The additional capacitance C1, of the transfer electrodes G1, G2, G3 and G4
C2, C3, and C4 have a relationship of C1>C2>C3> C4.

In such a case, in this example, resistors R1, R2, R3, and R4 having different values are connected to the transfer electrodes G1, G2, G3, and G4, respectively. The magnitude relationship between the resistors is R1 <R2 <R3 <R4. These resistors R
1, R2, R3, and R4 are values of the transfer electrodes G1, G2,
The respective time constants C1 · R1, C2 · R2 of G3 and G4,
C3 · R3 and C4 · R4 are set to be substantially the same.

As a result, the input terminals φ1, φ2, φ3, and φ4 of the transfer electrodes G1, G2, G3, and G4 are applied to FIG.
Square driving pulses V having different phases as shown by
When V1, V2, V3, and V4 are applied, the drive pulses V1, V2, V3, and V4 are turned at substantially the same ratio due to the time constant, and the waveforms of the drive pulses V1, V2, V3, and V4 are shown in FIG. 2B. Become like In general, the transfer efficiency of the signal charge depends on, for example, a period during which each of the driving pulses V1, V2, V3, and V4 switches from a high level to a low level. The longer the switching period, the higher the transfer efficiency.

Therefore, in this embodiment, each drive pulse V
The waveforms of 1, V2, V3 and V4 are distorted by the time constants of the additional capacitors C1, C2, C3 and C4 and the additional resistors R1, R2, R3 and R4. This is longer than in the case, and the transfer efficiency of the signal charge is improved.

Further, since each drive pulse V1, V2, V3 and V4 are rounded at approximately the same rate, for example at t _2:00 in Figure 2B, while the drive pulse V1 is not Kira lowered, that the transfer pulse V4 rises The phenomenon decreases stochastically. In addition, since the output timing of each of the drive pulses V1, V2, V3, and V4 can be easily predicted, an optimum period from the rise to the fall of each of the drive pulses V1, V2, V3, and V4 can be easily set. The above phenomenon can be completely eliminated.

Here, each drive pulse V1, shown in FIG.
How the signal charges are transferred by applying V2, V3 and V4 will be described with reference to FIG.

First, at time t ₀ , since the driving pulses V 1 and V 2 are at a high level, the transfer electrodes G 1 and G 2
2, a continuous potential well is formed, and the signal charge e is transferred and accumulated in this potential well.

[0022] At time following t _1, since the drive pulse V3 goes high, the potential under the transfer electrode G3 becomes deeper, the transfer electrodes G1, G2 and G3 potential wells successively beneath is formed, the signal The charge e is transferred and accumulated in this potential well. Since the switching period from t ₀ to the high level of the drive pulse V3 subjected at t ₁ is longer by the time constant of the transfer electrode G3, the signal charges e are efficiently over the lower transfer electrodes G3 from the transfer electrodes G1 and G2 Transfer Is done.

Next, t_TwoAt the time, the driving pulse V1 is
Since the level becomes low, the potential below the transfer electrode G1 is reduced.
And the signal charge e is below the transfer electrodes G2 and G3.
Transferred to and accumulated in the potential well
It is. At this time, t₁To t _TwoDrive pulse V over time
1 is a time constant of the transfer electrode G1 during the switching period to the low level.
Is longer, the signal under the transfer electrode G1 is
The signal charge e is continuously formed below the transfer electrodes G2 and G3.
Efficiently transferred to the potential well.

Next, at time t ₃ , since the driving pulse V4 is at a high level, the potential below the transfer electrode G4 is deepened, and a continuous potential well is formed below the transfer electrodes G2, G3 and G4. The signal charge e is transferred and stored in the potential well. Since the switching period from t ₂ to the high level of the drive pulse V4 toward at t ₃ is longer by the time constant of the transfer electrodes G4, the signal charges e are efficiently over the lower transfer electrode G4 from the transfer electrodes G2 and G3 Transfer Is done.

Next, t_FourAt the time, the driving pulse V2 is
Since the level becomes low, the potential below the transfer electrode G2
And the signal charge e is below the transfer electrodes G3 and G4.
Transferred to and accumulated in the potential well
It is. At this time, t_ThreeTo t _FourDrive pulse V over time
2 is the time constant of the transfer electrode G2
, The signal under the transfer electrode G2
The signal charge e is continuously formed below the transfer electrodes G3 and G4.
Efficiently transferred to the potential well.

Next, the time t _5, the drive pulse V1 from becoming high, becomes deeper the potential under the transfer electrodes G1, transfer electrodes G3, G4 and potential wells successively under G1 are formed, The signal charge e is transferred and stored in the potential well. Since the switching period from t ₄ to the high level of the drive pulse V1 toward times t ₅ becomes longer by the time constant of the transfer electrodes G1, the signal charges e are efficiently over lower G1 transfer electrodes from the transfer electrodes G3 and G4 transfers Is done.

Next, t₆At the time, the driving pulse V3 is
Since the level is low, the potential below the transfer electrode G3
The signal charge e is below the transfer electrodes G4 and G1.
Transferred to and accumulated in the potential well
It is. At this time, t_FiveTo t ₆Drive pulse V over time
3 is a time constant of the transfer electrode G3 during the period of switching to the low level.
, The signal under transfer electrode G3
The signal charge e is continuously formed below the transfer electrodes G4 and G1.
Efficiently transferred to the potential well.

Next, the time t _7, the drive pulse V2 is from becoming high level, the potential under the transfer electrode G2 becomes deeper, the transfer electrodes G4, G1 and G2 potential wells successively beneath is formed, The signal charge e is transferred and stored in the potential well. Since the switching period from t ₆ to the high level of the drive pulse V2 toward at t ₇ is longer by the time constant of the transfer electrodes G2, the signal charges e are efficiently over the lower transfer electrode G2 from the transfer electrodes G4 and G1 transfers Is done.

Next, t₈At the time, the driving pulse V4 is
Since the level becomes low, the potential below the transfer electrode G4
And the signal charge e is below the transfer electrodes G1 and G2.
Transferred to and accumulated in the potential well
It is. At this time, t₇To t ₈Drive pulse V over time
4 is a time constant of the transfer electrode G4 during the period of switching to the low level.
, The signal under transfer electrode G4
The signal charge e is continuously formed below the transfer electrodes G1 and G2.
Efficiently transferred to the potential well.

By the above-described series of operations, the signal charge e in one transfer stage is transferred to the next transfer stage.
Then, by repeating the series of operations, the signal charges e on the vertical register 2 are sequentially transferred to the horizontal register (not shown).

Next, the configuration according to the above embodiment is replaced with an actual CC.
A case where the present invention is applied to a D image sensor will be described with reference to FIGS.

FIG. 4 is a perspective view of the CCD image sensor according to the present embodiment, particularly showing a vertical transfer portion thereof partially cut away. In this figure, reference numeral 4 denotes a light receiving section. In addition, the same reference numerals are given to those corresponding to FIG.

As shown in the figure, the vertical transfer portion of this CCD image sensor has a first drive pulse V1 applied thereto.
And the third transfer electrode G3 to which the drive pulse V3 is applied is formed in the same pattern, respectively, and the second transfer electrode G2 and the drive pulse V4 to which the drive pulse V2 is applied.
Are formed in the same pattern, respectively, and the first and third transfer electrodes G1 and G3 are applied.
Have a wiring width of the second and fourth transfer electrodes G2 and G4
, And the contact area with the vertical register 2 is widened. From this, the first and third
The transfer electrodes G1 and G3 have a larger time constant due to the wiring resistance and the additional capacitance with the vertical register 2 than the second and fourth transfer electrodes G2 and G4.

Therefore, in this example, the values of the resistors R1 and R3 connected to the first and third transfer electrodes G1 and G3 are made equal to each other (R1 = R3), and the second and fourth transfer electrodes G
2 and G4 have the same value of the resistors R2 and R4 (R2 = R4), and the values of the resistors R1 and R3 are smaller than the resistors R2 and R4 (R1, R4).
3 <R2, R4).

Here, one experimental example will be described. In the configuration of FIG. 4, the case where the same value resistor is connected only to the first and third transfer electrodes G1 and G3 is a sample 1, and the case where the same value resistor is connected to each of the transfer electrodes G1, G2, G3 and G4. To sample 2, the second and fourth transfer electrodes G2 and G4
When the remaining amount of signal charge transfer in each of Samples 1, 2, and 3 was measured with Sample 3 having the same value of resistance connected to only Sample 1, as shown in FIG.
This configuration cannot be adopted irrespective of the value of the connected resistor because the remaining transfer amount is large.

On the other hand, with respect to Samples 2 and 3, as the value of the connected resistor increases, the remaining transfer amount decreases, and the transfer efficiency is improved. However, as shown in FIG. 6, when the change in the amount of handled charge is observed, the amount of handled charge of Sample 2 decreases from a resistance value of about 20Ω, whereas the amount of sample 3 tends to decrease from a resistance value of about 60Ω. , About 90Ω, the standard handling charge 1
It turns out that it decreases below 000 mV.

Accordingly, a large-value resistor is connected to the second and fourth transfer electrodes G2 and G4 having a small additional capacitance, and a small value is connected to the first and third transfer electrodes G1 and G3 having a large additional capacitance. It can be seen that the transfer efficiency can be significantly improved by connecting a resistor without sacrificing the amount of charge handled.

In the embodiment shown in FIG. 4, resistors R1 and R3 having a value of 20Ω are connected to the first and third transfer electrodes G1 and G3, and a value of 6 is connected to the second and fourth transfer electrodes G2 and G4.
It was configured by connecting 0Ω resistors R2 and R4.

Incidentally, the connection of the resistors R1, R2, R3 and R4 to the transfer electrodes G1, G2, G3 and G4
Taking a CD image sensor as an example, it is preferable to perform the operation in a wiring routing area in the periphery of the image area. That is, as shown in FIG. 7, each transfer electrode on the vertical register in the image area 11 in which the light receiving sections are arranged in a matrix is connected to the corresponding input terminal φ1 in the wiring routing area in the periphery of the image area 11. ,
Although they are electrically connected to φ2, φ3, and φ4 via the wirings 12a, 12b, 12c, and 12d, the wirings 12a, 12b, 12c, and 12d are configured as follows.

A wiring layer extending from each of the transfer electrodes G1, G2, G3 and G4 (usually a polycrystalline silicon layer is used)
12a, 12b, 12c and 12d and input terminals φ1, φ
2, the inner sides of φ3 and φ4 are electrically connected by resistance wires 13a, 13b, 13c and 13d having the same line width and length.

Then, each of the wiring layers 12a, 12b, 12c
And 12d and the respective resistance lines 13a, 13b, 13c and 13
d with, for example, Al wirings 14a, 14b, 14c and 14
Connect with d. At this time, the Al wirings 14a, 14b,
The connection positions a, b, c and d of the resistance wires 13a, 13b, 13c and 13d with the transfer electrodes G
1, G2, G3, and G4, the transfer electrodes G1, G2, G3, and G4 are appropriately selected.
Is connected to the resistors R1, R2, R3 and R4 according to the additional capacitance.

When each of the transfer electrodes G1, G2, G3 and G4 has the configuration shown in FIG. 4, the connection between the first and third transfer electrodes G1 and G3 is made to the resistance lines 13a and 13c in the Al wirings 14a and 14c. Positions a and c are set on the inner side of input terminals φ1 and φ3, respectively,
1 and R3, the second and fourth transfer electrodes G
Regarding 2 and G4, the connection positions b and d of the Al wirings 14b and 14d with the resistance lines 13b and 13d are set on the wiring layers 12b and 12d side, respectively, and the values of the resistors R2 and R4 are increased.

According to the above method, each transfer electrode G can be simply
1, G2, G3, and G4 each have a resistor R according to the added capacitance.
1, R2, R3 and R4 can be connected.

In the above example, an example in which the present invention is applied to a CCD image sensor is shown.
It can be applied to a D delay line.

[0045]

According to the charge transfer device of the present invention, the maximum handled charge amount of the charge transfer region is not reduced.
The transfer efficiency of signal charges can be improved.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram showing a principle structure of a CCD image sensor according to an embodiment, particularly, a vertical transfer portion thereof.

FIG. 2A is a waveform diagram showing a drive pulse (square pulse) supplied to an input terminal of the present embodiment. 7B is a waveform diagram of an actual driving pulse in the present embodiment.

FIG. 3 is an operation conceptual diagram showing a signal charge transfer operation according to the embodiment.

FIG. 4 is a perspective view showing an example of an actual formation pattern of a transfer electrode according to the present embodiment, partially cut away;

FIG. 5 is a characteristic diagram showing a change in a transfer remaining amount with respect to a resistance value of each sample.

FIG. 6 is a characteristic diagram showing a change in a handled charge amount with respect to a resistance value of Samples 1 and 2.

FIG. 7 is a schematic plan view showing a configuration of a peripheral portion of an image area according to the embodiment.

FIG. 8 is an explanatory view showing a connection method (forming method) of the resistor according to the embodiment.

FIG. 9 is a schematic plan view showing a general configuration of a CCD image sensor.

FIG. 10 is a schematic configuration diagram showing a vertical transfer portion of a conventional CCD image sensor.

FIG. 11 is a waveform chart showing inconvenience points of the conventional example.

[Explanation of symbols]

 G1 to G4 Transfer electrodes C1 to C4 Additional capacitance R1 to R4 Additional resistance V1 to V4 Drive pulse 1 Substrate 2 Vertical register 3 Gate insulating film

Continued on the front page (58) Fields surveyed (Int.Cl. ⁷ , DB name) H01L 21/339 H01L 27/14 H01L 27/148 H01L 29/762 H04N 5/335

Claims (1)

(57) [Claims] 1. A transfer stage having a predetermined number of transfer electrodes as a set is arranged in multiple stages on a charge transfer region formed on a base, and drive pulses having different phases are applied to each transfer electrode of each transfer stage. by, in the charge transfer device sequentially transferred to the output side of the signal charges of the charge transfer region, in each of the transfer electrodes, the peripheral portion of the image area resistor having a value corresponding to the additional capacitance of each transfer electrode in a charge transfer device, characterized in that connected.