JP3191290B2 - Semiconductor device manufacturing method and plasma CVD apparatus used in semiconductor device manufacturing method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for forming a contact for electrically connecting an element and a wiring.

[0002]

2. Description of the Related Art Conventionally, in order to make an electrical connection to an element such as a MOSFET, a MOSFET is formed on a semiconductor substrate, an interlayer insulating film is formed thereon, and a contact hole is opened in the interlayer insulating film. , The source electrode, the drain electrode, and the gate electrode of the MOSFET were exposed, a conductive material was buried in the opening to form a contact, and a wiring was formed thereon to connect to other elements and external electric terminals. .

FIGS. 8 and 9 show an example of the process. FIG. 8 is a cross-sectional view taken in parallel to the channel of the MOSFET structure. FIG. 9 is a cross-sectional view taken in a plane perpendicular to the channel length direction in FIG. It is sectional drawing.

First, as shown in FIGS. 8A and 9A, a gate oxide film 30 is formed on a p-type silicon substrate 301 in an element region partitioned by an element isolation silicon oxide film 302.
3, a gate electrode 304 having a polycide structure composed of a polycrystalline silicon film 305 and a tungsten silicide film 306.
And a sidewall 30 provided on a sidewall of the gate electrode
8 having a source / drain region 307
A T element is formed.

[0005] As shown in FIGS. 8B and 9B, after a BPSG film 309 is formed as an interlayer insulating film, a contact hole 311 connected to the source / drain region 307 and the gate electrode 304 is formed. As can be seen from the cross section shown in FIG. 9B, a contact hole is formed not on the channel but directly on the drawn portion of the gate electrode.

Next, as shown in FIGS. 8C and 9C, the surface of the BPSG film (including the side wall of the contact hole), the source / drain regions exposed in the contact hole and the gate electrode are exposed. A titanium film 312 is formed on the surface. At this time, a titanium silicide film 313 is formed on the surface of the source / drain region and the surface of the gate electrode by a reaction between silicon and titanium, so that the contact resistance with the contact plug is reduced.

Further, as shown in FIGS. 8D and 9D, a titanium nitride film 314 is formed on the entire surface by thermal CVD so as to fill at least the contact hole. This titanium nitride film is etched back to form a contact hole 3.
A plug is formed while leaving the titanium nitride film only in 11.
Thereafter, an aluminum alloy film is formed and etched into a predetermined pattern to form an upper wiring 3 shown in FIGS. 8 (e) and 9 (e).
15 are formed. The source / drain region and the gate electrode of the MOSFET are connected to another element or the outside by the upper wiring 315.

In the method of manufacturing a semiconductor device according to such a process, the titanium film shown in FIGS. 8C and 9C is formed by a plasma CVD method. This is because, for example, it is difficult to form a uniform film on both the bottom surface and the wall surface of the contact hole by the sputtering method, and when TiCl ₄ and H ₂ are used as the source gas, the substrate temperature is reduced by the thermal CVD method. While a high temperature of 1000 ° C or more is required,
This is because a substrate temperature of about 600 ° C. is sufficient if the plasma CVD method is used.

In the conventional plasma CVD method, first, Ar and H ₂ gas are introduced into an apparatus, RF power is applied to generate plasma, and after the plasma is stabilized to some extent (for example, after 1 to 5 seconds), TiCl _{4 is used.} The gas was started to flow to form the titanium film.

[0010] However, as shown in FIG. 10, Ar and H ₂
When a plasma is generated, charges accumulate on an interlayer insulating film such as the BPSG film 309, which causes a large potential difference between the gate electrode 304 and the silicon substrate 301, causing a problem of dielectric breakdown of the gate oxide film 303. there were.
In particular, with the recent miniaturization, the thickness of the gate oxide film becomes thinner, and the gate oxide becomes even more severe when the antenna ratio of the gate electrode (the total area of the gate electrode / the area of the gate electrode on the channel region) increases. Destruction of the film is becoming more likely. For example, when the gate oxide film is 150 °, dielectric breakdown by plasma CVD is not so problematic,
When the angle is about 100 °, the problem becomes extremely noticeable. When the aspect ratio of the contact hole (depth / diameter of the contact hole) increases, as shown in FIG. 10, the charge called the shading effect becomes larger, and the dielectric breakdown of the gate oxide film tends to become a problem. Become.

[0011]

SUMMARY OF THE INVENTION The present invention has been made in view of such a problem, and even when elements are integrated at a high density and high integration, the inside of a contact hole is formed by a plasma CVD method. It is an object of the present invention to provide a method of manufacturing a semiconductor device in which a gate insulating film is not damaged when a metal film is formed, and a plasma CVD apparatus used for the method.

[0012]

SUMMARY OF THE INVENTION According to the present invention, there is provided a semiconductor device, comprising:
In a method for manufacturing a semiconductor device including a step of forming a metal film by a plasma CVD method in a contact hole reaching an electrode of the element, the step of forming the metal film includes: After introducing a gas containing hydrogen and argon, a plasma is generated
Before Ruyori, a method of manufacturing a semiconductor device, wherein the film formation by introducing metal halide gas into the chamber is a step of forming a metal film in the contact hole.

As described above, according to the present invention, since the timing at which the metal halide is introduced into the film forming chamber is set before the generation of plasma, no electric charge is accumulated in the device electrode.
Even if the device electrode is in contact with a thin insulating film, the insulating film does not break down and does not deteriorate the characteristics of the device. For this reason, the present inventors presume that if a metal halide gas is present in the system when plasma is generated, a metal film is formed on the insulating film immediately upon generation of the plasma. As a result, the charge generated by the plasma escapes immediately and is neutralized, so that no charge is accumulated.

The instability of the plasma immediately after the RF power was turned on had no problem in actual film formation.

Further, the present invention is as a plasma CVD apparatus used in the method of manufacturing such a semiconductor device, comprising prior to the time of ON of the RF power introduction timing of the metal halide gas to generate a plasma a plasma CVD apparatus characterized by having a delay mechanism.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In the present invention, although the metal halide gas is introduced at the same time as the plasma generation as described above, an element having no problem in actual production can be obtained. In consideration of the margin of the RF power and the like, it is preferable to set it before the generation of the plasma, for example, it may be set at least one second before. If these periods the introduction of metal halide gas is earlier than the plasma generation, rather deliberately effect be introduced before unnecessarily, also generally TiCl ₄
Since the metal halide gas is highly corrosive, it is preferable not to lengthen the contact time with the substrate maintained at a high temperature or the susceptor holding the substrate. Therefore, the timing of introducing the metal halide gas is determined by considering the durability of the apparatus.
The timing is usually set, for example, within 15 seconds before, and preferably within 5 seconds before the timing of igniting the plasma by applying the F power.

The timing of introducing the metal halide gas and the ignition of the plasma (RF power ON) can be manually performed by an operator. However, when the plasma CVD apparatus of the present invention is used, a predetermined time is set from the time of introduction of the metal halide gas. Since the RF power can be automatically turned on after the lapse of time ( not including at the same time), the unnecessary metal halide gas does not exist more than necessary in the state where plasma is not generated by setting the time. The synchronization / delay circuit used in this apparatus is not particularly limited, and for example, an RF power switch may be turned on in conjunction with a metal halide gas introduction switching valve. This CVD apparatus is suitably used particularly in mass production.

The metal film formed according to the present invention is preferably a high melting point metal film, particularly preferably a titanium film, a tungsten film or a tantalum film. As the metal halide gas, halides of these metals are used, and chlorides and iodides are particularly preferable. When forming a titanium metal film, TiCl ₄ and TiI ₄ are preferable.

The present invention is preferably used for an element in which a thin insulating film is provided in contact with an electrode, and such an element includes a MOSFET. In this case, the effect is particularly large when applied to a step of forming a metal film in a contact hole reaching a gate electrode. In order to clearly show the effect of the present invention, the thickness of the gate insulating film is less than 150 °, preferably 120 ° or less, more preferably 100 ° or less. Further, the antenna ratio of the gate electrode is preferably 100 or more.

The effect is particularly large when applied to a contact hole having an aspect ratio of 6 or more.

[0021]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIG. 1 which is a cross-sectional view taken along a plane perpendicular to the channel length direction.
In this description, a case where a titanium film is formed using TiCl ₄ as a metal halide gas will be described, but the present invention is not limited to this.

First, as shown in FIG. 1A, a gate oxide film 103 as a gate insulating film is formed in a device region partitioned by a device isolation silicon oxide film 102 on a p-type silicon substrate 101 as a semiconductor substrate. A MOSFET element including a gate electrode 104 having a polycide structure composed of a polycrystalline silicon film 105 and a tungsten silicide film 106, sidewalls (not shown) provided on side walls of the gate electrode, and source / drain regions was formed. The sectional view cut in parallel to the channel is shown in FIG.
The structure is similar to that of FIG. Here, the thickness of the gate oxide film was set to 50 °, and various MOSFET structures having different antenna ratios of 50 to 10,000 were formed.

Next, as shown in FIG. 1B, after a BPSG film 109 is formed as an interlayer insulating film, a contact hole 111 for connecting a source / drain region (not shown) and the gate electrode 104 is formed. Was formed. At this time, the aspect ratio of the contact hole was set to about 8 so that the effect of the present invention was clearly exhibited.

Next, as shown in FIG. 1C, a titanium film 112 is formed on the surface of the BPSG film (including the side wall of the contact hole), the source / drain region exposed in the contact hole, and the surface of the gate electrode. Was formed by the plasma CVD method as follows.

FIG. 2 shows the timing in the plasma CVD method of the present invention. First, plasma CV
After introducing 1500 sccm of hydrogen gas and 500 sccm of argon gas into the chamber of the D apparatus, and adjusting the total pressure in the chamber to 5 torr, TiCl ₄ gas was supplied for 3.5 s.
ccm (preferably 1.5 sccm or more).
F power ON (RF power 250W, RF power 5
00W or less is preferable. ) To generate plasma. In the present invention, the introduction of the TiCl ₄ gas at this time is as follows:
This is performed at the same time as or before the plasma is generated by turning on the RF power. That is, in the present invention, TiCl ₄ is introduced into the chamber of the CVD apparatus when the plasma is generated, and the formation of the titanium metal film is started simultaneously with the generation of the plasma. For comparison, an experiment was also conducted in which hydrogen gas and argon gas were introduced into the chamber, RF power was turned on, plasma was generated, and then TiCl ₄ was introduced.

Then, a titanium film was formed until the thickness on the interlayer insulating film became 100 °. A titanium silicide film 113 is formed on the surfaces of the source / drain region and the gate electrode by a reaction between silicon and titanium, thereby reducing contact resistance with a contact plug.

Next, as shown in FIG. 1D, a titanium nitride film 114 was formed by thermal CVD on the entire surface so as to fill at least the contact hole. This titanium nitride film is etched back to form a plug while leaving the titanium nitride film only in the contact hole 111. Thereafter, an aluminum alloy film is formed and etched into a predetermined pattern to form an upper wiring shown in FIG. 115 was formed. MOSFET
The source / drain region and the gate electrode of
5 connects to other elements or to the outside.

The characteristics of the MOSFET manufactured by changing the introduction timing of TiCl _{4 by} such a manufacturing method are shown in FIG.
7 to FIG. As described above, the thickness of the gate oxide film is 5
0 °. This initial withstand voltage test was performed for many MOSFETs.
The test was performed by applying a voltage of 5 V between the gate electrode and the silicon substrate and determining a leak current flowing at that time. The horizontal axis of the graph is the leak current, and the vertical axis is the cumulative frequency. As the titanium film is damaged by plasma during film formation, the appearance ratio of the FET element having a large leak current increases.

As can be seen from the graph, the plasma ignition 1
Five seconds before (FIG. 3) and five seconds before plasma ignition (FIG. 4), TiC
If the introduction of l _4, the leakage current in all of the antenna ratio 50 to 10,000 was less than 10 ^-10 A.
When TiCl ₄ is introduced at the same time as the plasma ignition (FIG. 5), the presence of an element whose characteristics have deteriorated is seen when the antenna ratio is 10000, but this is within a range where there is no problem with the antenna ratio normally used. On the other hand, 5 seconds after the plasma ignition (FIG. 6) and 15 seconds after the plasma ignition (FIG. 7), T
When iCl ₄ is introduced, there are many deteriorated elements even when the antenna ratio is 50.

From the above results, it can be seen that by introducing TiCl ₄ into the CVD chamber at the same time as or before the plasma generation as in the present invention, a MOSFET having excellent characteristics without destruction of the gate oxide film can be obtained. Understand.

[0031]

According to the present invention, even when the elements are integrated at a high density and high integration, a semiconductor which does not damage the gate insulating film when forming the metal film in the contact hole by the plasma CVD method. An apparatus manufacturing method and a plasma CVD apparatus used therein can be provided.

[Brief description of the drawings]

FIG. 1 is a process sectional view illustrating a method for manufacturing a semiconductor device of the present invention.

FIG. 2 is a diagram showing gas introduction timing and RF power ON timing in the manufacturing method of the present invention.

FIG. 3 is a graph showing leakage current characteristics of a MOSFET manufactured in an example in which TiCl ₄ was introduced 15 seconds before plasma ignition.

FIG. 4 is a graph showing leakage current characteristics of a MOSFET manufactured in an example in which TiCl ₄ was introduced 5 seconds before plasma ignition.

[Figure 5] At the same time participants introduced the TiCl ₄ and the plasma ignition
5 is a graph showing the leakage current characteristics of the MOSFET manufactured in the example.

FIG. 6 is a graph showing leakage current characteristics of a MOSFET manufactured in a comparative example in which TiCl ₄ was introduced 5 seconds after plasma ignition.

FIG. 7 is a graph showing leakage current characteristics of a MOSFET manufactured in a comparative example in which TiCl ₄ was introduced 15 seconds after plasma ignition.

FIG. 8 is a process sectional view showing a conventional method for manufacturing a semiconductor device.

FIG. 9 is a process sectional view illustrating a conventional method for manufacturing a semiconductor device.

FIG. 10 is a diagram showing charge accumulation in a conventional semiconductor device manufacturing method.

[Explanation of symbols]

 Reference Signs List 101 p-type silicon substrate 102 element isolation silicon oxide film 103 gate oxide film 105 polycrystalline silicon film 106 tungsten silicide film 104 gate electrode 108 sidewall 109 BPSG film 111 contact hole 112 titanium film 113 titanium silicide film 114 titanium nitride film 115 wiring

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ identification code FI H01L 29/78 (58) Investigated field (Int.Cl. ⁷ , DB name) H01L 21/28-21/288 H01L 21/44 -21/445 H01L 29/40-29/43 H01L 29/47 H01L 29/872 H01L 21/3205 H01L 21/3213 H01L 21/768

Claims (8)

(57) [Claims] A semiconductor device including a step of forming a metal film by a plasma CVD method in a contact hole reaching an electrode of an element by penetrating an interlayer insulating film covering a predetermined element formed on a semiconductor substrate. In the manufacturing method described above, the step of forming the metal film includes the steps of: introducing a gas containing hydrogen and argon into a film forming chamber of a plasma CVD apparatus; Forming a metal film in the contact hole by introducing a metal halide gas. 2. The method according to claim 1, wherein the metal film is a high melting point metal film. 3. The metal halide according to claim 1, wherein the metal halide is a metal chloride or iodide.
The manufacturing method of the semiconductor device described in the above. 4. The method according to claim 1, wherein the element includes a MOSFET, and the contact hole is for making an electrical connection to a gate electrode of the MOSFET. 5. The method according to claim 4, wherein the thickness of the gate insulating film of the MOSFET is 100 ° or less. 6. The antenna ratio of the gate electrode (total area /
5. The method according to claim 4, wherein the area of the channel region is 100 or more. 7. The method according to claim 4, wherein an aspect ratio of the contact hole is 6 or more. 8. A plasma CVD apparatus used in the method of manufacturing a semiconductor device according to claim 1, wherein the introduction timing of the metal halide gas is earlier than the ON time of RF power for generating plasma. A plasma CVD apparatus comprising: