JPH08176823A - Formation of thin film of high melting point metal - Google Patents

Formation of thin film of high melting point metal

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Publication number
JPH08176823A
JPH08176823A JP6323187A JP32318794A JPH08176823A JP H08176823 A JPH08176823 A JP H08176823A JP 6323187 A JP6323187 A JP 6323187A JP 32318794 A JP32318794 A JP 32318794A JP H08176823 A JPH08176823 A JP H08176823A
Authority
JP
Japan
Prior art keywords
film
substrate
thin film
gas
metal thin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP6323187A
Other languages
Japanese (ja)
Inventor
Takaaki Miyamoto
孝章 宮本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP6323187A priority Critical patent/JPH08176823A/en
Priority to US08/576,685 priority patent/US5747384A/en
Priority to KR1019950055584A priority patent/KR960026267A/en
Publication of JPH08176823A publication Critical patent/JPH08176823A/en
Priority to US09/024,893 priority patent/US6143377A/en
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
    • H01L21/76855—After-treatment introducing at least one additional element into the layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76805—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics the opening being a via or contact hole penetrating the underlying conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76814—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric

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  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Chemical & Material Sciences (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Chemical Vapour Deposition (AREA)

Abstract

PURPOSE: To uniformly form a thin film of a high m.p. metal with high coverage without damaging a substrate. CONSTITUTION: A spontaneously oxidized film on an Si substrate 1 in a contact hole 3 is removed while isolating the substrate 1 from the air and this isolated state is maintained. In the early stage of film formation, a 1st Ti film 5 is formed by plasma CVD in a relatively low mixing ratio of gaseous TiCl4 to gaseous H2 and then a 2nd Ti film 7 is formed in a relatively high mixing ratio of gaseous TiCl4 to gaseous H2 . In other way, the surface of the substrate is nitrided after the spontaneously oxidized film is removed and then the Ti films are formed. When this invention is applied at the time of forming a barrier metal in a contact hole or a via hole having a high aspect ratio, superior coverage, low resistance ohmic contact and low leakage current can be attained and a high reliability semiconductor device can be produced in a high yield.

Description

【発明の詳細な説明】Detailed Description of the Invention

【０００１】[0001]

【産業上の利用分野】本発明は、高融点金属ハロゲン化
物を用いたＣＶＤ（化学的気相成長法）によって、カバ
レージよく、且つ基体にダメージを与えずに高融点金属
薄膜を成膜する方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a refractory metal thin film by CVD (Chemical Vapor Deposition) using a refractory metal halide with good coverage and without damaging the substrate. Regarding

【０００２】[0002]

【従来の技術】半導体装置の製造プロセスにおいては、
シリコン（Ｓｉ）基板に臨むコンタクト・ホール内にア
ルミニウム（Ａｌ）系材料およびタングステン（Ｗ）材
料を埋め込むに際して、予め、該コンタクト・ホールの
少なくとも底面および側壁面に予めチタン（Ｔｉ）膜を
成膜しておくことが一般的に行われている。2. Description of the Related Art In a semiconductor device manufacturing process,
When an aluminum (Al) -based material and a tungsten (W) material are embedded in a contact hole facing a silicon (Si) substrate, a titanium (Ti) film is previously formed on at least the bottom surface and side wall surface of the contact hole. It is generally done.

【０００３】このＴｉ膜は、上記コンタクト・ホール内
にＡｌ系材料が埋め込まれる場合には、ＡｌとＳｉとの
合金化反応を防止するためのバリヤメタルとして機能
し、該コンタクト・ホール内にＷ系材料が埋め込まれる
場合には、密着層として機能するものである。但し、Ｔ
ｉ膜は低抵抗のオーミック・コンタクトを達成する観点
からは優れた材料であるものの、単独ではバリヤメタル
または密着層としての機能を十分に果たし得ないため、
通常、該Ｔｉ膜上にＴｉＮ膜が積層された状態で用いら
れる。This Ti film functions as a barrier metal for preventing an alloying reaction between Al and Si when the Al-based material is embedded in the contact hole, and the W-based material is contained in the contact hole. When the material is embedded, it functions as an adhesion layer. However, T
Although the i film is an excellent material from the viewpoint of achieving low resistance ohmic contact, it cannot sufficiently fulfill the function as a barrier metal or an adhesion layer by itself.
Usually, it is used in a state where a TiN film is laminated on the Ti film.

【０００４】ところで、半導体装置の高集積化に伴い、
コンタクト・ホールのアスペクト比が増大する中、直径
０．２５μｍ、アスペクト比４といった微細なコンタク
ト・ホール内に上記Ｔｉ膜をカバレージよく成膜するた
めには、スパッタ粒子の垂直成分を強めたコリメーティ
ッドスパッタ法を適用することが必須となっている。By the way, as semiconductor devices are highly integrated,
While the aspect ratio of the contact hole is increasing, in order to form the Ti film in a fine contact hole having a diameter of 0.25 μm and an aspect ratio of 4 with good coverage, a collimation film in which the vertical component of sputtered particles is strengthened is used. It is essential to apply the Tid Sputter method.

【０００５】ところが、コリメーティッドスパッタ法に
よっても、アスペクト比が５を越えるようなコンタクト
・ホールに対して、その底面に必要な膜厚のＴｉ膜を成
膜することは困難である。このため、最近では、カバレ
ージに優れたＣＶＤ法を適用することが検討され始め、
ＴｉＣｌ4 に代表されるハロゲン化物ガスを水素
（Ｈ2 ）ガスやシラン（ＳｉＨ4 ）ガスにて還元するこ
とによって、Ｔｉあるいはチタンシリサイド（ＴｉＳｉ
x ）を生成する方法が有望視されている。これは、例え
ばＴｉＣｌ4 ガスおよびＨ2 ガスを用いてＴｉ膜を成膜
するために、下記の反応式（１） ＴｉＣｌ4 ＋ ２Ｈ2 → Ｔｉ ＋ ４ＨＣｌ ・・・（１） に従って、Ｈ2 によるＴｉＣｌ4 の還元反応を利用する
ものである。However, even by the collimated sputtering method, it is difficult to form a Ti film having a required film thickness on the bottom surface of a contact hole having an aspect ratio of more than 5. For this reason, recently, the application of the CVD method excellent in coverage has begun to be considered,
By reducing a halide gas typified by TiCl 4 with hydrogen (H 2 ) gas or silane (SiH 4 ) gas, Ti or titanium silicide (TiSi
x ) is promising. In order to form a Ti film by using, for example, TiCl 4 gas and H 2 gas, H 2 is converted into H 2 according to the following reaction formula (1) TiCl 4 + 2H 2 → Ti + 4HCl (1) It utilizes the reduction reaction of TiCl 4 .

【０００６】[0006]

【発明が解決しようとする課題】しかしながら、実際に
Ｓｉ基板１０１上の層間絶縁膜１０２にコンタクト・ホ
ール１０３が開口されたウェハに対して、ＴｉＣｌ4 ガ
スとＨ2 ガスとを用いたＣＶＤを行うと、図１３に示さ
れるように、Ｓｉ基板１０１がエッチングされて浸食部
１０４が生じてしまうという問題が起こる。なお、堆積
したＴｉ膜１０５は、Ｓｉ基板１０１上ではＴｉＳｉ2
膜１０６となっている。However, CVD using TiCl 4 gas and H 2 gas is performed on a wafer in which a contact hole 103 is actually opened in the interlayer insulating film 102 on the Si substrate 101. Then, as shown in FIG. 13, there is a problem that the Si substrate 101 is etched to form an eroded portion 104. The deposited Ti film 105 is formed on the Si substrate 101 by TiSi 2
It is the film 106.

【０００７】Ｓｉ基板１０１がエッチングされるのは、
本来、前述した反応式（１）のごとくＨ2 によって還元
されるはずのＴｉＣｌ4 が、下記の反応式（２） ＴｉＣｌ4 ＋ Ｓｉ → Ｔｉ ＋ ＳｉＣｌ4 ・・・（２） のごとく、Ｓｉによって還元されてしまっているからで
ある。The reason why the Si substrate 101 is etched is
Originally, TiCl 4 which should be reduced by H 2 as in the above-mentioned reaction formula (1) is converted into Si by the following reaction formula (2) TiCl 4 + Si → Ti + SiCl 4 (2) Because it has been reduced.

【０００８】Ｈ−Ｃｌ間の結合エネルギーは４３１ｋＪ
／モル、Ｓｉ−Ｃｌ間の結合エネルギーは３２２ｋＪ／
モルであり、ＳｉよりもＨ2 の方がＴｉＣｌ4 を還元す
る能力が強いにも関わらず、上述のようにＳｉ基板１０
１がエッチングされてしまうのは、ＴｉＣｌ4 ガスのＨ
2 ガスへの吸着確率よりも、ＴｉＣｌ4 ガスのＳｉ基板
１０１への吸着確率の方が高いためであると考えられ
る。The binding energy between H and Cl is 431 kJ.
/ Mol, the binding energy between Si and Cl is 322 kJ /
Although the molar ratio is higher and H 2 has a stronger ability to reduce TiCl 4 than Si, as described above, Si substrate 10
1 is etched because H of TiCl 4 gas
This is probably because the adsorption probability of TiCl 4 gas on the Si substrate 101 is higher than the adsorption probability of 2 gas.

【０００９】特に、Ｓｉ基板１０１上に自然酸化膜が不
均一に残っている場合には、この自然酸化膜の薄い部分
を突き抜けて、ＳｉとＴｉＣｌ4 との反応が不均一に進
行してしまう。また、コンタクト・ホール１０３内のＳ
ｉ基板１０１には不純物が拡散されているため、上述し
たような反応によるエッチングが激しく起こり、コンタ
クト抵抗の増大、リーク電流の増大といった問題もが引
き起こされる。In particular, when the natural oxide film remains unevenly on the Si substrate 101, the reaction between Si and TiCl 4 proceeds unevenly through the thin portion of the natural oxide film. . In addition, S in the contact hole 103
Since the impurities are diffused in the i-substrate 101, etching due to the above-mentioned reaction occurs violently, which causes problems such as an increase in contact resistance and an increase in leak current.

【００１０】なお、Ｔｉ膜の成膜時のみならず、Ｗ膜や
Ｍｏ膜等の高融点金属膜を成膜する際にも、同様にして
Ｓｉ基板１０１がエッチングされるという問題が生じ
る。また、Ｓｉ基板１０１上のみならず、Ａｌ系材料層
上にこれら高融点金属膜を成膜する場合にも同様の問題
が生じる。Incidentally, not only when the Ti film is formed, but also when the high melting point metal film such as the W film or the Mo film is formed, the problem that the Si substrate 101 is similarly etched occurs. Further, the same problem occurs not only on the Si substrate 101 but also when these refractory metal films are formed on the Al-based material layer.

【００１１】そこで本発明は、かかる従来の実情に鑑み
て提案されたものであり、基体にダメージを与えること
なく、カバレージよく高融点金属薄膜を成膜する方法を
提供することを目的とする。Therefore, the present invention has been proposed in view of such conventional circumstances, and an object thereof is to provide a method for forming a high melting point metal thin film with good coverage without damaging the substrate.

【００１２】[0012]

【課題を解決するための手段】本発明に係る高融点金属
薄膜の成膜方法は、上述の目的を達成するために提案さ
れたものであり、１つ目の方法は、高融点金属ハロゲン
化物とＨ2 とを含む混合ガスを用い、プラズマＣＶＤ法
によって、基体上に高融点金属薄膜を成膜するに際し、
前記成膜初期には、前記Ｈ2 に対する前記高融点金属ハ
ロゲン化物の混合比を相対的に小とし、その後、該混合
比を相対的に大とするものである。A method for forming a refractory metal thin film according to the present invention has been proposed to achieve the above-mentioned object. The first method is a refractory metal halide. upon the use of a mixed gas containing H 2, by plasma CVD, forming a refractory metal film on a substrate,
In the initial stage of the film formation, the mixing ratio of the refractory metal halide to H 2 is relatively small, and then the mixing ratio is relatively large.

【００１３】なお、前記成膜前には、予め、基体上の自
然酸化膜を除去しておき、該基体を大気から遮断された
状態に維持したまま、前記成膜を行って好適である。It is preferable that the natural oxide film on the substrate is removed in advance before the film formation, and the film formation is performed while the substrate is kept in a state of being shielded from the atmosphere.

【００１４】２つ目の方法は、予め、基体上の自然酸化
膜を除去しておき、該基体を大気から遮断された状態に
維持したまま、少なくとも分子内に窒素原子を有するガ
スを用いて該基体の表面を窒化し、その後、前記基体上
に、高融点金属ハロゲン化物とＨ2 とを含む混合ガスを
用いたプラズマＣＶＤ法によって高融点金属薄膜を成膜
するものである。この場合には成膜中に、Ｈ2 に対する
高融点金属ハロゲン化物の混合比を変化させる必要はな
い。In the second method, the natural oxide film on the substrate is removed in advance, and while the substrate is kept in a state of being shielded from the atmosphere, at least a gas having a nitrogen atom in its molecule is used. The surface of the base is nitrided, and then a refractory metal thin film is formed on the base by a plasma CVD method using a mixed gas containing a refractory metal halide and H 2 . In this case, it is not necessary to change the mixing ratio of the refractory metal halide to H 2 during the film formation.

【００１５】なお、少なくとも分子内にＮ原子を有する
ガスは、Ｎ2 ガス、アンモニア（ＮＨ3 ）ガス、ヒドラ
ジン（Ｎ2 Ｈ4 ）ガスより選ばれる少なくとも１種であ
って好適である。そして、これらのガス雰囲気下でプラ
ズマ処理を行えば、基体表面を窒化することができる。The gas having at least N atoms in the molecule is preferably at least one selected from N 2 gas, ammonia (NH 3 ) gas and hydrazine (N 2 H 4 ) gas. If the plasma treatment is performed under these gas atmospheres, the surface of the substrate can be nitrided.

【００１６】上述したいずれの方法においても、自然酸
化膜の除去は、Ｈ2 ガス、ＳｉＨ4ガス、アルゴン（Ａ
ｒ）ガスより選ばれる少なくとも１種を用いたプラズマ
処理によって行えばよい。In any of the above methods, the natural oxide film is removed by H 2 gas, SiH 4 gas and argon (A
r) Plasma treatment may be performed using at least one selected from gases.

【００１７】ところで、本発明は、少なくともその一部
にＳｉ材料が露出した基体に対して高融点金属薄膜を成
膜する際に適用して好適である。即ち、基板上の層間絶
縁膜に、Ｓｉ基板を臨むコンタクト・ホールが開口さ
れ、該コンタクト・ホールの少なくとも底部に、高融点
金属膜をバリヤメタルの一部として成膜するに際して適
用できる。この場合、Ｓｉ基板上に生成する高融点金属
薄膜は、該Ｓｉ基板との界面にてシリサイド化して、低
抵抗のオーミック・コンタクトを達成できる。By the way, the present invention is suitable for application when forming a refractory metal thin film on a substrate in which at least a part of the Si material is exposed. That is, a contact hole facing the Si substrate is opened in the interlayer insulating film on the substrate, and it can be applied when the refractory metal film is formed as a part of the barrier metal on at least the bottom of the contact hole. In this case, the refractory metal thin film formed on the Si substrate can be silicidized at the interface with the Si substrate to achieve low resistance ohmic contact.

【００１８】また、本発明は、少なくともその一部にＡ
ｌ系材料が露出した基体に対して高融点金属薄膜を成膜
する際に適用しても有効である。即ち、Ａｌ系配線を臨
むビア・ホールが開口され、該ビア・ホールの少なくと
も底部にバリヤメタルを成膜する際に適用することがで
きる。なお、本発明は、Ｗ系材料が露出した基体に対し
ても同様に適用可能である。Further, the present invention includes at least a part of A
It is also effective when applied when forming a refractory metal thin film on a substrate on which the 1-based material is exposed. That is, it can be applied when a via hole facing the Al-based wiring is opened and a barrier metal is formed on at least the bottom of the via hole. Note that the present invention can be similarly applied to a substrate in which the W-based material is exposed.

【００１９】本発明を適用して、上述の基体上に成膜さ
れる高融点金属薄膜としては、Ｗ膜、Ｍｏ膜等、従来公
知の高融点金属材料のいずれであってもよいが、特に、
Ｔｉ膜であって好適である。なお、該Ｔｉ膜をバリヤメ
タルとして成膜する場合には、さらにこの上にＴｉＮ膜
を成膜することが好ましい。The high melting point metal thin film formed on the above-mentioned substrate by applying the present invention may be any conventionally known high melting point metal material such as a W film and a Mo film. ,
A Ti film is preferable. When the Ti film is formed as a barrier metal, it is preferable to further form a TiN film on it.

【００２０】ところで、上述のようなバリヤメタル上に
は、典型的にはＡｌ系材料等よりなる配線材料層が被着
形成される。なお、接続孔が微細化され、アスペクト比
が高い場合には、高温スパッタリング、高圧リフロー等
のプロセスによって、接続孔を埋め込みながらＡｌ系材
料層を形成すればよい。また、ブランケットタングステ
ンＣＶＤ法により、接続孔内にＷプラグを形成してもよ
い。By the way, a wiring material layer typically made of an Al-based material or the like is deposited on the barrier metal as described above. When the connection hole is miniaturized and the aspect ratio is high, the Al-based material layer may be formed while filling the connection hole by a process such as high temperature sputtering and high pressure reflow. Further, a W plug may be formed in the connection hole by a blanket tungsten CVD method.

【００２１】[0021]

【作用】本発明を適用して、高融点金属ハロゲン化物と
Ｈ2 とを含む混合ガスを用いたプラズマＣＶＤ法を行う
に際し、成膜初期に、Ｈ2 に対する高融点金属ハロゲン
化物の混合比を相対的に小とすると、Ｓｉ基板あるい
は、Ａｌ系配線層への高融点金属ハロゲン化物の吸着確
率を下げることができる。これにより、高融点金属ハロ
ゲン化物のＳｉ基板やＡｌ系配線層による還元が防止で
き、基体にダメージを与えることなく高融点金属薄膜の
成膜が行える。なお、このようにして成膜された高融点
金属薄膜は純度にも優れたものとなる。When performing the plasma CVD method using the mixed gas containing the refractory metal halide and H 2 according to the present invention, the mixing ratio of the refractory metal halide to H 2 is set at the initial stage of film formation. If it is made relatively small, the probability of adsorption of the refractory metal halide on the Si substrate or the Al-based wiring layer can be reduced. Thereby, the reduction of the refractory metal halide by the Si substrate or the Al-based wiring layer can be prevented, and the refractory metal thin film can be formed without damaging the substrate. The refractory metal thin film thus formed has excellent purity.

【００２２】そして、このようにして高融点金属薄膜を
ある程度成膜してから、混合ガス中の高融点金属ハロゲ
ン化物の混合比を増加させれば、高融点金属ハロゲン化
物がＳｉ基板やＡｌ系配線層に接触しないため、Ｓｉや
Ａｌによる還元が行われることなく、高融点金属薄膜を
成膜できる。なお、高融点金属ハロゲン化物の混合比が
高い状態で成膜された高融点金属薄膜は、平滑性に優れ
たものとなる。Then, after the refractory metal thin film is formed to some extent in this way and the mixing ratio of the refractory metal halide in the mixed gas is increased, the refractory metal halide is converted into a Si substrate or an Al-based one. Since it does not contact the wiring layer, the refractory metal thin film can be formed without reduction by Si or Al. The high melting point metal thin film formed in a state where the mixing ratio of the high melting point metal halide is high has excellent smoothness.

【００２３】なお、予め、基体表面の自然酸化膜を除去
しておくと、基体上に高融点金属薄膜を均一にカバレー
ジよく成膜することができ、また、低抵抗のオーミック
・コンタクトを達成することができる。特に、Ｓｉ基板
上においては、自然酸化膜が除去された状態で高融点金
属薄膜が成膜されると、該高融点金属とＳｉとが反応し
て高融点金属シリサイド膜が均一に形成されるため、該
高融点金属薄膜上に形成される上層配線のコンタクト抵
抗を下げることができる。If the native oxide film on the surface of the substrate is removed in advance, the refractory metal thin film can be uniformly deposited on the substrate with good coverage, and low resistance ohmic contact is achieved. be able to. In particular, when a refractory metal thin film is formed on the Si substrate with the natural oxide film removed, the refractory metal reacts with Si to form a refractory metal silicide film uniformly. Therefore, the contact resistance of the upper layer wiring formed on the high melting point metal thin film can be reduced.

【００２４】また、本発明を適用して、高融点金属薄膜
の成膜前に基体のＳｉ基板あるいはＡｌ系配線層が露出
した部分を窒化しておくと、高融点金属ハロゲン化物と
上記Ｓｉ基板やＡｌ系配線層との反応が防止され、Ｓｉ
基板あるいはＡｌ系配線層にダメージを与えることなく
高融点金属薄膜を成膜できる。これは、Ｓｉ−Ｎ間ある
いはＡｌ−Ｎ間の結合エネルギーが、Ｓｉとハロゲンあ
るいはＡｌとハロゲンの結合エネルギーよりも大きいた
め、Ｓｉ基板あるいはＡｌ系配線層表面に形成されてい
るＳｉあるいはＡｌの窒化膜が高融点金属薄膜の成膜時
にエッチングされないからである。When the present invention is applied and the Si substrate of the substrate or the exposed portion of the Al-based wiring layer is nitrided before the formation of the refractory metal thin film, the refractory metal halide and the above Si substrate are nitrided. Reaction with Al and Al-based wiring layers is prevented, and Si
The refractory metal thin film can be formed without damaging the substrate or the Al-based wiring layer. This is because the bond energy between Si-N or Al-N is larger than the bond energy between Si and halogen or Al and halogen, so that the nitridation of Si or Al formed on the surface of the Si substrate or the Al-based wiring layer is performed. This is because the film is not etched when the refractory metal thin film is formed.

【００２５】[0025]

【実施例】以下、本発明を適用した具体的な実施例につ
いて、図面を参照しながら説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Specific embodiments to which the present invention is applied will be described below with reference to the drawings.

【００２６】実施例１ 本実施例は、Ｓｉ基板上の層間絶縁膜に開口されたコン
タクト・ホールの少なくとも底部および側壁部に、Ｔｉ
膜をプラズマＣＶＤによって成膜するに際して、成膜初
期とその後とで、ＴｉＣｌ4 ガスの混合比を異ならせた
例である。このプロセスを図１〜図４を用いて説明す
る。 Example 1 In this example, Ti is formed on at least the bottom and side walls of a contact hole formed in an interlayer insulating film on a Si substrate.
This is an example in which, when a film is formed by plasma CVD, the mixing ratio of TiCl 4 gas is made different at the beginning and after the film formation. This process will be described with reference to FIGS.

【００２７】先ず、図１に示されるように、Ｓｉ基板１
上に酸化シリコンからなる層間絶縁膜２が１μｍなる膜
厚にて積層され、該層間絶縁膜２に、直径０．２μｍ、
アスペクト比５のコンタクト・ホール３が開口されてな
るウェハを用意した。そして、このウェハを希フッ酸に
て洗浄することにより、コンタクト・ホール３内に露出
するＳｉ基板１上の自然酸化膜４の大部分を除去し、さ
らに、残存する自然酸化膜４を除去するために、有磁場
マイクロ波プラズマ（ＥＣＲプラズマ）ＣＶＤ装置のチ
ャンバ内にて、以下の条件のプラズマ処理を施した。First, as shown in FIG. 1, a Si substrate 1
An interlayer insulating film 2 made of silicon oxide is laminated thereon with a thickness of 1 μm, and the interlayer insulating film 2 has a diameter of 0.2 μm.
A wafer having contact holes 3 with an aspect ratio of 5 was prepared. Then, this wafer is washed with diluted hydrofluoric acid to remove most of the native oxide film 4 on the Si substrate 1 exposed in the contact holes 3 and further remove the remaining native oxide film 4. Therefore, plasma treatment under the following conditions was performed in the chamber of a magnetic field microwave plasma (ECR plasma) CVD apparatus.

【００２８】自然酸化膜除去用プラズマ処理の条件 導入ガス ： Ｈ2 ガス 流量 ５０ｓｃｃｍ Ａｒガス 流量１５０ｓｃｃｍ ガス圧 ： ０．４Ｐａ 温度 ： ４５０℃ マイクロ波パワー： ２．８ｋＷ（２．４５ＧＨｚ） これにより、Ｓｉ基板１上に残存していた自然酸化膜４
が除去された。Conditions for plasma treatment for removing natural oxide film Introduced gas: H 2 gas flow rate 50 sccm Ar gas flow rate 150 sccm Gas pressure: 0.4 Pa Temperature: 450 ° C. Microwave power: 2.8 kW (2.45 GHz) Natural oxide film 4 remaining on the substrate 1
Was removed.

【００２９】なお、自然酸化膜４は、下記の反応式
（３） ２Ｈ2 ＋ ＳｉＯ2 → Ｓｉ ＋ ２Ｈ2 Ｏ ・・・（３） に従って、Ｓｉ還元された。The natural oxide film 4 was Si-reduced according to the following reaction formula (3) 2H 2 + SiO 2 → Si + 2H 2 O (3).

【００３０】次に、上述のプラズマ処理を行ったと同一
のチャンバ内で、Ｈ2 ガスに対するＴｉＣｌ4 ガスの混
合比を相対的に小とした条件（Ａ）にてＴｉ膜の成膜を
３０秒間行った。Next, in the same chamber in which the above-mentioned plasma treatment was performed, a Ti film was formed for 30 seconds under the condition (A) in which the mixing ratio of TiCl 4 gas to H 2 gas was relatively small. went.

【００３１】 Ｔｉ膜の成膜条件（Ａ） 導入ガス ： ＴｉＣｌ4 ガス 流量 ３ｓｃｃｍ （Ｈ2 に対する混合比３％） Ｈ2 ガス 流量１００ｓｃｃｍ Ａｒガス 流量１７０ｓｃｃｍ 圧力 ： ０．４０Ｐａ 温度 ： ４５０℃ マイクロ波パワー： ２．８ｋＷ これにより、図２に示されるように、Ｓｉ基板１表面が
エッチングされることなく、ウェハ全面に亘って第１の
Ｔｉ膜５が成膜された。なお、Ｓｉ基板１上では、即座
にＴｉとＳｉとの反応が起こるため、ＴｉＳｉ2 膜６が
形成された。The Ti film deposition conditions (A) introducing gas: TiCl 4 (mixing ratio of 3% of H 2) gas flow rate 3 sccm H 2 gas flow rate 100 sccm Ar gas flow rate 170sccm pressure: 0.40 Pa Temperature: 450 ° C. Microwave power 2.8 kW As a result, as shown in FIG. 2, the first Ti film 5 was formed over the entire surface of the wafer without etching the surface of the Si substrate 1. Since the reaction between Ti and Si occurs immediately on the Si substrate 1, the TiSi 2 film 6 was formed.

【００３２】続いて、同一チャンバ内で、Ｈ2 ガスに対
するＴｉＣｌ4 ガスの混合比を相対的に大とした条件
（Ｂ）にてＴｉ膜の成膜を行った。Subsequently, a Ti film was formed in the same chamber under the condition (B) in which the mixing ratio of the TiCl 4 gas to the H 2 gas was relatively large.

【００３３】 Ｔｉ膜の成膜条件（Ｂ） 導入ガス ： ＴｉＣｌ4 ガス 流量 ２０ｓｃｃｍ （Ｈ2 に対する混合比７７％） Ｈ2 ガス 流量 ２６ｓｃｃｍ Ａｒガス 流量１７０ｓｃｃｍ 圧力 ： ０．１３Ｐａ 温度 ： ４５０℃ マイクロ波パワー： ２．８ｋＷ これにより、図３に示されるように、第１のＴｉ膜５あ
るいはＴｉＳｉ2 膜６上に、第２のＴｉ膜７が成膜され
た。The Ti film deposition conditions (B) introducing gas: TiCl 4 (mixing ratio 77% with respect to H 2) gas flow rate of 20 sccm H 2 gas flow rate 26 sccm Ar gas flow rate 170sccm pressure: 0.13 Pa Temperature: 450 ° C. Microwave power 2.8 kW Thus, as shown in FIG. 3, the second Ti film 7 was formed on the first Ti film 5 or the TiSi 2 film 6.

【００３４】その後、上述の成膜を行ったチャンバ内
で、以下の条件に従ってＴｉＮ膜８の成膜を行った。After that, the TiN film 8 was formed under the following conditions in the chamber where the above-mentioned film formation was carried out.

【００３５】 ＴｉＮ膜８の成膜条件 導入ガス ： ＴｉＣｌ4 ガス 流量 ２０ｓｃｃｍ Ｎ2 ガス 流量 ８ｓｃｃｍ Ｈ2 ガス 流量 ２６ｓｃｃｍ 圧力 ： ０．１３Ｐａ 温度 ： ４５０℃ マイクロ波パワー： ２．８ｋＷ これにより、図４に示されるように、第２のＴｉ膜７上
に、ＴｉＮ膜８が成膜された。Film forming conditions of TiN film 8 Introduced gas: TiCl 4 gas flow rate 20 sccm N 2 gas flow rate 8 sccm H 2 gas flow rate 26 sccm Pressure: 0.13 Pa Temperature: 450 ° C. Microwave power: 2.8 kW As a result, FIG. As shown, the TiN film 8 was formed on the second Ti film 7.

【００３６】以上のようにして、コンタクト・ホール３
内に、カバレージに優れたＴｉ／ＴｉＮなる２層構造の
バリヤメタルがＳｉ基板１にダメージを与えることなく
成膜された。なお、この上に、図示しないＡｌ系材料よ
りなる上層配線層を形成すると、Ａｌ系材料がコンタク
ト・ホール３内に良好に埋め込まれた。そして、上述の
ようにして成膜されたバリヤメタルは、Ｓｉ基板１と上
層配線層との界面において、低抵抗のオーミック・コン
タクトの確保、Ａｌの粒界拡散の防止に効果を発揮し
た。As described above, the contact hole 3
A barrier metal having a two-layer structure of Ti / TiN having excellent coverage was deposited therein without damaging the Si substrate 1. When an upper wiring layer (not shown) made of an Al-based material was formed thereon, the Al-based material was well embedded in the contact hole 3. The barrier metal formed as described above was effective in ensuring low resistance ohmic contact and preventing Al grain boundary diffusion at the interface between the Si substrate 1 and the upper wiring layer.

【００３７】ところで、上述の第１のＴｉ膜５の成膜時
に、Ｓｉ基板１がエッチングされなかったのは、成膜条
件（Ａ）に示されるように、ＴｉＣｌ4 の混合比を相対
的に小としたために、前述した反応式（２）のようなＴ
ｉＣｌ4 とＳｉとの反応が抑制され、反応式（１）のよ
うなＴｉＣｌ4 とＨ2 との反応が促進されたからであ
る。なお、このようにして成膜された第１のＴｉ膜５は
純度が高いものであった。そして、成膜条件（Ｂ）に示
されるようなＴｉＣｌ4 の混合比を相対的に大とした成
膜時には、既にＳｉ基板１上にＴｉＳｉ2 膜６が形成さ
れているため、Ｓｉ基板１が浸食されることなく、反応
式（１）で示される反応がさらに進行した。なお、この
ようにして成膜された第２のＴｉ膜７は、非常に平滑性
に優れたものであったため、この上に成膜されたＴｉＮ
膜８の平滑性をも向上させ、この結果、上層配線層の密
着性を向上させる働きをした。By the way, the reason why the Si substrate 1 was not etched at the time of forming the first Ti film 5 was that the mixing ratio of TiCl 4 was relatively large as shown in the film forming condition (A). Since it is small, T as in the above reaction formula (2)
This is because the reaction between iCl 4 and Si was suppressed and the reaction between TiCl 4 and H 2 as in the reaction formula (1) was promoted. The first Ti film 5 thus formed had a high purity. When the TiCl 4 mixture ratio is set to be relatively large as shown in the film forming condition (B), the TiSi 2 film 6 is already formed on the Si substrate 1. The reaction represented by the reaction formula (1) proceeded further without being eroded. Since the second Ti film 7 thus formed had excellent smoothness, the TiN film formed on the second Ti film 7 had excellent smoothness.
The smoothness of the film 8 was also improved, and as a result, the adhesion of the upper wiring layer was improved.

【００３８】実施例２ 本実施例は、Ａｌ−０．５％Ｃｕよりなる配線層上の層
間絶縁膜に開口されたビア・ホールの少なくとも底部お
よび側壁部に、Ｔｉ膜を成膜した例である。このプロセ
スを図５〜図８を用いて説明する。 Embodiment 2 This embodiment is an example in which a Ti film is formed on at least the bottom and side walls of a via hole formed in an interlayer insulating film on a wiring layer made of Al-0.5% Cu. is there. This process will be described with reference to FIGS.

【００３９】先ず、図５に示されるように、Ａｌ−０．
５％Ｃｕよりなる配線層１１上にＴｉＮ膜１９、１μｍ
なる膜厚の層間絶縁膜１２が積層され、配線層１１に臨
む、直径０．２μｍ、アスペクト比５のビア・ホール１
３が開口されてなるウェハを用意した。そして、ビア・
ホール１３内に露出する配線層１１上の自然酸化膜１４
を除去するために、ＥＣＲプラズマＣＶＤ装置のチャン
バ内にて、Ｈ2 ガスの流量を３０ｓｃｃｍに変更した以
外は実施例１と同様の条件にてプラズマ処理を施した。
このプラズマ処理では、主に、Ａｒ+ によるスパッタ作
用によって、自然酸化膜１４が除去された。First, as shown in FIG. 5, Al-0.
TiN film 19, 1 μm on the wiring layer 11 made of 5% Cu
A via hole 1 having a diameter of 0.2 μm and an aspect ratio of 5 is formed by laminating an interlayer insulating film 12 having a thickness of
A wafer having openings 3 was prepared. And beer
Natural oxide film 14 on wiring layer 11 exposed in hole 13
In order to remove the above, plasma treatment was performed in the chamber of the ECR plasma CVD apparatus under the same conditions as in Example 1 except that the flow rate of H 2 gas was changed to 30 sccm.
In this plasma treatment, the natural oxide film 14 was removed mainly by the sputtering action of Ar + .

【００４０】次に、上述のプラズマ処理を行ったチャン
バ内で、Ｈ2 ガスに対するＴｉＣｌ4 ガスの混合比を相
対的に小とした、実施例１にて示された条件（Ａ）によ
る成膜を３０秒間行った。Next, film formation under the condition (A) shown in Example 1 in which the mixing ratio of the TiCl 4 gas to the H 2 gas was made relatively small in the above-mentioned plasma-treated chamber. For 30 seconds.

【００４１】これにより、図６に示されるように、配線
層１１表面がエッチングされることなく、ウェハ全面に
亘って、純度に優れた第１のＴｉ膜１５が成膜された。
なお、この成膜時には、配線層１１に残存していた自然
酸化膜１４も除去された。As a result, as shown in FIG. 6, the first Ti film 15 having excellent purity was formed over the entire surface of the wafer without etching the surface of the wiring layer 11.
During the film formation, the natural oxide film 14 remaining on the wiring layer 11 was also removed.

【００４２】これは、ＡｌＣｌ3 の蒸気圧が高く、即座
に揮発するために、下記の反応式（４） ３ＴｉＣｌ4 ＋ ２Ａｌ2 Ｏ3 → ３Ｔｉ ＋ ４ＡｌＣｌ3 ＋ ３Ｏ2 ・・・（４） に従って、Ａｌ2 Ｏ3 が次々とエッチング除去されてい
くからである。This is because AlCl 3 has a high vapor pressure and immediately volatilizes. Therefore, according to the following reaction formula (4) 3TiCl 4 + 2Al 2 O 3 → 3Ti + 4AlCl 3 + 3O 2 (4) , Al 2 O 3 are successively removed by etching.

【００４３】続いて、同一チャンバ内で、Ｈ2 ガスに対
するＴｉＣｌ4 ガスの混合比を相対的に大とした、実施
例１にて示された条件（Ｂ）の成膜を行うことにより、
図７に示されるように、第１のＴｉ膜１５上に、第２の
Ｔｉ膜１７を成膜した。なお、この第２のＴｉ膜１７は
平滑性に優れたものであった。Subsequently, in the same chamber, a film is formed under the condition (B) shown in Example 1 in which the mixing ratio of the TiCl 4 gas to the H 2 gas is relatively large.
As shown in FIG. 7, a second Ti film 17 was formed on the first Ti film 15. The second Ti film 17 had excellent smoothness.

【００４４】その後、同一チャンバ内で、実施例１と同
様にしてＮ2 ガスを添加した条件の成膜を行うことによ
り、図８に示されるように、第２のＴｉ膜１７上にＴｉ
Ｎ膜１８を成膜した。Then, in the same chamber, a film is formed under the condition that N 2 gas is added in the same manner as in Example 1, so that Ti is deposited on the second Ti film 17 as shown in FIG.
The N film 18 was formed.

【００４５】以上のようにして、ビア・ホール１３内
に、カバレージに優れたＴｉ／ＴｉＮなる２層構造のバ
リヤメタルが、配線層１１にダメージを与えることなく
成膜された。なお、この上に、図示しないＡｌ系材料よ
りなる上層配線層を形成すると、Ａｌ系材料がビア・ホ
ール１３内に良好に埋め込まれた。そして、上述のよう
にして成膜されたバリヤメタルは、配線層１１と上層配
線層との界面において、低抵抗のオーミック・コンタク
トの確保に効果を発揮した。As described above, the barrier metal having a two-layer structure of Ti / TiN having excellent coverage was formed in the via hole 13 without damaging the wiring layer 11. When an upper wiring layer (not shown) made of an Al-based material was formed thereon, the Al-based material was well embedded in the via hole 13. The barrier metal formed as described above was effective in securing low resistance ohmic contact at the interface between the wiring layer 11 and the upper wiring layer.

【００４６】実施例３ 本実施例は、Ｓｉ基板上の層間絶縁膜に開口されたコン
タクト・ホールの少なくとも底部および側壁部にＴｉ膜
を成膜するに際して、予め、コンタクト・ホールの底部
に露出するＳｉ基板を窒化しておく例である。このプロ
セスを図９〜図１２を用いて説明する。 Embodiment 3 In this embodiment, when a Ti film is formed on at least the bottom and side walls of a contact hole opened in an interlayer insulating film on a Si substrate, the Ti film is exposed at the bottom of the contact hole in advance. In this example, the Si substrate is nitrided. This process will be described with reference to FIGS.

【００４７】先ず、実施例１と同様のウェハを用意し、
実施例１と同様にして希フッ酸処理およびプラズマ処理
を行って、コンタクト・ホール内に露出するＳｉ基板上
の自然酸化膜を除去した。First, a wafer similar to that of the first embodiment is prepared,
Dilute hydrofluoric acid treatment and plasma treatment were performed in the same manner as in Example 1 to remove the native oxide film on the Si substrate exposed in the contact holes.

【００４８】次に、上述のプラズマ処理を行ったと同一
のチャンバ内で、Ｓｉ基板を窒化するための下記のプラ
ズマ処理を行った。Next, the following plasma treatment for nitriding the Si substrate was performed in the same chamber in which the above-mentioned plasma treatment was performed.

【００４９】 窒化用プラズマ処理の条件 導入ガス ： Ｎ2 ガス 流量 ５０ｓｃｃｍ Ａｒガス 流量 ５０ｓｃｃｍ 圧力 ： ０．２Ｐａ 温度 ： ４５０℃ マイクロ波パワー： ２．８ｋＷ これにより、図９に示されるように、Ｓｉ基板２１上に
層間絶縁膜２２が形成され、コンタクト・ホール２３が
開口されてなるウェハにおいて、該コンタクト・ホール
２３内に露出していたＳｉ基板２１の表面が窒化され、
Ｓｉ3 Ｎ4 層２４が形成された。Conditions of plasma treatment for nitriding: Introduced gas: N 2 gas flow rate 50 sccm Ar gas flow rate 50 sccm Pressure: 0.2 Pa Temperature: 450 ° C. Microwave power: 2.8 kW As a result, as shown in FIG. In the wafer in which the interlayer insulating film 22 is formed on the contact hole 23 and the contact hole 23 is opened, the surface of the Si substrate 21 exposed in the contact hole 23 is nitrided,
The Si 3 N 4 layer 24 was formed.

【００５０】その後、同一チャンバ内で、実施例１にて
示された条件（Ｂ）の成膜を行うことにより、図１０に
示されるように、Ｔｉ膜２５を成膜した。なお、このＴ
ｉ膜２５は平滑性に優れたものであった。After that, a Ti film 25 was formed as shown in FIG. 10 by forming the film under the condition (B) shown in Example 1 in the same chamber. In addition, this T
The i film 25 was excellent in smoothness.

【００５１】そして、さらに、同一チャンバ内で、実施
例１と同様にしてＮ2 ガスを添加した条件の成膜を行う
ことにより、図１１に示されるように、Ｔｉ膜２５上に
ＴｉＮ膜２８を成膜した。Further, by performing film formation in the same chamber under the condition that N 2 gas is added in the same manner as in Example 1, the TiN film 28 is formed on the Ti film 25 as shown in FIG. Was deposited.

【００５２】次いで、上述のウェハに対して熱処理を行
うことによって、Ｓｉ3 Ｎ4 層２４とこの上に成膜され
たＴｉ膜２５とを反応させて、図１２に示されるよう
に、ＴｉＳｉ2 層２６を形成した。Next, by heat-treating the above-mentioned wafer, the Si 3 N 4 layer 24 and the Ti film 25 formed thereon are reacted, and as shown in FIG. 12, TiSi 2 Layer 26 was formed.

【００５３】以上のようにして、コンタクト・ホール２
３内に、カバレージに優れたＴｉ／ＴｉＮなる２層構造
のバリヤメタルが、Ｓｉ基板２１にダメージを与えるこ
となく成膜された。なお、この上に、図示しないＡｌ系
材料よりなる上層配線層を形成すると、Ａｌ系材料がコ
ンタクト・ホール２３内に良好に埋め込まれた。そし
て、上述のようにして成膜されたバリヤメタルは、Ｓｉ
基板２１と該上層配線層との界面において、低抵抗のオ
ーミック・コンタクトの確保、Ａｌの粒界拡散の防止に
効果を発揮した。As described above, the contact hole 2
A barrier metal having a two-layer structure made of Ti / TiN having excellent coverage was formed in No. 3 without damaging the Si substrate 21. When an upper wiring layer (not shown) made of an Al-based material was formed thereon, the Al-based material was well embedded in the contact hole 23. The barrier metal formed as described above is made of Si.
At the interface between the substrate 21 and the upper wiring layer, low resistance ohmic contact was ensured and Al grain boundary diffusion was prevented.

【００５４】なお、上述のＴｉ膜２５の成膜時に、Ｓｉ
基板２１がエッチングされなかったのは、Ｓｉ−Ｃｌ間
の結合エネルギーが３２２ｋＪ／モルであるのに比し
て、Ｓｉ−Ｎ間の結合エネルギーは４３９ｋＪ／モルと
大きいため、ＴｉＣｌ4 ガスにより、Ｓｉ3 Ｎ4 層２４
がエッチングされなかったためである。When the Ti film 25 is formed, the Si film
The substrate 21 is not etched, as compared to the bonding energy between Si-Cl is 322KJ / mol, for coupling energy between Si-N is as large as 439KJ / mol, the TiCl 4 gas, Si 3 N 4 layer 24
Is not etched.

【００５５】以上、本発明に係る高融点金属薄膜の成膜
方法の種々の実施例を挙げたが、本発明は上述の実施例
に限定されるものではない。例えば、自然酸化膜４，１
４を除去するためのプラズマ処理を、ＳｉＨ4 ガスの存
在下で行ってもよい。この場合、Ｓｉ基板上の自然酸化
膜は、反応式（５） ＳｉＨ4 ＋ ＳｉＯ2 → ２Ｓｉ ＋ ２Ｈ2 Ｏ ・・・（５） に示されるようにして、Ｓｉに還元されることとなる。Although various embodiments of the method for forming a refractory metal thin film according to the present invention have been described above, the present invention is not limited to the above embodiments. For example, natural oxide films 4, 1
The plasma treatment for removing No. 4 may be performed in the presence of SiH 4 gas. In this case, the natural oxide film on the Si substrate is reduced to Si as shown in the reaction formula (5) SiH 4 + SiO 2 → 2Si + 2H 2 O (5).

【００５６】また、実施例２においては、配線層１１と
して、Ａｌ−０．５％Ｃｕよりなるものを用いたが、こ
れに限定されず、他の組成のＡｌ系材料よりなるもので
あっても、Ｗ系材料よりなるものを用いてもよい。In the second embodiment, the wiring layer 11 is made of Al-0.5% Cu. However, the wiring layer 11 is not limited to this and is made of an Al-based material having another composition. Alternatively, a W-based material may be used.

【００５７】さらに、実施例３では、コンタクト・ホー
ル２３内のＳｉ基板２１を予め窒化しておく方法を示し
たが、ビア・ホール内のＡｌ系材料またはＷ系材料より
なる配線層を予め窒化しても、同様の効果が得られる。
また、窒化には、Ｎ2 ガス以外にも、ＮＨ3 ガス、Ｎ2
Ｈ4 ガス等が使用できる。Further, in the third embodiment, the method of previously nitriding the Si substrate 21 in the contact hole 23 has been described. However, the wiring layer made of the Al-based material or the W-based material in the via hole is previously nitrided. However, the same effect can be obtained.
In addition to the N 2 gas, NH 3 gas, N 2
H 4 gas or the like can be used.

【００５８】上述の実施例においては、自然酸化膜除去
のためのプラズマ処理から、Ｔｉ膜およびＴｉＮ膜の成
膜までを同一のチャンバ内で行ったが、ウェハを大気か
ら遮断された状態に維持したまま、異なるチャンバ間で
搬送して、それぞれのチャンバ内で所定の処理を行うよ
うにしてもよく、マルチチャンバ装置を用いることも可
能である。また、上述の実施例では、各種プラズマ処理
をＥＣＲプラズマＣＶＤ装置を用いて行ったが、平行平
板型プラズマＣＶＤ装置等、ヘリコン波プラズマＣＶＤ
装置、誘導結合プラズマ（ＩＣＰプラズマ）ＣＶＤ装置
等、従来公知のプラズマＣＶＤ装置のいずれを用いても
よい。In the above-mentioned embodiment, the plasma processing for removing the natural oxide film and the film formation of the Ti film and the TiN film were carried out in the same chamber, but the wafer was kept in a state of being shielded from the atmosphere. As it is, it may be transported between different chambers to perform a predetermined process in each chamber, and a multi-chamber apparatus can also be used. Further, in the above-described embodiment, various plasma treatments were performed using the ECR plasma CVD apparatus, but a helicon wave plasma CVD apparatus such as a parallel plate plasma CVD apparatus was used.
Any known plasma CVD apparatus such as an apparatus and an inductively coupled plasma (ICP plasma) CVD apparatus may be used.

【００５９】その他、ウェハの構成および材料、成膜さ
れる高融点金属薄膜の種類等、本発明の主旨を逸脱しな
い範囲で適宜、変形変更が可能である。In addition, the structure and material of the wafer, the kind of the refractory metal thin film to be formed, and the like can be appropriately modified and changed without departing from the gist of the present invention.

【００６０】[0060]

【発明の効果】以上の説明からも明らかなように、本発
明を適用すると、基体にダメージを与えることなく、高
融点金属薄膜を均一にカバレージよく成膜することがで
きる。このため、高アクペクト比を有するコンタクト・
ホールやビア・ホール内にバリヤメタルを形成するに際
して本発明を適用すれば、優れたカバレージ、低抵抗の
オーミック・コンタクト、低リーク電流を達成すること
ができ、信頼性の高い半導体装置を歩留まりよく製造す
ることが可能となる。As is apparent from the above description, when the present invention is applied, a refractory metal thin film can be uniformly formed with good coverage without damaging the substrate. Because of this, contacts with high aspect ratio
By applying the present invention when forming a barrier metal in a hole or a via hole, excellent coverage, low resistance ohmic contact, and low leakage current can be achieved, and a highly reliable semiconductor device can be manufactured with high yield. It becomes possible to do.

【図面の簡単な説明】[Brief description of drawings]

【図１】コンタクト・ホール内のＳｉ基板上に自然酸化
膜が形成されている状態のウェハを示す模式的断面図で
ある。FIG. 1 is a schematic cross-sectional view showing a wafer in a state where a natural oxide film is formed on a Si substrate in a contact hole.

【図２】図１のウェハに対して、自然酸化膜の除去工
程、第１のＴｉ膜を成膜した状態を示す模式的断面図で
ある。FIG. 2 is a schematic cross-sectional view showing a step of removing a natural oxide film and a state in which a first Ti film is formed on the wafer of FIG.

【図３】図２のウェハに対して、第２のＴｉ膜を成膜し
た状態を示す模式的断面図である。3 is a schematic cross-sectional view showing a state in which a second Ti film is formed on the wafer of FIG.

【図４】図３のウェハに対して、ＴｉＮ膜を成膜した状
態を示す模式的断面図である。FIG. 4 is a schematic cross-sectional view showing a state in which a TiN film is formed on the wafer of FIG.

【図５】ビア・ホール内の配線層上に自然酸化膜が形成
されている状態のウェハを示す模式的断面図である。FIG. 5 is a schematic cross-sectional view showing a wafer in which a natural oxide film is formed on a wiring layer in a via hole.

【図６】図５のウェハに対して、第１のＴｉ膜を成膜し
た状態を示す模式的断面図である。6 is a schematic cross-sectional view showing a state in which a first Ti film is formed on the wafer of FIG.

【図７】図６のウェハに対して、第２のＴｉ膜を成膜し
た状態を示す模式的断面図である。7 is a schematic cross-sectional view showing a state in which a second Ti film is formed on the wafer of FIG.

【図８】図７のウェハに対して、ＴｉＮ膜を成膜した状
態を示す模式的断面図である。8 is a schematic cross-sectional view showing a state in which a TiN film is formed on the wafer of FIG.

【図９】コンタクト・ホール内のＳｉ基板表面が窒化さ
れた状態のウェハを示す模式的断面図である。FIG. 9 is a schematic cross-sectional view showing a wafer in which the surface of the Si substrate in the contact hole is nitrided.

【図１０】図９のウェハに対して、Ｔｉ膜を成膜した状
態を示す模式的断面図である。10 is a schematic cross-sectional view showing a state in which a Ti film is formed on the wafer of FIG.

【図１１】図１０のウェハに対して、ＴｉＮ膜を成膜し
た状態を示す模式的断面図である。11 is a schematic cross-sectional view showing a state in which a TiN film is formed on the wafer of FIG.

【図１２】図１１のウェハに対して、熱処理をして、Ｔ
ｉＳｉ2 層を形成した状態を示す模式的断面図である。12 is a thermal treatment of the wafer of FIG.
FIG. 6 is a schematic cross-sectional view showing a state in which an iSi 2 layer is formed.

【図１３】従来法により、Ｔｉ膜を成膜し、コンタクト
・ホール内のＳｉ基板がエッチングされた状態のウェハ
を示す模式的断面図である。FIG. 13 is a schematic cross-sectional view showing a wafer in which a Ti film is formed by a conventional method and the Si substrate in the contact hole is etched.

【符号の説明】[Explanation of symbols]

１ Ｓｉ基板 ２ 層間絶縁膜 ３ コンタクト・ホール ４ 自然酸化膜 ５ 第１のＴｉ膜 ６ ＴｉＳｉ2 膜 ７ 第２のＴｉ膜 ８ ＴｉＮ膜DESCRIPTION OF SYMBOLS 1 Si substrate 2 Interlayer insulating film 3 Contact hole 4 Natural oxide film 5 First Ti film 6 TiSi 2 film 7 Second Ti film 8 TiN film

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 ＦＩ 技術表示箇所 Ｈ０１Ｌ 21/285 Ｒ 21/3205 ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 6 Identification code Internal reference number FI Technical indication H01L 21/285 R 21/3205

Claims (8)

【特許請求の範囲】[Claims] 【請求項１】 高融点金属ハロゲン化物と水素とを含む
混合ガスを用い、プラズマＣＶＤ法によって、基体上に
高融点金属薄膜を成膜するに際し、 前記成膜初期には、前記水素に対する前記高融点金属ハ
ロゲン化物の混合比を相対的に小とし、その後は、該混
合比を相対的に大とすることを特徴とする高融点金属薄
膜の成膜方法。1. When forming a high-melting-point metal thin film on a substrate by a plasma CVD method using a mixed gas containing a high-melting-point metal halide and hydrogen, at the beginning of the film formation, the high-melting-point metal with respect to the hydrogen is added. A method for forming a high-melting point metal thin film, characterized in that the mixing ratio of the melting point metal halide is set relatively small, and then the mixing ratio is set relatively large. 【請求項２】 前記成膜前に前記基体上の自然酸化膜を
除去し、該基体を大気から遮断された状態に維持したま
ま、前記成膜を行うことを特徴とする請求項１記載の高
融点金属薄膜の成膜方法。2. The film formation is performed while the natural oxide film on the substrate is removed before the film formation, and the substrate is kept in a state of being shielded from the atmosphere. Method for forming high melting point metal thin film. 【請求項３】 予め、基体上の自然酸化膜を除去してお
き、該基体を大気から遮断された状態に維持したまま、
少なくとも分子内に窒素原子を有するガスを用いて該基
体の表面を窒化し、 その後、前記基体上に、高融点金属ハロゲン化物と水素
とを含む混合ガスを用いたプラズマＣＶＤ法によって高
融点金属薄膜を成膜することを特徴とする高融点金属薄
膜の成膜方法。3. A natural oxide film on a substrate is previously removed, and the substrate is kept in a state of being shielded from the atmosphere,
The surface of the substrate is nitrided using a gas having at least nitrogen atoms in the molecule, and then a high melting point metal thin film is formed on the substrate by a plasma CVD method using a mixed gas containing a high melting point metal halide and hydrogen. A method for forming a refractory metal thin film, which comprises: 【請求項４】 前記少なくとも分子内に窒素原子を有す
るガスは、窒素ガス、アンモニアガス、ヒドラジンガス
より選ばれる少なくとも１種であることを特徴とする請
求項３記載の高融点金属薄膜の成膜方法。4. The film of a refractory metal thin film according to claim 3, wherein the gas having at least a nitrogen atom in the molecule is at least one selected from nitrogen gas, ammonia gas and hydrazine gas. Method. 【請求項５】 前記自然酸化膜の除去を、水素ガス、シ
ランガス、アルゴンガスより選ばれる少なくとも１種を
用いたプラズマ処理によって行うことを特徴とする請求
項２または請求項３に記載の高融点金属薄膜の成膜方
法。5. The high melting point according to claim 2, wherein the natural oxide film is removed by a plasma treatment using at least one selected from hydrogen gas, silane gas and argon gas. Method for forming metal thin film. 【請求項６】 前記基体は、少なくともその一部にシリ
コン材料が露出したものであることを特徴とする請求項
１ないし請求項５のいずれか１項に記載の高融点金属薄
膜の成膜方法。6. The method for forming a refractory metal thin film according to claim 1, wherein the base material has a silicon material exposed at least in a part thereof. . 【請求項７】 前記基体は、少なくともその一部にアル
ミニウム系材料が露出したものであることを特徴とする
請求項１ないし請求項５のいずれか１項に記載の高融点
金属薄膜の成膜方法。7. The refractory metal thin film according to claim 1, wherein the base is made of an aluminum-based material exposed at least in a part thereof. Method. 【請求項８】 前記高融点金属薄膜として、チタン膜を
成膜することを特徴とする請求項１ないし請求項７のい
ずれか１項に記載の高融点金属薄膜の成膜方法。8. The method for forming a refractory metal thin film according to claim 1, wherein a titanium film is formed as the refractory metal thin film.
JP6323187A 1994-12-26 1994-12-26 Formation of thin film of high melting point metal Withdrawn JPH08176823A (en)

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JP6323187A JPH08176823A (en) 1994-12-26 1994-12-26 Formation of thin film of high melting point metal
US08/576,685 US5747384A (en) 1994-12-26 1995-12-21 Process of forming a refractory metal thin film
KR1019950055584A KR960026267A (en) 1994-12-26 1995-12-23 Formation method of high melting point metal thin film
US09/024,893 US6143377A (en) 1994-12-26 1998-02-17 Process of forming a refractory metal thin film

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US6143377A (en) 2000-11-07
KR960026267A (en) 1996-07-22

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