JP3165655B2 - Method for manufacturing compound semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a group III-V compound semiconductor, and more particularly to a method for manufacturing a GaAs compound semiconductor device. In particular, the present invention relates to a method for manufacturing a GaAs compound semiconductor field effect transistor (hereinafter, simply referred to as GaAs MESFET).

[0002]

2. Description of the Related Art In a typical GaAs MESFET as a group III-V compound semiconductor device, the active region has been conventionally made to have a higher concentration and a thinner layer in accordance with a scaling rule, and a higher performance, especially a higher frequency in the communication field. Have been. However, if the concentration of the active region is simply increased, the Schottky barrier height between the active region and the gate electrode decreases, and the gate leakage current increases. Further, when the Schottky barrier height becomes lower, the breakdown voltage becomes lower, and the breakdown voltage decreases.

In order to solve such a problem, a compound semiconductor layer having a band gap wider than GaAs is formed between the active region and the gate electrode to cope with a high concentration and a thin active region. Attempts have been made to do so. For a compound semiconductor layer having a wide band gap, a group III-V compound semiconductor material such as undoped AlGaAs or InGaP is generally used. This compound semiconductor material
An epitaxially grown thin film is formed on the surface of the active region by an epitaxial growth method.

However, in an epitaxially grown thin film of a compound semiconductor material, a sufficiently low carrier concentration suitable for widening the band gap cannot be set, and accurate film thickness control cannot be performed. That is, since the reproducibility of the epitaxially grown thin film is not sufficient and uniformity cannot be obtained, the GaAs MESFET particularly intended for mass production is used.
Cannot achieve high performance.

On the other hand, as an excellent method of obtaining high reproducibility, uniformity, and high selectivity for securing desired properties in a specific region, various methods for producing semiconductor materials using ion implantation are known. Attempted. Particularly recently, GaAs
There has been reported an example in which nitrogen ions are implanted into a surface layer of a compound semiconductor substrate at a high temperature to form a GaN (gallium nitride) region. GaN has a band gap more than twice as wide as GaAs.

[0006]

SUMMARY OF THE INVENTION Conventional GaN
In the manufacturing method of the region, the following points are not taken into consideration. Nitrogen ion implantation is performed at a substrate temperature of 380.
This is carried out by setting the dose of nitrogen ions to a high concentration of about 1.5 × 10 ¹⁷ atoms / cm ² while maintaining the temperature at a high temperature of about ° C. However, since an ion implantation apparatus incorporated in a normal mass production line does not include a substrate heating mechanism, nitrogen ions cannot be implanted at a high concentration while maintaining the substrate temperature at a high temperature. Therefore, G
Since the formation of the aN region itself cannot be realized, GaAs
The high performance of the MESFET cannot be realized.

Further, a GaN region is formed by GaAsMESFE.
In order to control the depletion region while increasing the band gap and suppressing the increase in the gate leakage current, the thickness of the GaAs compound semiconductor substrate is increased by 10 n from the surface of the GaAs compound semiconductor substrate.
It is necessary to form a GaN region in a very shallow region of m or less. However, in the same manner as described above, an ordinary ion implantation apparatus cannot perform ion implantation having an implantation peak in an extremely shallow region of the substrate surface. Therefore, GaAsM
Since a GaN region suitable for ESFET cannot be formed, G
The high performance of aAsMESFET cannot be realized.

Further, recently, ion implantation (PII) in a plasma atmosphere using electron cyclotron resonance (ECR) has been carried out.
I: Research and development of the Plasma Immersion Ion Implantation method is underway. The PIII method using the ECR utilizes electron cyclotron resonance generated by applying a microwave and a magnetic field, generates high-density plasma with low energy, and can ionize gas molecules. Therefore, high-density ion implantation can be performed at a low implantation energy without damaging the substrate surface. However, at present, GaAs using the PIII method utilizing ECR is used.
There have been no reports of producing sMESFETs. When this type of ion implantation step is simply incorporated into the manufacturing process of the GaAs MESFET, a new step is added as a separate step from the normal active area formation step.
The number of manufacturing steps increases.

The present invention has been made to solve the above problems. Therefore, the present invention provides a method of manufacturing a compound semiconductor device which has high reproducibility of band gap expansion, is excellent in uniformity, can reduce leakage current, and can improve the withstand voltage and can reduce the number of manufacturing steps of a high performance compound semiconductor device. In the offer.

[0010]

According to a first aspect of the present invention, there is provided a method of manufacturing a compound semiconductor device, comprising the steps of: forming a Be injection region on a main surface of a semi-insulating GaAs compound semiconductor substrate; Forming an Si implanted region at a position shallower than the Be implanted region and a nitrogen implanted region formed by heating the GaAs compound semiconductor substrate and implanting nitrogen ions at a position shallower than the Si implanted region in a plasma atmosphere; a step, a pre-Symbol annealing protective film on at least the main surface of the GaAs compound semiconductor substrate is formed,
And a annealing step of forming the nitrogen-implanted region nitrogen ions Ga and the GaN region is a composition combining the GaAs compound semiconductor substrate, the annealing step, the Be
Implanted region and the Si implanted region were each activated
The annealing is performed using an annealing process .

According to a second aspect of the present invention, in the method of manufacturing a compound semiconductor device according to the first aspect,
The implantation region forming step is a step of forming a nitrogen implantation region by forming the Be implantation region and the Si implantation region by ion implantation, and then implanting nitrogen ions together with boron and other impurities for compensating carriers. .

According to a third aspect of the present invention, in the method for manufacturing a compound semiconductor device according to the first aspect,
The implantation region forming step is a step of implanting nitrogen ions together with boron or other impurities for compensating carriers to form a nitrogen implantation region, and then forming the Be implantation region and the Si implantation region by ion implantation. .

According to a fourth aspect of the present invention, in the method of manufacturing a compound semiconductor device according to any one of the first to third aspects, the nitrogen implantation region in the implantation region forming step is a GaAs compound semiconductor. It is formed by implanting nitrogen ions by ion implantation using ECR while the substrate is heated to a high temperature of 300 ° C. or higher.

According to a fifth aspect of the present invention, in the method of manufacturing a compound semiconductor device according to any one of the first to fourth aspects, the annealing step is performed using Si ₃ N.
_The process is characterized in that any one of the _four films, the SiO ₂ film and the WSiN film is used as an annealing protection film, and annealing is performed at an annealing temperature of 850 to 950 ° C. for 1 second to 30 minutes.

[0015]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiment 1 Hereinafter, embodiments of the present invention will be described in which the present invention is applied to a GaAs MESFET as a compound semiconductor device. FIGS. 1 to 6 are cross-sectional views showing respective steps for explaining a method for manufacturing a GaAs MESFET according to the first embodiment of the present invention.

First, as shown in FIG.
A Be implantation region 2 is formed in the main surface of the s-compound semiconductor substrate 1. The Be implantation region 2 is used to suppress a current flowing between the source and the drain, particularly in the substrate when the FET is operated. Be implantation region 2 is 1 × 10 ¹² −3 × 1
At a dose of about 0 ¹² atoms / cm ² ,
It is formed by implanting Be ions at an energy of KeV.

Next, as shown in FIG. 2, a Si implantation region 3 is formed at a position shallower than the Be implantation region 2 on the main surface of the GaAs compound semiconductor substrate 1. The Si implantation region 3 is used as a channel region of the GaAs MESFET. The Si implantation region 3 has a size of 0.5 × 10 ¹³ −3 × 10 ¹³ a
10-30 KeV at a dose of about toms / cm ²
Formed by ion implantation of Si ions with the energy of

Next, as shown in FIG. 3, a nitrogen implantation region 4 is formed at a position shallower than the Si implantation region 3 on the main surface of the GaAs compound semiconductor substrate 1. The nitrogen implantation region 4 is formed for the purpose of expanding the band gap between the channel region of the GaAs MESFET and the Schottky gate electrode. Nitrogen implantation region 4 uses an ECR device having a substrate heating mechanism,
It is formed by a method. That is, Ga is applied by the substrate heating mechanism.
In a state where the As compound semiconductor substrate 1 is maintained at a high temperature of 300 ° C. or higher, nitrogen implantation is performed in a plasma atmosphere to form a nitrogen implantation region 4. 1 × 10 ¹⁶ −2 × 10
Approximately ¹⁷ atoms / cm ² (1.5 × in this embodiment)
10 ¹⁷ atoms / cm ² are used. ), And a low energy of 3 KeV or less. This nitrogen implantation region 4 is formed in a shallow region of 10 nm or less from the main surface of the GaAs compound semiconductor substrate 1.

In forming the nitrogen implantation region 4, an ECR
A boron nitride (BN) plate is provided in the apparatus, and boron is added to the nitrogen implantation region 4 simultaneously with the implantation of nitrogen ions.
Boron is used for carrier compensation.

Next, a Schottky gate electrode 5 is formed in the gate electrode formation region on the main surface of the GaAs compound semiconductor substrate 1 (on the surface of the nitrogen implantation region 4) (see FIG. 4). Then, using the Schottky gate electrode 5 as a mask for ion implantation, oblique ion implantation is performed to form high-concentration source and drain regions 6S and 6D. Further, the Schottky gate electrode 5 is side-etched, and the Schottky gate electrode 5 is used as a mask for ion implantation, oblique ion implantation is performed, and as shown in FIG. 7D
To form That is, GaAs employing the LDD structure
A MESFET (Tr) is formed. In this embodiment, the GaAs MESFET (T
r) is formed in an asymmetric shape in which the length of the drain region 7D is shorter than that of the low concentration source region 7S.

In the oblique ion implantation, ions are implanted at an angle of 7 to 30 degrees with respect to a vertical line from the main surface of the GaAs compound semiconductor substrate 1. The high-concentration source region 6S and drain region 6D are 0.5 × 10 ¹⁴ -1 × 10 ¹⁴ ato
It is formed by implanting Si ions at an energy of 70-90 KeV at a dose of about ms / cm ² . Low concentration source region 7S and drain region 7D
Is formed by implanting Si ions at a dose of about 2 × 10 ¹³ −6 × 10 ¹³ atoms / cm ^{2 at} an energy of 30 to 50 KeV.

Next, an annealing protective film 9 covering all surfaces including the main surface of the GaAs compound semiconductor substrate 1 is formed (see FIG. 5). In the present embodiment, GaAsME
Since the SFET (Tr) is formed as a single device, the annealing protection film 9 is entirely formed. GaAsM
A plurality of ESFETs (Tr) are arranged, and each GaAs
When the sMESFETs (Tr) are separated from each other, the annealing protection film 9 is formed of at least each GaAs.
It is formed in a shape covering the MESFET (Tr). The annealing protection film 9 is formed of any material such as a Si ₃ N ₄ film, a SiO ₂ film, and a WSiN film, which has heat resistance and hardly causes deterioration.

Then, as shown in FIG. 5, the Be implanted region 2 and the Si implanted region 3 which have already been formed are activated by annealing using the anneal protection film 9, and the nitrogen implanted region is activated. 4 and the Ga of the GaAs compound semiconductor substrate 1 are compositionally synthesized to form a GaN region 4N. The GaN region 4N has a function of expanding the band gap. Of course, the annealing is performed in the high concentration source region 6.
S, the drain region 6D, the low-concentration source region 7S, and the drain region 7D are activated, and the crystal damage due to the above-described ion implantation in each region is recovered. The annealing is performed at an annealing temperature of, for example, 850 to 950 ° C. for 1 second to 30 minutes.

Next, the above-described annealing protection film 9 is selectively removed to form a source electrode 10S on the high concentration source region 6S and a drain electrode 10D on the drain region 6D as shown in FIG. I do. This source electrode 10
The GaAs MESFET (Tr) is completed by completing the step of forming the S and drain electrodes 10D, and the manufacturing process ends.

Embodiment 2 In this embodiment, an example will be described in which the steps of forming the Be implantation region 2 and the Si implantation region 3 and the process of forming the nitrogen implantation region 4 are interchanged in the above-described GaAs MESFET manufacturing process. 7 to 9 are cross-sectional views showing respective steps for explaining a method for manufacturing a GaAs MESFET according to the second embodiment of the present invention.

First, as shown in FIG. 7, a nitrogen implantation region 4 is formed in the main surface of the GaAs compound semiconductor substrate 1. This nitrogen implantation region 4 is formed by a PIII method using ECR, similarly to the manufacturing method described in the first embodiment.

Next, as shown in FIG. 8, a Be implantation region 2 is formed at a position deeper than the nitrogen implantation region 4 on the main surface of the GaAs compound semiconductor substrate 1. Be injection region 2
Are formed in the same manner as in the manufacturing method described in the first embodiment.

Next, as shown in FIG. 9, on the main surface of the GaAs compound semiconductor substrate 1, a Si implantation region 3 is formed at a position deeper than the nitrogen implantation region 4 and shallower than the Be implantation region 2. The Si implantation region 3 is the same as that of the first embodiment.
It is formed in the same manner as in the manufacturing method described above.

Subsequently, the Schottky gate electrode 5, the high-concentration source region 6S and the drain region 6D, the low-concentration source region 7S and the low-concentration source region 7D are formed in the same manner as in the manufacturing method of FIG. Then, each of the annealing protection films 9 is formed. Then, annealing is performed to form a GaN region 4N, and after removing the annealing protective film 9, a source electrode 10S and a drain electrode 10D are formed. As a result, the GaAs MESFET (Tr) is completed, and the manufacturing process ends.

The present invention is not limited to a GaAs MESFET, but can be applied to a variable resistance element using a Schottky junction.

[0031]

As described above, in the method of manufacturing a compound semiconductor device according to the present invention, an ECR apparatus having a substrate heating mechanism and having an ECR source has a low energy on an extremely shallow surface portion of a GaAs compound semiconductor substrate. Nitrogen ions are implanted at a high density, and a GaN region can be formed by the implanted nitrogen and Ga of the GaAs compound semiconductor substrate. This GaN region increases the band gap, and furthermore, the reproducibility of the GaN region is high, and the GaN region is excellent in uniformity.
Higher performance of the compound semiconductor device can be realized. Since the GaN region having high reproducibility and excellent uniformity is formed by also using the annealing process for activating the active region of the compound semiconductor device, the number of manufacturing steps can be reduced.

Further, by appropriately selecting the material of the annealing protection film and the generated gas, the annealing protection film can be formed continuously after the ion implantation without being released to the atmosphere in the chamber of the ECR apparatus. As a result, Ga
The interface between the As compound semiconductor substrate and the GaN region, Ga
Since the cleaning of the interface between the N region and the annealing protective film formed on the surface can be promoted, the reproducibility and uniformity of the GaN region can be further improved.

[Brief description of the drawings]

FIG. 1 shows a GaAs MES according to a first embodiment of the present invention.
FIG. 4 is a cross-sectional view of a first step for describing the method for manufacturing an FET.

FIG. 2 is a sectional view of a second step.

FIG. 3 is a sectional view of a third step.

FIG. 4 is a sectional view of a fourth step.

FIG. 5 is a sectional view of a fifth step.

FIG. 6 is a sectional view of a sixth step.

FIG. 7 shows a GaAs MES according to a second embodiment of the present invention.
FIG. 4 is a cross-sectional view of a first step for describing the method for manufacturing an FET.

FIG. 8 is a sectional view of a second step.

FIG. 9 is a sectional view of a third step.

[Explanation of symbols]

1 GaAs compound semiconductor substrate, 2 Be implantation region, 3
Si implantation region, 4 nitrogen implantation region, 4N GaN region,
5 Schottky gate electrode, 6S, 7S source region,
6D, 7D drain region, 9 annealing protective film, 10
S source electrode, 10D drain electrode.

Continuation of the front page (56) References JP-A-3-87024 (JP, A) JP-A-1-93173 (JP, A) JP-A-63-29935 (JP, A) JP-A-64-2368 (JP) JP-A-8-148510 (JP, A) JP-A-5-82555 (JP, A) JP-A-3-273632 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB (Name) H01L 21/338 H01L 29/812

Claims (5)

(57) [Claims] A semi-insulating GaAs compound semiconductor substrate having a Be implantation region at a main surface thereof, a Si implantation region at a position shallower than the Be implantation region, and heating the GaAs compound semiconductor substrate to form the Si implantation in a plasma atmosphere. an injection region forming step of forming a nitrogen implanted region by implanting nitrogen ions into a position shallower than the region, the annealing protective film formed on at least the main surface of the GaAs compound semiconductor substrate, wherein the nitrogen ions before Symbol nitrogen implanted region includes a annealing step of forming a GaN region is composition synthesized and GaAs compound semiconductor substrate Ga, and the annealing step utilizes an annealing treatment for each activating the be implantation region and the Si-implanted region method of manufacturing a compound semiconductor device, characterized in that, to be performed. 2. The method of manufacturing a compound semiconductor device according to claim 1, wherein said implanting region forming step compensates boron and other carriers after forming said Be implanted region and Si implanted region by ion implantation. A method for producing a compound semiconductor device, comprising a step of implanting nitrogen ions together with impurities to form a nitrogen implanted region. 3. The method of manufacturing a compound semiconductor device according to claim 1, wherein said implanted region forming step comprises implanting nitrogen ions together with boron and other impurities for compensating carriers to form a nitrogen implanted region. A method for manufacturing a compound semiconductor device, comprising forming a Be implantation region and a Si implantation region by ion implantation. 4. The method for manufacturing a compound semiconductor device according to claim 1, wherein the nitrogen implanted region in the implanted region forming step is a process in which the GaAs compound semiconductor substrate is heated to a high temperature of 300 ° C. or more. A method for producing a compound semiconductor device, characterized by being formed by implanting nitrogen ions by ion implantation utilizing electron cyclotron resonance in a state of being heated. 5. The method for manufacturing a compound semiconductor device according to claim 1, wherein the annealing is performed using a Si ₃ N ₄ film, a SiO ₂ film, a WS
Using one of the iN films as an annealing protection film, 85
A method for producing a compound semiconductor device, comprising the step of performing annealing for 1 second to 30 minutes at an annealing temperature of 0 to 950 ° C.