JP3163656B2 - Inverter device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an inverter device for converting a DC voltage obtained by rectifying and smoothing an AC power supply to a high frequency and supplying it to a load.

[0002]

FIG. 18 is a circuit diagram of a conventional inverter device (Japanese Patent Application No. 2-327324). Hereinafter, the circuit configuration will be described. An AC power supply Vs is connected to an AC input terminal of the full-wave rectifier DB. Full-wave rectifier DB
Is connected to a smoothing capacitor C1 via a diode D3. A series circuit of transistors Q1 and Q2 is connected to the smoothing capacitor C1. Diodes D1 and D2 are connected in anti-parallel to the transistors Q1 and Q2, respectively. Transistor Q
The power supply side terminal of the filament of the discharge lamp La is connected to both ends of the discharge lamp 2 via an inductor L1 and a capacitor C3. A capacitor C2 is connected in parallel between the non-power supply terminals of the filament of the discharge lamp La. A series circuit of an inductor L2, a capacitor C4, an inductor L1, and a transistor Q2 is connected to a DC output terminal of the full-wave rectifier DB.

The operation of the above circuit will be described below.
First, the operation of the inverter will be described. The inverter comprises transistors Q1, Q2 and diodes D1, D2,
Inductor L1, capacitors C2 and C3 and discharge lamp La
It is composed of The transistors Q1 and Q2 are alternately turned on and off at a high speed to convert the DC voltage of the smoothing capacitor C1 to a high frequency, thereby lighting the discharge lamp La at a high frequency. The capacitor C2 constitutes a path for supplying a preheating current to the filament of the discharge lamp La, and also functions as a capacitor for resonance with the inductor L1. The capacitor C3 is a coupling capacitor for cutting a DC component.

The feature of this circuit is that an inductor L1 which is a vibration element of an inverter and a switching transistor Q
2 is connected to the DC output terminal of the full-wave rectifier DB via a series circuit of the inductor L2 and the capacitor C4. Therefore, when the transistor Q2 is turned on, an input current flows through a path of the rectifier DB, the inductor L2, the capacitor C4, the inductor L1, and the transistor Q2. Inductor L2, capacitor C4, inductor L
Reference numeral 1 denotes a vibration system, and the direction of the current is eventually reversed. The inverted current is obtained by the capacitor C4 and the inductor L
2, diode D3, transistor Q1, inductor L
1 or a second path passing through the capacitor C4, the inductor L2, the diode D3, the capacitor C1, the capacitor C3, the discharge lamp La, and the capacitor C4, and discharges the charge of the capacitor C4. 1st or 2nd
Which path passes depends on the resonance frequency and the switching frequency of the inductor L2, the capacitor C4, and the inductor L1.

[0005] The above process is repeated over the entire section of the commercial cycle of the AC power supply Vs, so that the input current always flows. Therefore, the input power factor increases. Also, an appropriate filter circuit is added to the input side, and the input current waveform from which the high-frequency component has been removed can be a waveform close to a sine wave with few harmonic components. Further, in this circuit, the inductor L1 which is a vibration element of the inverter is shared by both the input power factor improvement circuit and the inverter. Therefore, DC-DC conversion is applied to the inductor L1,
Since a part of the current from the rectifier DB directly flows without passing through the two conversion processes of DC-AC conversion, the overall efficiency of the circuit is increased, and the circuit is suitable for a relatively small and small-capacity inverter device. It was a method.

[0006]

However, in the above-mentioned conventional example, it has been found that a discontinuous point occurs in the input current under certain conditions. FIG. 19 shows waveforms at various parts when an appropriate filter circuit is inserted between the AC power supply Vs and the rectifier DB. In the figure, V4 is the voltage of the capacitor C4, and Id is the output current of the full-wave rectifier DB.
As shown in the waveform diagram, the input current Iin does not become 0 when the input voltage Vin is 0 V, and becomes discontinuous at this point. As described above, when the input current Iin is discontinuous, there is a problem that a harmonic component of the input current increases.

SUMMARY OF THE INVENTION The present invention has been made in view of the foregoing, and an object of the present invention is to improve the input power factor by supplying an input current from an AC power supply through a vibration element and a switching element of an inverter. It is an object of the present invention to eliminate an input current discontinuity and reduce a harmonic component of an input current regardless of a controlled condition in an inverter device provided with a circuit that performs the control.

[0008]

According to the present invention, in order to solve the above-mentioned problems, as shown in FIG. 1, a full-wave rectifier DB for full-wave rectifying an AC power supply Vs, a full-wave rectifier DB
A smoothing capacitor C1 connected via a diode D3 to a DC output terminal of the first and second transistors Q1 and Q2 connected in series at both ends of the smoothing capacitor C1 and alternately turned on and off; An impedance element (a series circuit of an inductor L2 and a capacitor C4) having one end connected to a connection point between the anti-parallel diodes D1 and D2 of the first and second transistors Q1 and Q2 and a diode D3 and a DC output terminal of the full-wave rectifier DB. A first inverter element (inductor L1) connected between a connection point of the first and second transistors Q1 and Q2 and the other end of the impedance element; a DC output terminal of the full-wave rectifier DB; A second inverter element (the load F and the capacitors C2 and C2) connected between the connection point of the capacitor C1 and the other end of the impedance element. ) And the inverter device comprising a and is characterized in that a means for suppressing the voltage V4 of the direction of the impedance element to be superimposed on the rectified output voltage of said full-wave rectifier DB.

[0009]

The operation of the present invention will be described below with reference to FIG. The circuit of FIG. 1 is substantially the same as the circuit of the conventional example shown in FIG. 18, and a filter circuit including capacitors C5 and C6 and a transformer L3 is inserted between the AC power supply Vs and the full-wave rectifier DB. The only difference is that the load F is not limited to the discharge lamp La. As shown in the figure, the voltage of the smoothing capacitor C1 is V1, and the voltage of the capacitor C4 included in the impedance element is V4. The input voltage from the AC power supply Vs is Vin, and the input current is Iin
And the output current of the full-wave rectifier DB is Id.

According to the research of the present inventor, the cause of the discontinuity in the input current is that the voltage generated in the capacitor C4 is superimposed on the power supply voltage. When the transistor Q2 is ON, the inductor L2 and the capacitor C
4. A current flows through a path returning to the rectifier DB via the inductor L1 and the transistor Q2. When the transistor Q2 is turned off, the inductor L2, the capacitor C4, and the inductor L
1, rectifier D through diode D1 and capacitor C1
The current flows on the path returning to B, and the directions of the currents flowing in the inductor L2 and the capacitor C4 are the same.

Next, when the transistor Q1 is turned on, the inductor L2, the diode D3,
A current flows through a path returning to the capacitor C4 via the transistor Q1 and the inductor L1. At this time, the capacitor C4 and the inductors L2 and L1 form a resonance system. When the transistor Q1 is turned off, a current flows through a path returning to the inductor L1 through the inductor L1, the capacitor C4, the inductor L2, the diode D3, the capacitor C1, and the diode D2 for a while due to the residual energy. At this time, the capacitor C4 is charged in the direction of the voltage V4 indicated by the arrow in the drawing, and when the transistor Q2 is turned on next and the input current flows, this voltage V4 is superimposed on the power supply voltage. . In particular, when the input voltage is low, this effect becomes remarkable, and appears as a discontinuity of the input current Iin as shown in FIG. Therefore, in the present invention, the voltage V4 of the capacitor C4 surrounded by the broken line in FIG.
In particular, the inconvenience of discontinuity of the input current is eliminated by providing means for suppressing a voltage generated in a direction superimposed on the power supply voltage.

The above is the description of the input current from the AC power supply Vs. As the inverter, when the transistor Q1 is on, from the capacitor C1, through the transistor Q1, the inductor L1, the capacitor C3, the load F and the capacitor C2. A current flows on a path returning to the capacitor C1, and when the transistor Q2 is on, a current flows on a path returning from the capacitor C3 to the capacitor C3 via the inductor L1, the transistor Q2, the load F, and the capacitor C2. When the transistors Q1 and Q2 are turned on and off alternately, a high-frequency current is supplied to the load F.

[0013]

FIG. 2 is a circuit diagram of a first embodiment of the present invention. This circuit has the basic configuration of the present invention shown in FIG.
A diode D4 is connected in parallel to both ends of a capacitor C4 with the polarity shown. Due to the presence of the diode D4, the charging current is bypassed via the diode D4 where the capacitor C4 should be charged in the positive direction of the voltage V4 indicated by the arrow in the figure. C4 is not charged in the above orientation. Therefore, when the transistor Q2 is turned on, the voltage V4 of the capacitor C4 is not superimposed on the rectified output voltage of the rectifier DB, and the discontinuity of the input current Iin as shown in FIG. 19 is eliminated.

FIG. 3 is a waveform chart of each part of the present embodiment. Thus, the discontinuity of the input current Iin is eliminated, and the input current Iin has a similar shape substantially proportional to the input voltage Vin,
The harmonic components of the input current are reduced. Needless to say, the input power factor is high.

FIG. 4 is a circuit diagram of a second embodiment of the present invention. In this embodiment, a diode D4 and a switch SW are provided in series with the capacitor C4 as means for suppressing the voltage of the capacitor C4. When an input current flows from the AC power supply Vs, the current flows through the diode D4, the current is inverted, and the capacitor C4 is connected to the arrow V in FIG.
When the charging direction becomes the positive direction of No. 4, the control circuit K controls the switch means SW to be turned off. Therefore, the voltage V4 that is superimposed on the power supply
Is not charged, the discontinuity of the input current is eliminated, and the harmonic component of the input current is reduced.

FIG. 5 shows a modification of the embodiment shown in FIG. This circuit is the same as the embodiment shown in FIG. 4, except that the connection of each element is reversed in the embodiment shown in FIG. In this case, when the transistor Q1 is turned on, an input current flows from the rectifier DB to the rectifier DB via the transistor Q1, the inductor L1, the inductor L2, the capacitor C4, and the diode D4. After the transistor Q1 is turned off, the switch SW may be turned off by the control circuit K at an appropriate timing. Thus, the effect of eliminating the discontinuity of the input current and reducing the harmonic components of the input current is the same as in the embodiment shown in FIG. In addition,
As is clear from the above description, if the switch means SW is a bidirectional switch, the diode D4 is not necessarily required.

FIG. 6 is a circuit diagram of a third embodiment of the present invention. In this embodiment, as means for suppressing the voltage V4 of the capacitor C4, a frequency control circuit Kf for changing the switching frequency of the transistors Q1 and Q2 is provided. As described in the description of the operation of the circuit shown in FIG. 1, after the transistor Q1 is turned off, the inductors L1 and L2 and the capacitor C4 form a resonance system. Therefore, by changing the switching frequency of the transistors Q1 and Q2, the resonance state of the resonance system can be controlled, and the voltage V4 of the capacitor C4 can be suppressed. Actually, if the switching frequency is farther than the natural resonance frequency of the resonance system, the resonance effect is weakened.
Can also be suppressed. For example, if the switching frequency is set considerably higher than the natural resonance frequency of the resonance system, the voltage V4 of the capacitor C4 can be reduced. As described above, the discontinuity of the input current is eliminated and the harmonic component of the input current is reduced, as described above.

FIG. 7 is a circuit diagram of a fourth embodiment of the present invention. In this embodiment, as means for suppressing the voltage V4 of the capacitor C4, a capacitor C5 is connected in parallel with the capacitor C4.
And a series circuit of switch means SW.
At the timing when the transistor Q2 is turned on and the input current flows, the control circuit K controls the switch SW to be turned off so that the input current flows only through the capacitor C4. Next, when the transistor Q1 is turned on and the current is inverted, the control circuit K controls the switch means SW to be turned on to equivalently increase the capacitance of the capacitor C4. By doing so, the voltage V4 charged in the capacitor C4 becomes lower, so that the action superimposed on the power supply voltage is reduced. Therefore, the problem of the discontinuity of the input current is improved. It is convenient to insert a small inductance in series with the capacitor C5, since noise at the time when the switch means SW is turned on is reduced.

FIG. 8 is a circuit diagram of a fifth embodiment of the present invention. This embodiment is an application of the first embodiment shown in FIG. 2, and has a configuration in which the inductor L2 is removed from the circuit of FIG. In this case as well, a problem similar to that of the conventional example shown in FIG. 18 occurs, but in the present embodiment, a diode D4 is connected in parallel with the capacitor C4 with the polarity shown in FIG. By suppressing this, the problem of the conventional example is solved. Note that such an inductor L2
It is needless to say that in the configuration in which is omitted, the means shown in the above-described second, third and fourth embodiments may be used as means for suppressing the voltage V4 of the capacitor C4.

FIG. 9 is a circuit diagram of a sixth embodiment of the present invention. This embodiment is still another application of the first embodiment shown in FIG. 2, and has a configuration in which the connection point of the DC component cutting capacitor C3 is changed in the circuit shown in FIG. ing. Also in this configuration, the transistor Q
1 turns on, the inductor L1 and the capacitor C
3 and C4 form a resonance system, and a voltage V
4 is charged in the positive direction indicated by the arrow, and is superimposed on the power supply voltage. Therefore, a discontinuous point may appear in the input current. Therefore, in this embodiment, a diode D4 is connected in parallel to the capacitor C4 with the polarity shown in the drawing, and the capacitor V4 is charged with the voltage V4 superimposed on the power supply voltage according to the same principle as in the first embodiment. Is preventing that. Therefore, the effect that the discontinuity point of the input current is eliminated, the input power factor is high, and the harmonic component of the input current is reduced is obtained. In such a configuration in which the connection point of the capacitor C3 is changed, the means described in each of the second, third, and fourth embodiments may be used as means for suppressing the voltage V4 of the capacitor C4. Needless to say.

FIG. 10 shows a modification of the embodiment shown in FIG. This circuit has a configuration in which an inductor L2 is connected in series with a capacitor C4 in the embodiment shown in FIG. The operation is almost the same as the embodiment shown in FIG.

FIG. 11 is a circuit diagram of a seventh embodiment of the present invention. This embodiment is an application example of the second embodiment shown in FIG. 4, and when compared with the circuit of FIG.
And the load F and the connection point of the inductor L1 are interchanged. In this case, when the transistor Q2 is turned on, the input current is supplied from the rectifier DB to the inductor L2, the capacitor C4, and the diode D2.
4. The current flows through the path returning to the rectifier DB via the capacitor C3, the load F, the capacitor C2, and the transistor Q2. After the currents in the inductor L2 and the capacitor 4 are reversed, FIG.
As in the second embodiment, the capacitor C4 starts to be charged in the positive direction of the voltage V4. At this time, the control circuit K controls the switch means SW to be turned off. This suppresses the voltage superimposed on the power supply voltage,
The input current discontinuity is eliminated, the input power factor is high, and the harmonic components of the input current are reduced.

FIG. 12 is a circuit diagram of an eighth embodiment of the present invention. This embodiment is an application example of the first embodiment shown in FIG. 2, and when compared with the circuit of FIG.
And the connection point of the circuit composed of the load F is changed. Hereinafter, the operation when the diode D4 is not provided will be briefly described. First, when the transistor Q2 is on, a current flows from the rectifier DB through a path returning to the rectifier DB via the inductor L2, the capacitor C4, the inductor L1, and the transistor Q2. Transistor Q2
Is turned off, the rectifier DB
From the inductor L2, capacitor C4, inductor L
1, rectifier D via diode D1 and capacitor C1
A current flows in a path returning to B, and a current flows in the same direction in the inductor L2 and the capacitor C4. Next, when the transistor Q1 is turned on, a current flows from the capacitor C4 through a path returning to the capacitor C4 via the inductor L2, the diode D3, the transistor Q1, and the inductor L1. At this time, the capacitor C4 and the inductors L2 and L1
Form a resonance system. When the transistor Q1 is turned off, the residual energy causes the inductor L1 to temporarily turn off.
Through a capacitor C4, an inductor L2, a diode D3, a capacitor C1, and a diode D2, the inductor L1
Current flows in the path returning to. At this time, the capacitor C4
Is charged in the positive direction of the voltage V4 indicated by the arrow in the figure,
Next, when the transistor Q2 is turned on and an input current flows, this voltage V4 is superimposed on the power supply voltage.

As described above, although the circuit configuration is slightly different, the operation is very similar to the conventional example shown in FIG. Therefore, as in the first embodiment shown in FIG. 2, a diode D4 is connected in parallel to the capacitor C4 so that the capacitor C4 does not generate a voltage V4 that is superimposed on the power supply voltage. In this way, the discontinuity of the input current is eliminated, and the harmonic component of the input current can be reduced with a high input power factor. In the circuit of FIG. 12, almost the same effect can be obtained even in a circuit configuration in which the inductor L2 is omitted.

FIG. 13 is a circuit diagram of a ninth embodiment of the present invention. This embodiment is an application of the second embodiment shown in FIG. 4. Compared with the circuit of FIG. 4, the inverter load including the inductor L1, the capacitors C2 and C3 and the load F is replaced with the lower transistor Q2. Upper transistor Q
1 is connected to both ends. Transistor Q
2 is turned on, the inductor L
2, an input current flows through a path returning to the full-wave rectifier DB via the capacitor C4, the diode D4, the load F, the capacitor C2, and the transistor Q2. Next, the transistor Q1
Is turned on, the current in the inductor L2 and the current in the capacitor C4 are inverted, and a voltage V4 that is superimposed on the power supply voltage is generated in the capacitor C4. At that timing, the control circuit K turns off the switch means SW. With such control, the discontinuity of the input current is eliminated, and the harmonic component of the input current can be reduced with a high input power factor.

FIG. 14 is a circuit diagram of a tenth embodiment of the present invention. This embodiment is an application of the third embodiment shown in FIG. 6. Compared with the circuit of FIG. 6, the inverter load including the inductor L1, the capacitors C2 and C3 and the load F is replaced by the lower transistor Q2. And connected to both ends of the upper transistor Q1. In this circuit, as means for suppressing the voltage V4 of the capacitor C4,
A frequency control circuit Kf for changing the switching frequency of the transistors Q1 and Q2 is provided. Transistor Q1,
By changing the switching frequency of Q2, the resonance state of the resonance system can be controlled, and the voltage V4 of the capacitor C4 can be suppressed. Actually, if the switching frequency is set farther than the natural resonance frequency of the resonance system, the resonance action is weakened, so that the voltage V4 of the capacitor C4 is also suppressed.
Thereby, the discontinuity of the input current is eliminated, and the harmonic component of the input current is reduced.

FIG. 15 is a circuit diagram of an eleventh embodiment of the present invention. This embodiment is an application of the fourth embodiment shown in FIG. 7. Compared with the circuit of FIG. 7, the inverter load composed of the inductor L1, the capacitors C2, C3 and the load F is replaced by the lower transistor Q2. And connected to both ends of the upper transistor Q1. In this circuit, as means for suppressing the voltage V4 of the capacitor C4,
A series circuit of a capacitor C5 and a switch means SW is connected in parallel with the capacitor C4. Transistor Q
At the timing when 2 turns on and the input current flows, the control circuit K controls the switch means SW to turn off so that the input current flows only through the capacitor C4. Next, when the transistor Q1 is turned on and the current is inverted,
The control circuit K turns on the switch means SW to connect the capacitor C5 in parallel with the capacitor C4, equivalently increasing the capacitance of the capacitor C4. By doing so, the voltage V4 charged in the capacitor C4 becomes lower, so that the action superimposed on the power supply voltage is reduced. Therefore, the problem of the discontinuity of the input current is improved.

The technical scope of the present invention is not limited to the above-described embodiment, but can be widely applied to the inverter device having the structure shown in FIG. 16 or FIG. In the circuit of FIG. 16, a series circuit of the first and second inverter elements X and Y is connected in parallel with the lower transistor Q2. Also,
In the circuit of FIG. 17, a series circuit of the first and second inverter elements X and Y is connected in parallel with the upper transistor Q1. In each circuit, an impedance element Z is connected between a connection point between the first and second inverter elements X and Y and a connection point between the full-wave rectifier DB and the diode D3. Z includes a capacitor C4. The capacitor C4 of the impedance element Z is connected to the first and second inverter elements X and Y.
And a resonance system, and the resonance current generates a voltage V4 in a direction superimposed on the power supply voltage on the capacitor C4. By providing means for suppressing the voltage V4,
Discontinuities in the input current can be eliminated, and harmonic components of the input current can be reduced.

In the present invention, the load F is not particularly limited. For example, when a discharge lamp is used as a load, a high-frequency lighting device having a high input power factor and a low harmonic component of the input current is realized. it can. In addition, it can be applied to a wide range of applications such as control of incandescent lamps, control of electric motors, and power supply devices.

[0030]

According to the present invention, an AC power supply is full-wave rectified, and a DC voltage obtained by a smoothing capacitor via a diode is switched by a series circuit of first and second switching elements having an anti-parallel diode. Connecting an impedance element including at least a capacitor to a connection point between the DC output terminal of the full-wave rectifier and the diode via a first inverter element from a connection point of the first and second switching elements, and In an inverter device in which a second inverter element is connected to a connection point of a diode or a DC output terminal of the full-wave rectifier, means for suppressing a voltage of the impedance element in a direction superimposed on a rectified output voltage of the full-wave rectifier is provided. Therefore, it is possible to eliminate the discontinuity of the input current and reduce the harmonic components of the input current. There is an effect that kill.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a basic configuration of the present invention.

FIG. 2 is a circuit diagram of a first embodiment of the present invention.

FIG. 3 is a waveform chart showing the operation of the first embodiment of the present invention.

FIG. 4 is a circuit diagram of a second embodiment of the present invention.

FIG. 5 is a circuit diagram of a modification of the second embodiment of the present invention.

FIG. 6 is a circuit diagram of a third embodiment of the present invention.

FIG. 7 is a circuit diagram of a fourth embodiment of the present invention.

FIG. 8 is a circuit diagram of a fifth embodiment of the present invention.

FIG. 9 is a circuit diagram of a sixth embodiment of the present invention.

FIG. 10 is a circuit diagram of a modification of the sixth embodiment of the present invention.

FIG. 11 is a circuit diagram of a seventh embodiment of the present invention.

FIG. 12 is a circuit diagram of an eighth embodiment of the present invention.

FIG. 13 is a circuit diagram of a ninth embodiment of the present invention.

FIG. 14 is a circuit diagram of a tenth embodiment of the present invention.

FIG. 15 is a circuit diagram of an eleventh embodiment of the present invention.

FIG. 16 is a block circuit diagram showing a configuration according to claim 1;

FIG. 17 is a block circuit diagram showing a configuration according to claim 2;

FIG. 18 is a circuit diagram of a conventional example.

FIG. 19 is a waveform chart showing the operation of the conventional example.

[Explanation of symbols]

 D1, D2, D3 Diode C1, C2, C3 Capacitor C4, C5, C6 Capacitor Q1, Q2 Transistor L1, L2 Inductor L3 Transformer Vs AC power supply DB Full-wave rectifier F Load

Continuation of the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H02M 7/48 H05B 41/24

Claims (13)

(57) [Claims] 1. A full-wave rectifier for full-wave rectification of an AC power supply, a smoothing capacitor connected to a DC output terminal of the full-wave rectifier via a diode, and both ends of the smoothing capacitor connected in series and turned on alternately. First and second turned off
A switching element, an anti-parallel diode of the first and second switching elements, an impedance element having one end connected to a connection point between the diode and the DC output terminal of the full-wave rectifier and including at least a capacitor; A first inverter element connected between the connection point of the switching element and the other end of the impedance element; and a first inverter element connected between the connection point of the DC output terminal of the full-wave rectifier and the smoothing capacitor and the other end of the impedance element. And a second inverter element connected to the inverter, further comprising means for suppressing a voltage of the impedance element in a direction superimposed on a rectified output voltage of the full-wave rectifier. 2. A full-wave rectifier for full-wave rectification of an AC power supply, a smoothing capacitor connected to a DC output terminal of the full-wave rectifier via a diode, and both ends of the smoothing capacitor connected in series and turned on alternately. First and second turned off
A switching element, an anti-parallel diode of the first and second switching elements, an impedance element having one end connected to a connection point between the diode and the DC output terminal of the full-wave rectifier and including at least a capacitor; A first inverter element connected between the connection point of the switching element and the other end of the impedance element, and a first inverter element connected between the connection point of the diode and the smoothing capacitor and the other end of the impedance element. An inverter device comprising: two inverter elements; and a means for suppressing a voltage of the impedance element in a direction superimposed on a rectified output voltage of the full-wave rectifier. 3. The first inverter element comprises a series circuit of a resonance inductor and a DC component cutting capacitor, the second inverter element comprises a parallel circuit of a load and a resonance capacitor, and the impedance element comprises a capacitor. 2. The inverter device according to claim 1, comprising a series circuit of a capacitor and an inductor. 4. The first inverter element comprises a resonance inductor, and the second inverter element is constituted by connecting a DC component cutting capacitor in series to a parallel circuit of a load and a resonance capacitor, and comprises an impedance element. 2. The inverter device according to claim 1, wherein the inverter device comprises a capacitor or a series circuit of a capacitor and an inductor. 5. The first inverter element is configured by connecting a DC component cutting capacitor in series to a parallel circuit of a load and a resonance capacitor, and the second inverter element is composed of a resonance inductor and an impedance element. 2. The inverter device according to claim 1, wherein the inverter device comprises a series circuit of a capacitor and an inductor. 6. The first inverter element is configured by connecting a DC component cutting capacitor in series to a parallel circuit of a load and a resonance capacitor, and the second inverter element is formed of a resonance inductor, 3. The inverter device according to claim 2, wherein the inverter device comprises a series circuit of a capacitor and an inductor. 7. The first inverter element comprises a series circuit of a resonance inductor and a DC component cutting capacitor, the second inverter element comprises a parallel circuit of a load and a resonance capacitor, and the impedance element comprises a capacitor. 3. The inverter device according to claim 2, comprising a series circuit of a capacitor and an inductor. 8. The first inverter element comprises a resonance inductor, and the second inverter element is configured by connecting a DC component cut capacitor in series to a parallel circuit of a load and a resonance capacitor, and comprises an impedance element. 3. The inverter device according to claim 2, wherein the device comprises a capacitor or a series circuit of a capacitor and an inductor. 9. The first inverter element comprises a parallel circuit of a load and a capacitor for resonance, the second inverter element comprises a series circuit of an inductor for resonance and a capacitor for cutting a DC component, and the impedance element comprises a capacitor. 3. The inverter device according to claim 2, comprising a series circuit of an inductor and an inductor. 10. The capacitor according to claim 1, wherein a diode for suppressing a voltage superimposed on a rectified output voltage of the full-wave rectifier is connected in parallel to the capacitor included in the impedance element. An inverter device according to any one of the above. 11. A switch included in a capacitor included in the impedance element, the switch being off-controlled at a timing when a voltage in a direction to be superimposed on a rectified output voltage of the full-wave rectifier is connected in series. Item 10. The inverter device according to any one of Items 1 to 9. 12. The inverter device according to claim 1, wherein the means for suppressing the voltage of the impedance element is a means for changing an operating frequency of the first and second switching elements. . 13. A capacitor included in the impedance element is connected in parallel with another capacitor via switch means that is turned on at a timing when a voltage in a direction superimposed on the rectified output voltage of the full-wave rectifier is generated. The inverter device according to claim 1, wherein: