JP3067292B2 - Inverter device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an inverter device for converting a DC voltage obtained by rectifying and smoothing an AC power supply to a high frequency and supplying it to a load.

[0002]

2. Description of the Related Art FIG. 20 is a circuit diagram of a conventional inverter device (Japanese Patent Application No. 2-327324). Hereinafter, the circuit configuration will be described. An AC power supply Vs is connected to an AC input terminal of the full-wave rectifier DB. Full-wave rectifier DB
Is connected to a smoothing capacitor C1 via a diode D3. A series circuit of transistors Q1 and Q2 is connected to the smoothing capacitor C1. Diodes D1 and D2 are connected in anti-parallel to the transistors Q1 and Q2, respectively. Transistor Q
The power supply side terminal of the filament of the discharge lamp La is connected to both ends of the discharge lamp 2 via an inductor L1 and a capacitor C3. A capacitor C2 is connected in parallel between the non-power supply terminals of the filament of the discharge lamp La. A series circuit of an inductor L2, a capacitor C4, an inductor L1, and a transistor Q2 is connected to a DC output terminal of the full-wave rectifier DB.

The operation of the above circuit will be described below.
First, the operation of the inverter will be described. The inverter comprises transistors Q1, Q2 and diodes D1, D2,
Inductor L1, capacitors C2 and C3 and discharge lamp La
It is composed of The transistors Q1 and Q2 are alternately turned on and off at a high speed to convert the DC voltage of the smoothing capacitor C1 to a high frequency, thereby lighting the discharge lamp La at a high frequency. The capacitor C2 constitutes a path for supplying a preheating current to the filament of the discharge lamp La, and also functions as a capacitor for resonance with the inductor L1. The capacitor C3 is a coupling capacitor for cutting a DC component.

The feature of this circuit is that an inductor L1 which is a vibration element of an inverter and a switching transistor Q
2 is connected to the DC output terminal of the full-wave rectifier DB via a series circuit of the inductor L2 and the capacitor C4. Therefore, when the transistor Q2 is turned on, an input current flows through a path of the rectifier DB, the inductor L2, the capacitor C4, the inductor L1, and the transistor Q2. Inductor L2, capacitor C4, inductor L
Reference numeral 1 denotes a vibration system, and the direction of the current is eventually reversed. The inverted current is obtained by the capacitor C4 and the inductor L
2, diode D3, transistor Q1, inductor L
1 or a second path passing through the capacitor C4, the inductor L2, the diode D3, the capacitor C1, the capacitor C3, the discharge lamp La, and the capacitor C4, and discharges the charge of the capacitor C4. 1st or 2nd
Which path passes depends on the resonance frequency and the switching frequency of the inductor L2, the capacitor C4, and the inductor L1.

[0005] The above process is repeated over the entire section of the commercial cycle of the AC power supply Vs, so that the input current always flows. Therefore, the input power factor increases. Also, an appropriate filter circuit is added to the input side, and the input current waveform from which the high-frequency component has been removed can be a waveform close to a sine wave with few harmonic components. Further, in this circuit, the inductor L1 which is a vibration element of the inverter is shared by both the input power factor improvement circuit and the inverter. Therefore, DC-DC conversion is applied to the inductor L1,
Since a part of the current from the rectifier DB directly flows without passing through the two conversion processes of DC-AC conversion, the overall efficiency of the circuit is increased, and the circuit is suitable for a relatively small and small-capacity inverter device. It was a method.

[0006]

In the above conventional example, when the input voltage Vin is considerably higher than the load voltage, when the resistance value of the load is extremely small (at a light load), or when the resonance state of the inverter is low. Under a certain condition such as a weak case, a pause period T occurs in the waveform of the input current Iin as shown in FIG. For this reason, although the circuit configuration is a simple and high-efficiency inverter, there is a limit to the improvement of the input power factor and the reduction of the input current harmonic under certain conditions as described above, and there is still room for improvement. was there. From this, when the output control is performed, the above condition may be satisfied, and it is difficult to perform the output control while maintaining a high input power factor and a low harmonic component of the input current. .

SUMMARY OF THE INVENTION The present invention has been made in view of the foregoing, and an object of the present invention is to improve the input power factor by supplying an input current from an AC power supply through a vibration element and a switching element of an inverter. It is an object of the present invention to reduce an idle period of an input current and reduce a harmonic component of an input current regardless of a controlled condition in an inverter device provided with such a circuit.

[0008]

According to the first aspect of the present invention, there is provided a full-wave rectifier DB for full-wave rectifying an AC power supply Vs, as shown in FIG. A smoothing capacitor C1 connected to a DC output terminal of the full-wave rectifier DB via a diode D3;
First and second transistors Q1 and Q2 connected in series to both ends of the first and second transistors and turned on and off alternately;
Antiparallel diodes D1, D of the transistors Q1, Q2
2, the DC output terminal of the full-wave rectifier DB and the diode D3
And an impedance element (a series circuit of the inductor L2 and the capacitor C4) having one end connected to the connection point of the first and second transistors Q1 and Q2 and the other end of the impedance element. A first inverter element (inductor L1), and a second inverter element (load F and capacitor) connected between a connection point between the DC output terminal of the full-wave rectifier DB and the smoothing capacitor C1 and the other end of the impedance element. C2, C3), the first and second transistors Q1, Q
In order to shorten the idle period of the input current Iin from the AC power supply Vs by lowering the voltage V3 of the DC component cutting capacitor C3 included in one of the first and second inverter elements by controlling the duty 2 Is provided.

According to the second aspect of the present invention, the first and second means are provided as another means for solving the same problem.
Control the switching frequency of the transistors Q1 and Q2 to increase the amplitude of the voltage V2 of the load F included in one of the first and second inverter elements to reduce the idle period of the input current Iin from the AC power supply Vs. It is characterized by comprising control means for shortening.

Further, in the invention according to claim 3,
As another means for solving the same problem, the resonance current of the first and second inverter elements is increased so that the AC power supply V
and a control means for shortening the idle period of the input current Iin from s.

[0011]

The operation of the present invention will be described below with reference to FIG. The circuit of FIG. 1 is substantially the same as the circuit of the conventional example shown in FIG. 20, and a filter circuit including capacitors C5 and C6 and a transformer L3 is inserted between the AC power supply Vs and the full-wave rectifier DB. The only difference is that the load F is not limited to the discharge lamp La. As shown in the drawing, the voltage of the smoothing capacitor C1 is V1, the voltage of the resonance capacitor C2 connected to both ends of the load F is V2, the voltage of the DC component cutting capacitor C3 is V3, and the voltage of the capacitor C4 included in the impedance element is V3. The voltage is set to V4. Also,
The input voltage from the AC power supply Vs is Vin, and the input current is Ii.
n, and the output current of the full-wave rectifier DB is Id.

According to the study of the present inventor, the cause of the suspension of the input current Iin from the AC power supply Vs is that the magnitude relationship between the voltage Vin of the AC power supply Vs and the voltage V of the inverter element (= V3 + V2) is present. found. The waveform of each part when the input current Iin stops is as shown in FIG. | Vin |> V (= V
2 + V3), it was found that the input current Iin flows. Therefore, in the case of the relationship shown in FIG.
In the period T of ≒ 0 V, | Vin | is small and the input current Iin does not flow. Here, it can be seen that in order for the input current Iin to always flow, it is sufficient that a period where | Vin |> V exists even in the period T where Vin ≒ 0 V.

It is sufficient that the voltage relationship is as shown in FIG. In FIG. 3, even near Vin ≒ 0 V, it is always | Vin |> V within one cycle of inverter switching.
, The idle period of the input current Iin is eliminated, the input power factor is high, and the harmonic components of the input current are reduced. As a means for achieving or approaching such a voltage relationship, it is conceivable to lower the voltage V3 of the capacitor C3 or increase the amplitude of the voltage V2 of the capacitor C2. It is effective to increase the duty ratio of the lower transistor Q2 as a means for realizing the above, and it is effective to make the switching frequency close to the resonance frequency of the circuit as a means for realizing the above. Therefore, by taking these measures, the problems of the conventional example can be solved.

[0014]

FIG. 4 is a circuit diagram of a first embodiment of the present invention. This circuit is obtained by adding a duty control circuit K1 having a duty control function for the transistors Q1 and Q2 to the basic configuration of the present invention shown in FIG. Output terminals a, b, and c of the duty control circuit K1 are connected to control terminals a, b, and c of the transistors Q1 and Q2, respectively.
Are turned on and off alternately.

FIGS. 5 and 6 are operation waveform diagrams of the present embodiment. Before the duty control, as shown in FIG.
Since | Vin | <V in the period T near V, the input current pauses. Therefore, the duty ratio of the transistors Q1 and Q2 is changed by the duty control circuit K1,
When the on-time of the lower transistor Q2 is extended, the voltage V3 of the DC component cutting capacitor C3 in the inverter element decreases. For this reason, as shown in FIG.
(= V2 + V3) is shifted downward as compared to before the duty control in FIG. 5, and there is a period where | Vin |> V even when Vin ≒ 0V. Therefore, the pause of the input current is eliminated, and the input current waveform becomes a waveform close to a sine wave.
Therefore, the input power factor is higher than in the conventional example, and the harmonic component of the input current is smaller.

In order to actually perform the above control, | Vi
It is necessary to detect n | and V in advance. For example, as shown in the circuit diagram of FIG. 7, V (= V2 + V3) is detected by a detection circuit J1 connected to a terminal d, and | Vin | is detected by a detection circuit J2 connected to a terminal e. In comparison, the duty control circuit K1 must determine whether the duty ratio needs to be changed. However, the present invention does not specify the means for detecting | Vin | or V, and the gist of the present invention is to control the voltage V3 of the DC component cutting capacitor C3 to eliminate the pause of the input current. is there.

FIG. 8 is a circuit diagram of a second embodiment of the present invention. This circuit is obtained by adding a frequency control circuit K2 instead of the duty control circuit K1 of the embodiment of FIG.
Now, assuming that the switching frequency is considerably higher than the resonance frequency of the circuit, the amplitude of the voltage V2 of the resonance capacitor C2 is small, and | Vin | <V (V) in the period T near Vin ≒ 0V as shown in FIG. = V2 + V3),
Pauses occur in the input current. Therefore, the frequency control circuit K2
When the switching frequency is lowered to approach the resonance frequency of the circuit, the oscillation increases as shown in FIG.
The amplitude of the voltage V2 of the resonance capacitor C2 increases. As a result, there is a period where | Vin |> V exists even when Vin ≒ 0 V. Therefore, the pause of the input current is eliminated, and the input current waveform becomes a waveform close to a sine wave. Therefore, the input power factor is higher and the harmonic component of the input current is smaller than in the conventional example.

What has been described above is a control method in the case where the switching frequency is higher than the resonance frequency and the input current pauses. Conversely, if the switching frequency is lower than the resonance frequency and the input current pauses, the switching frequency may be increased to approach the resonance frequency.

In any case, when the switching frequency is changed to approach the resonance frequency of the inverter circuit, the oscillation of the inverter circuit becomes stronger and the amplitude of the voltage V2 of the resonance capacitor C2 increases, but the inductor L1, the capacitor C4, The oscillation of the resonance system formed by the inductor L2 also increases. When the transistor Q1 turns on, the capacitor C
4, inductor L2, diode D3, transistor Q
1. An oscillating current flows through the path of the inductor L1. Immediately after the transistor Q1 turns on, the capacitor C4
Although it has a voltage in the positive direction of V4, it discharges electric charge through the above-mentioned path, and thereafter is charged in the opposite direction. The voltage charged in the opposite direction is superimposed on the power supply voltage when the transistor Q2 is turned on next, so that the input current easily flows.

FIG. 11 is a circuit diagram of a third embodiment of the present invention. In this embodiment, M is used as the switching element.
OSFET is used. The diodes D1 and D2 are
Since the parasitic diode in the MOSFET can be substituted, it can be omitted. The switching element is not limited to a bipolar transistor or MOSFET,
It may be an electrostatic induction thyristor or another semiconductor element.

This circuit has a configuration in which the inductor L2 in series with the capacitor C4 is removed in FIG. 4 or FIG. Even in this circuit configuration, the cause of the pause in the input current Iin is the same. Therefore, by adding the control circuit K3 for performing the duty control or the frequency control and performing the duty control described in the first embodiment or the frequency control described in the second embodiment, the pause of the input current Iin can be reduced. As a result, the input power factor can be increased, and the harmonics of the input current can be reduced. It goes without saying that both duty control and frequency control may be performed. this is,
The same applies to the first or second embodiment.

FIG. 12 is a circuit diagram of a fourth embodiment of the present invention. This circuit has a configuration in which the capacitor C4 in series with the inductor L2 is removed in FIG. 4 or FIG. Even in this circuit configuration, the cause of the pause in the input current Iin is the same. However, since the impedance element is only the inductor L2, the current does not reverse.
3 may be omitted. In this embodiment as well, a control circuit K3 for performing duty control or frequency control is added, and by performing the duty control described in the first embodiment or the frequency control described in the second embodiment, the input current Iin , The input power factor is high, and the harmonics of the input current can be reduced.

FIG. 13 is a circuit diagram of a fifth embodiment of the present invention. In this circuit, the inductor L2 is omitted and the rectifier D
The load F and the capacitor C2 are connected in parallel to the output terminal of B via the capacitor C4. The DC component cutting capacitor C3 is connected in series with the inductor L1. The waveform of each part is as shown in FIG. in this case,
Since the capacitor C3 is not inserted in series with the load F when viewed from the output terminal of the rectifier DB, | Vin |> V (= V
2) always holds. Nevertheless, as shown in FIG. 14, the pause of the input current Iin occurs. this is,
This is because of the voltage V4 generated in the capacitor C4. When the transistor Q2 is turned on, a current flows through a path passing through the rectifier DB, the capacitor C4, the capacitor C3, the inductor L1, and the transistor Q2, and the voltage V of the capacitor C4.
4 rises. Next, when the transistor Q2 is turned off and the transistor Q1 is turned on, a current flows through a path passing through the capacitor C4, the diode D3, the transistor Q1, the inductor L1, and the capacitor C3, and the electric charge of the capacitor C4 is released. Since C3 has a substantially constant voltage V3 in the direction indicated by the arrow in the figure, V4 ≒
When it reaches V3, the current in this path stops, and thus the capacitor C4 maintains the voltage of V4 ≒ V3. Therefore, in order for the input current Iin to flow, | Vin |> V
The condition 2 + V4 ≒ V2 + V3 is required, which is the same condition as the first embodiment.

As described above, the same means as in the first or second embodiment can be used to eliminate the pause of the input current Iin. As shown in FIG. By adding a control circuit K3 having a function and increasing the on-duty of the lower transistor Q2, the voltage V3 of the capacitor C3 is reduced, or the switching frequency is made closer to the resonance frequency of the circuit to enhance the oscillation. , The amplitude of the voltage V2 of the capacitor C2 is increased to shorten the idle period of the input current Iin. As a result, the input power factor increases, and harmonic components of the input current can be reduced.

FIG. 15 is a circuit diagram of a sixth embodiment of the present invention. This circuit has a configuration in which an inductor L2 is inserted in series with a capacitor C4 in the circuit of FIG. The cause of the pause in the input current Iin is the same as in the embodiment shown in FIG. Therefore, the same effect can be obtained by adding the same means.

FIG. 16 is a circuit diagram of a seventh embodiment of the present invention. In this circuit, the capacitor C4 in series with the inductor L2 is omitted in the first embodiment shown in FIG.
In this example, a parallel circuit of a load F and a capacitor C2 is connected in series with an inductor L1. The waveform of each part is as shown in FIG. From this, it is apparent that the input current Ii
It can be seen that the condition under which n flows is | Vin |> V3. Therefore, in this circuit, the voltage V of the capacitor C3 is
By reducing 3, the idle period of the input current Iin can be shortened. Therefore, a control circuit K1 having a duty control function
Is provided to increase the on-duty ratio of the lower transistor Q2, the voltage V3 of the capacitor C3 decreases, and the idle period of the input current Iin decreases.

FIG. 18 is a circuit diagram of an eighth embodiment of the present invention. In this circuit, the load F is the discharge lamp FL in the first embodiment shown in FIG. Here, assuming that the input voltage Vin is 200V AC, the voltage V1 of the capacitor C1 becomes approximately 282V. Assuming that the duty of the transistors Q1 and Q2 is 50%, the voltage V3 of the capacitor C3
Becomes about 141V. Now, assuming that the load is a low-pressure discharge lamp FL having a low wattage, the lamp voltage at the time of lighting is low, the amplitude of the load voltage V2 is small, and the condition for the input current to flow | Vin |> V3 + V2 Is not satisfied, and a pause occurs in the input current. Therefore, when the duty control circuit K1 controls the on time of the transistor Q2 to be extended, the voltage V3 of the capacitor C3 decreases, and the idle period of the input current is shortened. By appropriately increasing the on-duty of the transistor Q2, it is possible to completely eliminate the pause of the input current. Further, the discharge lamp FL generally has a negative resistance characteristic, and when the duty ratio of the transistors Q1 and Q2 is unbalanced, the lamp current decreases and the lamp voltage increases. This corresponds to an increase in the amplitude of the load voltage V2. In this regard, the pause of the input current can be eliminated. As described above, the input power factor of the inverter-type discharge lamp lighting device can be increased, and the harmonic component of the input current can be reduced.

FIG. 19 is a circuit diagram of a ninth embodiment of the present invention. In this circuit, the load F is the resistor RL in the first embodiment shown in FIG. The resistor RL corresponds to, for example, an incandescent lamp, and in that case, a high-frequency lighting device of the incandescent lamp is configured. In this lighting device, a control circuit K3 having a duty control function and a frequency control function is provided, and the light output can be controlled by changing the switching frequency. When reducing the optical output, the switching frequency is kept away from the resonance frequency. Then
Oscillation is weakened, and the amplitude of the load voltage V2 is reduced. At this time, a pause occurs in the input current Iin. Therefore, when the duty ratio is unbalanced and the on-duty ratio of the transistor Q2 is controlled to increase, the voltage V3 of the capacitor C3 decreases, and the pause of the input current Iin is eliminated. Therefore, it is possible to realize a lighting device having a high input power factor and a low harmonic component of the input current. In the lighting device shown in FIG. 19, when the switching frequency is set higher than the resonance frequency of the circuit and the output control is performed, the switching frequency is increased to reduce the optical output.・ By controlling the duty ratio to be large, the input power factor is always kept high, and the harmonic components of the input current are always kept small.
Light output can be controlled.

In the example described above, if the input voltage | Vin | is higher than the voltage of the element connected to the output terminal of the rectifier DB, the input current Iin flows. And the load voltage V2 is controlled. However, in practice, as long as the voltage relationship as described in the description of the embodiment is satisfied, the pause of the input current is always eliminated, and the means for realizing the voltage relationship is limited to duty control and frequency control. Instead, for example, the following method can be adopted.

(A) A method in which the oscillation value of the resonance system is changed by changing the impedance values of the inverter element and the impedance element, and as a result, control is performed so as to approach the resonance state. Thus, by changing the impedance value of each element, it is possible to satisfy the voltage relationship as described in the embodiment.

(B) A method of increasing the load. That is, by changing the impedance value of the load, the oscillation state of the resonance system is changed, and as a result, control is performed so as to approach the resonance state. By changing the impedance value of the load in this way, it is possible to satisfy the voltage relationship as described in the embodiment.

Although a specific circuit example for controlling the above (a) and (b) is not specifically shown, for example, if means for turning on and off the impedance element by a bidirectional switch is used, Obviously, it can be easily realized.

[0033]

According to the first aspect of the present invention, the AC power supply is full-wave rectified, and the DC voltage obtained by the smoothing capacitor via the diode is converted into the first and second DC and DC voltages provided with the anti-parallel diode.
Switching by a series circuit of
And connecting an impedance element from a connection point of the second switching element to a connection point between the DC output terminal of the full-wave rectifier and the diode via the first inverter element;
In an inverter device in which a second inverter element is connected to a connection point between a DC output terminal of a full-wave rectifier and a smoothing capacitor, the duty of the first and second switching elements is controlled by controlling the duty of the first and second switching elements. Equipped with control means for lowering the voltage of the DC component cutting capacitor included in any of them and shortening the idle period of the input current from the AC power supply, the input power factor is increased, and the harmonics of the input current are increased. There is an effect that wave components can be reduced.

According to the second aspect of the present invention, in the same inverter device as described above, by controlling the switching frequency of the first and second switching elements, the load included in one of the first and second inverter elements is controlled. In addition, in the invention according to the third aspect of the present invention, the resonance current of the first and second inverter elements is reduced by increasing the voltage amplitude of the inverter and reducing the idle period of the input current from the AC power supply. Providing a control means for increasing the input current from the AC power supply to shorten the idle period of the input current has the effect of increasing the input power factor and reducing the harmonic components of the input current.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a basic configuration of the present invention.

FIG. 2 is a waveform chart showing an operation before duty control according to the present invention.

FIG. 3 is a waveform chart showing an operation after duty control of the present invention.

FIG. 4 is a circuit diagram of a first embodiment of the present invention.

FIG. 5 is a waveform chart showing an operation before duty control according to the first embodiment of the present invention.

FIG. 6 is a waveform chart showing an operation after duty control according to the first embodiment of the present invention.

FIG. 7 is a circuit diagram in which a detection circuit is added to the first embodiment of the present invention.

FIG. 8 is a circuit diagram of a second embodiment of the present invention.

FIG. 9 is a waveform chart showing an operation before frequency control according to the second embodiment of the present invention.

FIG. 10 is a waveform chart showing an operation after frequency control according to the second embodiment of the present invention.

FIG. 11 is a circuit diagram of a third embodiment of the present invention.

FIG. 12 is a circuit diagram of a fourth embodiment of the present invention.

FIG. 13 is a circuit diagram of a fifth embodiment of the present invention.

FIG. 14 is a waveform chart showing an operation before the duty control according to the fifth embodiment of the present invention.

FIG. 15 is a circuit diagram of a sixth embodiment of the present invention.

FIG. 16 is a circuit diagram of a seventh embodiment of the present invention.

FIG. 17 is a waveform chart showing an operation before the duty control according to the seventh embodiment of the present invention.

FIG. 18 is a circuit diagram of an eighth embodiment of the present invention.

FIG. 19 is a circuit diagram of a ninth embodiment of the present invention.

FIG. 20 is a circuit diagram of a conventional example.

FIG. 21 is a waveform chart showing the operation of the conventional example.

[Explanation of symbols]

 D1, D2, D3 Diode C1, C2, C3 Capacitor C4, C5, C6 Capacitor Q1, Q2 Transistor L1, L2 Inductor L3 Transformer Vs AC power supply DB Full-wave rectifier F Load

Claims (3)

(57) [Claims] 1. A full-wave rectifier for full-wave rectification of an AC power supply, a smoothing capacitor connected to a DC output terminal of the full-wave rectifier via a diode, and both ends of the smoothing capacitor connected in series and turned on alternately. First and second turned off
, An antiparallel diode of the first and second switching elements, an impedance element having one end connected to a connection point between the DC output terminal of the full-wave rectifier and the diode, and a first and second switching element. A first inverter element connected between the connection point and the other end of the impedance element; a first inverter element connected between the connection point of the DC output terminal of the full-wave rectifier and the smoothing capacitor and the other end of the impedance element; In the inverter device including the second inverter element, by controlling the duty of the first and second switching elements, the voltage of the DC component cutting capacitor included in any of the first and second inverter elements is reduced. An inverter device comprising a control means for reducing the idle period of the input current from the AC power supply by reducing the idle period. 2. A full-wave rectifier for full-wave rectification of an AC power supply, a smoothing capacitor connected to a DC output terminal of the full-wave rectifier via a diode, and both ends of the smoothing capacitor connected in series and turned on alternately. First and second turned off
, An antiparallel diode of the first and second switching elements, an impedance element having one end connected to a connection point between the DC output terminal of the full-wave rectifier and the diode, and a first and second switching element. A first inverter element connected between the connection point and the other end of the impedance element; a first inverter element connected between the connection point of the DC output terminal of the full-wave rectifier and the smoothing capacitor and the other end of the impedance element; In the inverter device including the second inverter element, the first and second switching elements are controlled to control the switching frequency of the first and second switching elements.
And a control unit for increasing a voltage amplitude of a load included in any one of the inverter elements to shorten a pause period of an input current from an AC power supply. 3. A full-wave rectifier for full-wave rectification of an AC power supply, a smoothing capacitor connected via a diode to a DC output terminal of the full-wave rectifier, and both ends of the smoothing capacitor connected in series and turned on alternately. First and second turned off
, An antiparallel diode of the first and second switching elements, an impedance element having one end connected to a connection point between the DC output terminal of the full-wave rectifier and the diode, and a first and second switching element. A first inverter element connected between the connection point and the other end of the impedance element; a first inverter element connected between the connection point of the DC output terminal of the full-wave rectifier and the smoothing capacitor and the other end of the impedance element; An inverter device comprising: a second inverter element; and a control unit for increasing a resonance current of the first and second inverter elements to reduce a pause period of an input current from the AC power supply. Inverter device.