JP3140798B2 - Communication traffic control method between processors - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a communication traffic control method between processors in a multiprocessor system in which a plurality of processors are connected by a plurality of bus-type or ring-type communication buses.

[0002]

2. Description of the Related Art In a multiprocessor system in which a plurality of processors are connected by a plurality of bus-type or ring-type communication buses, one communication bus is used as an active communication path (communication path) and the other is used as a communication path. 2. Description of the Related Art There is known a method of transmitting and receiving communication data on an active communication path by using the standby communication path (communication path).

[0003] Which communication bus is used as an active communication path between the processors is determined at the time of system initialization.

[0004] Thereafter, unless the active communication path is switched due to a failure of the active communication path or the input of a maintenance command, the active communication path determined at the time of initial setting is used. In addition, the working communication path is switched for each processor individually.

[0005]

For this reason, the working communication path for inter-processor communication concentrates on a certain communication bus, and the communication speed tends to decrease due to the concentration of communication traffic, and the working communication path on the other communication bus. A situation can occur where there is no communication path and the communication bus is disabled. That is, the efficiency of the inter-processor communication may be reduced.

For example, FIG. In 19, each processor uses only the ring bus # 0 as an active communication path and uses the ring bus # 1 as a standby communication path for communication between other processors. In this state, communication traffic between processors concentrates only on the ring bus # 0, and the ring bus # 1
No communication data flows between processors and ring bus #
1 is not used effectively.

According to the present invention, a system automatically monitors the number of active communication paths between processors on each communication bus and changes the number of communication paths as necessary, thereby efficiently using the communication bus and improving communication efficiency between processors. With the goal.

[0008]

According to the present invention, as shown in the principle diagram of FIG. 1, a plurality of processors (A, B, C) and a communication for interconnecting these processors (A, B, C) are provided. In a multiprocessor system having a plurality of buses (# 0, # 1) and performing communication between arbitrary processors via arbitrary communication paths on the plurality of communication buses (# 0, # 1),
An inter-processor communication traffic control method having the following configuration was adopted.

Each of the processors (A, B, C) includes a communication path selecting means 14 for selecting an arbitrary communication path from among the communication paths with the communication destination processor as an active communication path and the other as a standby communication path. And a communication path state storage means 16 for registering the state of the communication path, and a communication path switching means 18 for switching the working communication path.

The specific processor (A) among them is
A channel state monitoring unit 20 for indexing the channel state storage unit 16 and monitoring at least the number of working channels on the communication buses (# 0, # 1). The communication path switching means 18 is provided with a communication path number averaging means 21 for instructing the communication path switching means 18 to switch between the working communication path and the standby communication path when the number becomes equal to or more than a specified value.

[0011]

As shown in the principle diagram of FIG. 1, in the operation of the multiprocessor system according to the present invention, the communication path selecting means first sets a communication path on an arbitrary communication bus as an active communication path as an initial setting. The selected communication bus is selected as a standby communication path, and communication between the processors is performed via the communication path set as the working communication path.

Here, each of the processors (A, B, C)
In addition, a communication path availability determining means 12 for identifying an available communication path for each communication destination processor may be provided, and an active communication path and a standby communication path may be selected from the available communication paths. .

Next, the processor having the communication path state storage means 16 stores the communication path on which communication bus as the working communication path and the communication path on which communication bus between the other processors. Whether the path is used as a standby communication path is stored.

The communication path state storage means 16 is, for example, an inter-processor communication state management table. The communication path state storage means 16 is provided for each processor and can communicate with one or more communication partner processors which can be communication partners via any communication path. Is stored. That is, the active communication path and the standby communication path are registered for the communication destination processor.

The communication path switching means 18 converts the working communication path into a standby communication path and the waiting communication path into a working communication path.

The channel state monitoring means 20 provided in the specific processor (A) for averaging the traffic on the channel is provided by:
The number of active communication paths on the communication bus is monitored by indexing the communication path state storage means 16. Monitoring can be performed arbitrarily, periodically, or continuously. Then, when the number of communication paths becomes equal to or more than a specified value, the communication path number averaging means 21 instructs the communication path switching means 18 to switch between the working communication path and the standby communication path. This directive is also optional,
Alternatively, it can be performed by periodically inputting a command.

The averaging process is sequentially performed for each processor. When selecting the next processor to perform the averaging process, the processor having the most unbalanced number of active communication paths after the averaging is selected. It is preferable to proceed.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below with reference to the drawings. This example is a method of periodically averaging the number of working communication paths on each ring bus.

As shown in FIG. 2, a plurality of processors (A) are provided by a duplicated ring bus (# 0, # 1).
A multiprocessor system is configured by interconnecting (B) and (C). In the figure, three processors (A), (B), and (C) are connected via a ring bus adapter 10 to a ring bus # 0 and
Are connected to the ring bus # 1 respectively.

In this system, each of the processors (A), (B), and (C) includes, as shown in FIG. 3, a communication path availability identifying means 12, a communication path selecting means 14, a communication path state storage means 16, a communication path A switching unit 18 is provided, and a specific processor (A) (master processor) (A) includes a communication channel state monitoring unit 20 and a communication channel number averaging unit 21. Hereinafter, each configuration will be described in detail. (1) Communication path availability identification means The communication path availability identification means 12 identifies an available communication path for each communication destination processor. The communication path availability discriminating means 12 monitors the access route of the communication bus and the ring bus adapter 10 provided on the ring bus, and determines the access route of each communication bus and the state of the ring bus adapter 10 at the time of initializing the processor. Then, the availability of communication paths (communication paths) between the processors is determined. (2) The communication path selecting means 14 uses which communication path among the available communication paths as the working communication path and which communication path as the standby communication path between the processor and another processor. Is selected. Which communication path is used as the working communication path is determined by exchanging the working communication path instruction order and the confirmation order between the partner processors. (3) Communication Channel State Storage Unit When the communication channel selection unit 14 selects the working communication channel and the standby communication channel, the distinction is registered in the communication channel state storage unit 16.

The communication path state storage means 16 is constructed as a management table in the storage device. As shown in FIG. 4, for each communication partner processor, it is possible to distinguish between working, standby, and communication disabled via the ring bus # 0. A distinction between active, standby, and communication disabled via the ring bus # 1 is registered.

FIG. 5 shows an inter-processor communication path state management table in the processor A in FIG. here,
The management state of the communication state between processors for the processors B and C is registered.

From this management table, each processor can confirm which communication path is used as an active communication path with another processor and which communication path is used as a standby communication path. (4) Communication path switching means The working communication path switching means 18 of each processor switches the working communication path with another processor according to the following procedure. When there is a need to switch the working channel, when the communication channel is offset to one ring bus and is not averaged over the entire bus, when the working bus fails, the system is initialized. Sometimes.

The processor that needs to switch the working communication path sends out a working communication path switching instruction order to the processor that needs to switch the working communication path. FIG. 7 shows the format of the active communication switching instruction order. This format includes a preamble (PA) for synchronizing from the beginning, a start delimiter (SD) indicating a signal start position, a frame control (FC) indicating a frame type and operation content, and a destination ring bus adapter number (D).
A), source ring bus adapter number (SA), destination processor number (DPA), source processor number (S
PA), a data part, a frame check sequence (FCS) for checking the normality of frame data, and an end delimiter (E) for displaying the end position of the data frame.
D), a frame state (FS) for displaying the transmission result of the data frame is stored. And in the data section,
As shown in FIG. 8, an active communication path switching instruction display, an active communication path switching cause, and a ring bus number to be used next are stored.

The processor that has received the working channel instruction order refers to the inter-processor communication path state management table, checks whether the standby communication path with the processor that has sent the working channel instruction order is usable or not, and determines whether or not the switching is possible. It is returned in the current communication path switching confirmation order.

The format of the working channel switching confirmation order is the same as that of FIG. 7, and the data section stores the working channel switching confirmation display and the working channel switching result as shown in FIG.

The above operation will be described with reference to the switching processing flow of FIG. First, an active communication path switching factor is detected from one processor (step 100). The switching factor is a system initial setting, a failure of the working communication path, or the like. Next, it is determined whether or not there is a standby communication path corresponding to the active communication path requiring switching (step 10).
1). Here, if the standby communication path does not exist, the switching is rejected (step 102), and if the standby communication path exists, the active communication path switching instruction order is transmitted (step 103).

The other processor receives the communication channel switching instruction order (step 104), and determines whether or not there is a standby communication channel corresponding to the active communication channel requiring switching (step 105). If the standby communication path does not exist, the rejection of the switching is edited to the confirmation order (step 106), and if the standby communication path exists, the acceptance of the active communication path switching is edited to the confirmation order (step 10).
7) Then, the confirmation order is sent to the one processor (step 108).

After transmitting the communication path switching order, one processor waits for a confirmation order (step 1).
09) If there is no switching confirmation order within a certain time,
The processing ends as a failure in switching the current communication path (step 110). Then, when the switching confirmation order is received (step 111), it is determined whether the switching of the partner processor has been completed (step 112). If the switching is defective, the processing ends as it is (step 113). The processing ends as the current communication path switching is OK (step 114). (5) Communication path state monitoring means In a multiprocessor system, a processor that manages and maintains the entire system is called a master processor. The communication path condition monitoring means 20 is provided in the master processor, here, the processor of FIG. The communication path state monitoring means 20 indexes the management table,
The number of working communication paths between the processors as viewed from the specific processor (A) is monitored.

The procedure for monitoring the state of the communication path between the processors will be described below. As shown in FIG.
It has a channel state request signal sending section 22 and a channel state response signal receiving section 24. First, the channel state request signal sending section 22 of the processor (A) checks with the processor (B) which processor (B) and another processor are using which communication path as the working communication path. , A communication channel state request signal to the processor (B).

Next, the processor (B) that has received the channel state request signal edits the channel state response signal and returns it to the processor (A). The communication path state response signal includes information indicating which communication path is used by the processor (B) and the other processor as the working communication path, the number of working communication paths on the communication bus between the processors, the number of standby communication paths, and faults. Alternatively, the number of communication paths that are unavailable for maintenance is included.

FIG. 10 shows the format of the channel state request signal. This format includes a preamble (PA) for synchronizing from the beginning, a start delimiter (SD) indicating a signal start position, a frame control (FC) indicating a frame type and an operation content, and a destination ring bus adapter number (DA). , Source ring bus adapter number (SA),
A destination processor number (DPA), a source processor number (SPA), a data part, a frame check sequence (FCS) for checking the normality of frame data, and an end delimiter (E) for displaying an end position of a data frame.
D), a frame state (FS) for displaying the transmission result of the data frame is stored. And in the data section,
As shown in FIG. 11, the communication path state request signal identifier is stored.

On the other hand, FIG. 12 shows a format of a communication path status response order. This format is shown in FIG.
Is the same as the format of the channel status request signal of
As shown in FIG. 13, the data part stores a communication path state response order identifier and the number of communication paths as response data.
The number of unavailable communication paths, the number of standby buses, and the number of active buses for each bus are stored. Further, the number of connected processors and the communication partner processor number are stored. (6) Channel Number Averaging Unit The master processor is provided with a channel number averaging unit 21 as shown in FIG. In this method, the number of active communication paths on each communication bus is averaged by periodically activating the following active communication path switching processing.

The channel state monitoring means 20 of the master processor requests each processor (including the master processor itself) constituting the system to display the channel state by indexing the management table of each processor.

The communication path number averaging means 21 of the master processor instructs the communication path switching means 18 of the processor which should switch the working communication path for each processor to switch the working communication path in each processor.

FIG. 14 shows the format of the active communication channel switching request at this time. This format includes a preamble (PA) for synchronizing from the beginning, a start delimiter (SD) indicating a signal start position, a frame control (FC) indicating a frame type and an operation content, and a destination ring bus adapter number (DA). , Source ring bus adapter number (SA), destination processor number (DPA), source processor number (SPA), data part, frame check sequence (FCS) for normality check of frame data, end position of data frame Are stored, and an end delimiter (ED) for displaying the data frame and a frame state (FS) for displaying the transmission result of the data frame are stored. Then, as shown in FIG. 15, the data section stores the communication path switching request order identifier, the communication path switching request number, the switching target working communication path identifier = the working communication path connection partner processor number.

The communication path switching unit 18 of the processor instructed to switch the working communication path switches the working communication path instructed, and notifies the master processor of the completion of the switching.

FIG. 16 shows the format of the communication path switching end notification. This format is the same as in FIG. Here, as shown in FIG. 17, the communication path switching end notification order identifier is stored in the data portion.

The master processor that has received the switching completion notification requests a new communication channel state from the processor that has received the switching completion notification.

The communication channel switching command by the communication channel number averaging means 21 is sequentially sent to each processor. Then, the master processor that has received the new communication path state counts the number of working communication paths on the inter-processor communication bus among the inter-processor communication paths for which the switching process has been completed, by the communication state monitoring means. In response to the calculation result, the communication path number averaging means 21 of the master processor instructs the next processor to specify the partner processor to switch the current communication path to, so that the number of the current communication paths on each communication bus is averaged. . Hereinafter, the processing from the end of the processing in all the processors is repeated.

A specific example of the averaging process will be described below. 1) The master processor is MPR (CPRO), and the other processors are CPRi (i is an integer of i> = 1 and the maximum value is n).

The MPR activates the active communication path switching processing (processing from the following 2) for each processor in the following order.

MPR → CPR1 → CPR2 →... → CPRi →... → CPRn The MPR requests the processor channel state to CPRj (j = 0, 1,... N). 2) The MPR determines the working communication path to be switched to CPRj as follows.

The communication paths to be switched with respect to CPRj are the communication paths of CPRj and CPRk (k> j), and none of the communication paths on the ring bus # 0 or the ring bus # 1 cannot be used. thing.

Let a be the number of target communication paths. Among the communication paths for which switching has already been completed, the numbers of the working communication paths on the ring bus # 0 and the number of the working communication paths on the ring bus # 1 are b and c, respectively.

Assuming that the number of working communication paths to be switched over to the ring bus # 0 and the number of working communication paths to be switched over to the ring bus # 1 are x and y, respectively, of the a communication paths, x and y Can be determined as follows. (Note: The case where the working communication path on the ring bus # 0 is used as it is as the working communication path is counted as the switching of the working communication path to the ring bus # 0. The same applies to the ring bus # 1.) Here, b ≧ Assume c. (When b <c, the following b and c and x and y may be interchanged.) When b> a + c x = a, y = 0 B. When b ≦ a + c i) a + b + c = even number x = (a + c−b) / 2, y = (a + bc) / 2 ii) a + b + c = odd number x = (a + c−b−1) / 2 y = (a + b−c + 1) / 2 or x = (a + c−b + 1) / 2, y = (a + b−c−1) / 2 Example) Here, a plurality of processors, CPR1, 2, 3,
A more specific description will be given of a method of switching a communication path between processors in CPR2 in a multi-system composed of 4, 5, 6, 7, 8, 9, and MPR. When the communication path switching between processors is performed in CPR2, the switching has been completed in the communication paths in MPR and CPR1. Therefore, 9 (the number of communication paths of MPR and all CPRs) +8 (the number of communication paths of CPR1 and other CPRs) = 17 switching of communication paths has been completed. Here, it is assumed that the number of active communication paths on ring # 0 = 9, the number of active communication paths on ring # 1 = 8, and the state of the communication path of CPR2CPRi (i> 2) is as follows. Ring # 0 Ring # 1 CPR2-CPR3 communication path = standby working CPR2-CPR4 communication path = standby working CPR2-CPR5 communication path = standby working CPR2-CPR6 communication path = standby working CPR2-CPR7 communication path = working Standby Channel between CPR2 and CPR8 = Working Standby Channel between CPR2 and CPR9 = Working Standby In this case, seven switching target communication paths in CPR2 are the number of working communication paths to be placed on ring # 0 by switching in CPR2. = 3 Number of active communication paths to be placed on ring # 1 in switching by CPR2 = 4 The switching processing procedure in CPR2 under the above conditions is shown below. Method 1: A method of processing either of the rings first CPR2-CPR3 communication path = Place a working communication path on ring # 0 CPR2-CPR4 communication path = Place a working communication path on ring # 0 CPR2 -A communication path between CPR5 = a working communication path on ring # 0 A communication path between CPR2 and CPR6 = a working communication path on ring # 1 A communication path between CPR2 and CPR7 = working communication path on ring # 1 The communication path between CPR2 and CPR8 = the working communication path is put on the ring # 1 The communication path between CPR2 and CPR9 = the working communication path is put on the ring # 1 Method 2: Alternating the rings # 0 and 1 Method of processing CPR2-CPR3 communication path = Working communication path on ring # 0 CPR2-CPR4 communication path = Working communication path on ring # 1 CPR2-CPR5 communication path = R CPR2-CPR8: A working channel is placed on the ring # 1 A working channel is placed on the ring # 1 A working channel is placed on the ring # 1 A working channel is placed on the ring # 0 CPR2-CPR8 Inter-communication path = put the working communication path on ring # 1 CPR2-CPR9 communication path = put the working communication path on ring # 1 3) CPRj switches the working communication path specified by MPR in 2) And notifies the MPR of the end of the switching. 4) Upon receiving the switching completion notification, the MPR requests a new communication channel state to CPRj. The number of active communication paths on the ring bus # 0 = b according to the state of the new communication path to be switched,
The number of active communication paths on the ring bus # 1 = c is updated, and the CP
The processing from 2) is performed on Rj + 1. (7) Modifications and Application Examples of the Invention The present invention is also applicable when the form of a communication bus connecting processors is a bus type. FIG. 18 shows a configuration diagram of a multiprocessor system connected by a bus-type communication bus. What
The above communication path may be provided between all processors.
Between the processors that communicate with a particular processor.
May be provided. A place to restrict between specific processors
In this case, the processing of the above 2) to 4) is performed by a specific processor C
What is necessary is just to stop at PRj.

[0047]

According to the present invention, in a multiprocessor system, the system automatically averages the number of active communication paths between processors on each communication bus, whereby
The communication bus can be used efficiently, and the communication efficiency between processors can be improved.

[Brief description of the drawings]

FIG. 1 is a principle diagram of the present invention.

FIG. 2 is a configuration diagram of a multiprocessor system connected by a ring bus.

FIG. 3 is a configuration diagram showing an embodiment of the present invention.

FIG. 4 is a diagram showing a communication path state management table between processors.

FIG. 5 is a diagram showing a management table in a processor A in FIG. 19;

FIG. 6 is a flowchart of an active communication path switching process.

FIG. 7 is a diagram showing an order format of a working communication path switching instruction.

FIG. 8 is a format diagram of a working communication channel switching instruction order / data part.

FIG. 9 is a format diagram of an order / data part of an active communication path switching confirmation

FIG. 10 is a format diagram of a communication channel status request order.

FIG. 11 is a format diagram of a communication path status request order / data part.

FIG. 12 is a communication path status response order format diagram.

FIG. 13 is a format diagram of a communication path status response order data section.

FIG. 14 is a format diagram of a communication channel switching request order.

FIG. 15 is a format diagram of a communication path switching request order / data part.

FIG. 16 is a format diagram of a communication channel switching end notification order format.

FIG. 17 is a format diagram of an order / data part of a communication path switching end notification.

FIG. 18 is a configuration diagram of a bus-type multiprocessor system to which the present invention can be applied.

FIG. 19 is an explanatory diagram of a problem of the related art.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Ring bus adapter 12 Communication path availability discrimination means 14 Communication path selection means 16 Communication path state storage means 18 Communication path switching means 20 Communication path state monitoring means 21 Communication path number averaging means 22 Communication path state request signal sending section 24 Communication Road condition response signal receiving section # 0, # 1 Communication bus A, B, C processor

Claims (5)

(57) [Claims] 1. A plurality of processors and these processors
Arbitrary processor having a plurality of communication buses for interconnecting
Communication between any two or more communication buses via any communication path
A multi-processor system, wherein each of the processors comprises: a communication path selecting means for selecting an arbitrary communication path from among communication paths with a communication destination processor as an active communication path and selecting the other as a standby communication path; and channel state memory means for registering the state, and a communication path switching means for switching the working channel, the particular processor of said processor, each process
And channel state monitoring means Tsu to index the channel state memory means Sa for monitoring the number of current channel on each communication bus, the switching of the working channel and the standby channel to the communication path switching means Communication path number averaging means for instructing the number of active communication paths on each communication bus to instruct the number of active communication paths on each communication bus. 2. The communication apparatus according to claim 1, wherein each of the processors includes a communication path availability determining unit that identifies a communication path that can be used for each communication destination processor. 2. The inter-processor communication traffic control method according to claim 1, wherein the communication path is selected as an active communication path and the other communication paths are selected as standby communication paths. 3. The communication path state storage means is an inter-processor communication state management table, and registers an active communication path and a standby communication path corresponding to a communication destination processor for each processor. Inter-processor communication traffic control method. 4. The communication path state monitoring means has a communication path state request signal sending section and a communication path state response signal receiving section, and the communication path state request signal sending section sends a communication path state request to another processor. While transmitting the signal, the other processor receiving the request signal searches its own communication path state storage means, edits the number of working communication paths into a communication path state response signal, and sends it to the communication state response signal receiving section. 2. The inter-processor communication traffic control method according to claim 1, wherein the communication traffic is returned. 5. A communication path switching command by said communication path number averaging means is sequentially sent to each processor, and a specific processor receives a new communication path state from the communication path state storage means of the processor which has completed the switching processing. At this time, the communication path state monitoring means counts the number of working communication paths on the communication bus between the processors among the inter-processor communication paths for which the switching process has already been completed, and the communication path number averaging means performs the calculation. 2. The communication between processors according to claim 1, wherein receiving the result, instructing a next processor to switch the working communication path to the next processor so that the number of working communication paths on each communication bus is averaged. Traffic control method.