JP3116487B2 - Method for manufacturing semiconductor epitaxial substrate - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor epitaxial substrate.

[0002]

2. Description of the Related Art Many silicon semiconductor devices are formed on a single crystal silicon substrate or in a silicon epitaxial layer epitaxially grown on a single crystal silicon substrate or another substrate.
Among them, the features of the semiconductor device formed on the silicon epitaxial layer are as follows: (1) Since a device active layer having a resistivity different from that of the substrate can be formed on the silicon epitaxial layer, the degree of freedom in device design is large. Become. (2) Since a single crystal thin film of a material different from the material of the substrate can be formed, a so-called new function device such as a high-speed switching device can be formed. There are advantages such as. The features of the silicon epitaxial layer are as follows: (1) A high-purity single crystal thin film having a low oxygen (O) concentration or a low carbon (C) concentration can be formed to an arbitrary thickness. (2) It is possible to easily cope with an increase in the diameter of a substrate (for example, a wafer). There are advantages such as. For this reason, at present, high breakdown voltage transistors, bipolar transistors and the like are formed in the silicon epitaxial layer.

The silicon epitaxial layer is mostly formed by a chemical vapor deposition method using a reduction method or a thermal decomposition method. Next, as an example of a method for forming a silicon epitaxial layer, an epitaxial growth method by a reduction method will be described with reference to FIG.

In FIG. 1, silane trichloride (SiH) is used as a reaction gas.
A silicon epitaxial growth method by a reduction method using Cl ₃ ) and hydrogen (H ₂ ) will be described. As shown in the figure,
First, a cleaning process 71 is performed. In this cleaning process 71, the surface of a silicon substrate (for example, a silicon wafer) is cleaned by, for example, RCA cleaning. Next, the cleaned silicon substrate is mounted in a reaction chamber (hereinafter, referred to as a reaction chamber) of the epitaxial growth apparatus. Subsequently, a gas replacement process 72 in the reaction chamber is performed. In the gas replacement process 72, first, the air in the reaction chamber is replaced with nitrogen (N ₂ ) gas, and then further replaced with a hydrogen (H ₂ ) atmosphere.

Next, the silicon substrate and the susceptor on which the silicon substrate is mounted are heated. Then, in order to make the temperature of the susceptor uniform, pre-bake (for example, susceptor
(Hold at a temperature of 00 ° C to 900 ° C for 5 minutes to 10 minutes) 7
Perform Step 3. Thereafter, the silicon substrate is heated to a temperature at which hydrogen annealing is performed. Then, hydrogen annealing 74 is performed to reduce the natural oxide film on the surface of the silicon substrate by reducing it with hydrogen. The processing conditions at this time include, for example, heating the temperature of the silicon substrate to 900 ° C. to 1150 ° C. and setting the processing time to 1
Set to 0 minutes. Further, light etching 75 is performed.
In this light etching 75, a hydrogen chloride (HCl) gas is supplied into the reaction chamber, and for example, the surface of the silicon substrate is removed by about 1 μm. This light etching 75
Thereby, the surface of the silicon substrate becomes a clean surface.

Thereafter, a purge 76 is performed. This purge 7
In step 6, the hydrogen gas in the reaction chamber is exhausted, and the hydrogen gas is introduced again.
Bring to 0 ° C. Subsequently, silane trichloride (SiHC)
l ₃ ) and hydrogen (H ₂ ). Next, epitaxial growth 77 is performed. In this epitaxial growth 77, a silicon epitaxial layer is formed on the surface of the silicon substrate. When the silicon epitaxial layer has a predetermined thickness (for example, the thickness is 8 μm), the supply of the source gas is stopped, and hydrogen gas replacement 78 for supplying hydrogen gas into the reaction chamber is performed. Thereafter, a cooling process 79 for naturally cooling the reaction chamber is performed. This cooling process 79
Then, when the substrate temperature reaches about 200 ° C., the gas in the reaction chamber is replaced with nitrogen gas. Then, after the temperature of the reaction chamber reaches room temperature, the reaction chamber is opened to the atmosphere, and the silicon substrate on which the silicon epitaxial layer is formed is taken out.

[0007] The silicon epitaxial layer formed by the above-mentioned epitaxial growth method has a lower oxygen concentration and a higher carbon concentration and a higher breakdown voltage of a silicon oxide film than a single crystal silicon substrate formed by the Czochralski (hereinafter referred to as CZ) method. It has been reported. However, when a MOS capacitor is formed on a silicon epitaxial layer, generation of a MOS capacitor (generatio
n) The lifetime τ is short. The cause of the short generation lifetime τ is that during the epitaxial growth, a trace amount of metal impurities contained in the source gas is mixed into the growing epitaxial layer, or the metal impurity generated from the epitaxial growth apparatus is the growing epitaxial layer. Causes such as contamination in the inside have been reported.

Therefore, a single-crystal silicon substrate formed by the CZ method and an MCZ (Magnetic-field) are used.
A single crystal silicon substrate formed by an Applied CZ method is subjected to hydrogen annealing using an epitaxial growth apparatus on each silicon substrate, and then a thermal oxide film is formed on a surface layer of each silicon substrate. The metal impurities in each thermal oxide film were measured when a thermal oxide film was formed on the surface layer of each silicon substrate without performing the same. The measurement was performed by a hydrogen fluoride gas phase decomposition method and an atomic absorption analysis method. As a result, when hydrogen annealing is performed, metal impurities [for example, iron (Fe), chromium (Cr), aluminum (Al), and sodium (Na)] in the thermal oxide film are higher than when hydrogen annealing is not performed.
Etc.] are reported to increase. Therefore, it is presumed that the generation lifetime τ of the semiconductor element is shortened due to metal impurities in the silicon epitaxial layer penetrating into the thermal oxide film or the inside of the silicon substrate. [Extended Abstracts of the 18
th (1986) International Conference on Solid St
ate Devices and Materials (Japan), (1986) Ma
tsusita, Wakatsuki, Saito, p.529-532]

Therefore, gettering is usually performed to remove impurities from the semiconductor element formation region of the silicon epitaxial layer. Gettering includes extrinsic gettering (hereinafter abbreviated as EG) and intrinsic gettering (hereinafter abbreviated as IG). For the gettering of the silicon epitaxial layer, EG for forming a polycrystalline silicon film on the back surface of the silicon substrate or IG for forming a getter sink on the silicon substrate before forming the silicon epitaxial layer is performed.

[0010]

However, as described in the prior art, even if gettering is performed,
The generation lifetime of the S capacitor is shorter than the generation lifetime of the MOS capacitor provided on the silicon substrate formed by the CZ method or the MCZ method.

An object of the present invention is to provide a method for manufacturing an epitaxial substrate having an excellent generation lifetime τ.

[0012]

SUMMARY OF THE INVENTION The present invention is a method for achieving the above object. That is, in the first step, the substrate is heated, and in the second step, the temperature of the substrate is adjusted to the epitaxial growth temperature, and then a semiconductor epitaxial layer is formed on the substrate. The epitaxial growth process of cooling the substrate thus cooled to a temperature equal to or lower than エ ピ タ キ シ ャ ル of the epitaxial growth temperature is repeated a plurality of times. Alternatively, when the epitaxial growth process is repeated a plurality of times, a cleaning process for cleaning the substrate together with the formed semiconductor epitaxial layer is performed before the second and subsequent epitaxial growth processes.

[0013]

In the method of manufacturing a semiconductor epitaxial substrate, a plurality of semiconductor epitaxial layers are formed by repeating the epitaxial growth process a plurality of times. For this reason, the minute defects remaining at the interface between the semiconductor epitaxial layers getter impurities introduced in the second and subsequent epitaxial growth processes.
Further, since the epitaxial growth process is repeated a plurality of times, the heat treatment time of the substrate becomes longer. Therefore, an effect equivalent to that of intrinsic gettering is produced, and the precipitation of oxygen contained in the substrate is accelerated. Further, by performing a cleaning process between the epitaxial growth process and the next epitaxial growth process, impurities segregated near the surface of the lower epitaxial layer can be removed, and the surface of the semiconductor epitaxial layer to be subjected to the next epitaxial growth process is cleaned. Therefore, impurities hardly enter the semiconductor epitaxial layer deposited in the second and subsequent epitaxial growth processes.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the present invention will be described with reference to a manufacturing sequence diagram shown in FIG. In the figure, a silicon epitaxial growth method by a reduction method using silane trichloride (SiHCl ₃ ) and hydrogen (H ₂ ) as a reaction gas will be described as an example. As shown in the figure, a cleaning process 11 for cleaning the surface of a substrate (for example, a silicon wafer) is performed. In the cleaning process 11, for example, cleaning with a mixed solution of ammonia water and hydrogen peroxide solution (NH ₄ OH + H ₂ O ₂ + H ₂ O) is performed in order to remove foreign substances and organic substances adhering to the substrate surface. After the cleaning, cleaning with a mixed solution of hydrochloric acid and hydrogen peroxide solution (HCl + H ₂ O ₂ + H ₂ O) is performed in order to remove metals, metal compounds and the like attached to the substrate surface. Or after washing with a mixed solution of hydrochloric acid and hydrogen peroxide solution,
Cleaning may be performed with a mixed solution of ammonia water and hydrogen peroxide solution. The cleaning process 11 is not limited to the above-described cleaning method as long as it is a cleaning method for removing foreign substances, reaction products, and the like, metals, metal compounds, and the like attached to the substrate surface. For example, nitric acid, a mixed solution of nitric acid and hydrofluoric acid,
A cleaning method using a mixed solution of sulfuric acid and aqueous hydrogen peroxide, an aqueous solution of hydrofluoric acid, hydrochloric acid, or the like can be used alone or in an appropriate combination. Next, the cleaned substrate is mounted in an epitaxial reaction chamber (hereinafter, referred to as a reaction chamber).

Subsequently, a heating step 1 is performed as a first step. In the heating step 1, first, a gas replacement process 12 is performed in which the air in the reaction chamber is replaced with a nitrogen (N ₂ ) atmosphere, and the reaction chamber is replaced with a hydrogen (H ₂ ) atmosphere. Next, the temperature in the reaction chamber is heated to 700 ° C to 900 ° C,
A pre-bake 13 is performed to hold the heating state for, for example, 5 to 10 minutes. The pre-bake 13 makes the temperature of the substrate and the susceptor on which the substrate is mounted uniform. Thereafter, the substrate is further heated and subjected to hydrogen annealing 14, whereby the natural oxide film formed on the surface of the substrate is reduced and removed with hydrogen. The processing conditions of the hydrogen annealing 14 at this time include, for example, heating the substrate temperature to 1150 ° C. and setting the processing time to 10 minutes. Further, light etching 15 is performed. In this light etching 15, a hydrogen chloride (HCl) gas is supplied into the reaction chamber, and the surface of the substrate is, for example, 1%.
It is removed by a depth of about μm. By the hydrogen annealing 14 and the light etching 15, the surface of the substrate becomes a clean surface.

When the temperature of the susceptor on which the substrate is mounted is made uniform, the pre-bake 13 need not be performed.
If the surface of the substrate on which the semiconductor epitaxial layer is formed is clean, only one of the hydrogen annealing 14 and the light etching 15 may be performed.
Further, if the surface of the substrate on which the semiconductor epitaxial layer is formed by the cleaning process is sufficiently clean, it is not necessary to perform the hydrogen annealing 14 and the light etching 15.

Thereafter, as a second step, an epitaxial growth step 2 is performed. In this step, first, the purge 16 is performed. In the purge 16, the hydrogen gas in the reaction chamber is exhausted, and then the hydrogen gas is introduced again. Then, the temperature in the reaction chamber is adjusted to 1100 ° C. Subsequently, the inside of the reaction chamber is replaced with a source gas atmosphere composed of silane trichloride (SiHCl ₃ ) and hydrogen (H ₂ ). Then, semiconductor epitaxial growth 17 is performed to form a semiconductor (silicon) epitaxial layer on the surface of the substrate. When the semiconductor epitaxial layer has a predetermined thickness (for example, the thickness is 4 μm),
The supply of the source gas is stopped.

Next, a cooling step 3 is performed as a third step. In this step, first, a gas replacement process 18 for replacing the raw material gas atmosphere with a hydrogen gas atmosphere in the reaction chamber is performed. Thereafter, a cooling process 19 in the reaction chamber is performed. This cooling process 19
Then, the substrate temperature is about 1 /
Natural cooling is performed until the temperature becomes 2 or less (for example, 20 ° C.). Desirably, natural cooling is performed to a temperature at which the cooling temperature becomes 0 ° C. or more and 100 ° C. or less.

Then, after the temperature of the substrate reaches 20 ° C.,
The reaction chamber is evacuated to a higher vacuum than the hydrogen gas atmosphere. Next, the epitaxial growth process 4 (5) including the heating step 1 of the first step to the cooling step 3 of the third step described above is repeatedly performed, for example, twice so that a predetermined film thickness (for example, A semiconductor epitaxial layer having a thickness of 8 μm) is formed. The number of repetitions of the epitaxial growth process 4 may be three or more.

In the above-mentioned epitaxial growth method, when the next epitaxial growth process 5 (4) is performed, the gas in the reaction chamber must be completely replaced with a new source gas. However, if the gas in the reaction chamber cannot be completely replaced with a new source gas due to the epitaxial growth apparatus, the substrate on which the semiconductor epitaxial layer has been formed is taken out of the reaction chamber before the repetitive epitaxial growth process 5 is performed. Clean the room.
At this time, the surface of the semiconductor epitaxial layer on the substrate is contaminated by the air or a natural oxide film is formed. Therefore, the substrate is cleaned by the same cleaning process as the cleaning process 11, and then mounted again in the reaction chamber. Thereafter, the epitaxial growth process 5 is performed.

In the first embodiment, since a plurality of semiconductor epitaxial layers are formed, minute defects remaining at the interface between the semiconductor epitaxial layers are removed by metal impurities introduced in the second and subsequent epitaxial growth processes. Gettering. Further, since the epitaxial growth process is repeated a plurality of times, the heat treatment time of the substrate becomes longer. Therefore, an effect equivalent to that of intrinsic gettering is produced, and the precipitation of oxygen contained in the substrate is accelerated.

Next, the epitaxial growth process described in the first embodiment is performed to form a silicon epitaxial growth layer (N type) having a thickness of 4 μm, and then the epitaxial growth process is repeated to further increase the thickness to 4 μm. Thick silicon epitaxial growth layer (N-type)
To form a silicon epitaxial growth layer (N-type, sheet resistance of 10 Ωcm to 2 Ω) having a thickness of 8 μm.
The characteristic evaluation result of the silicon epitaxial growth layer in the case where 0 Ωcm is formed will be described with reference to FIGS.

First, M is added to the silicon epitaxial growth layer.
The generation (ge) indicating the time until the generation of minority carriers in the depletion layer is obtained by the MOSC-t method of forming an OS capacitor and measuring the time change of the capacitance of the MOS capacitor.
The lifetime τ was determined. FIG. 2 shows the relationship between the generated lifetime τ and the number of repetitions of the epitaxial growth process. As shown in the drawing, as described in the first embodiment, when the epitaxial growth process is repeated twice, as in the conventional case,
Life time τ than when a silicon epitaxial growth layer is formed in a single epitaxial growth process
Is approximately 3.3 times. Incidentally, when the epitaxial growth process is repeated twice, the value becomes close to the value of the generation lifetime τ of the single crystal silicon wafer formed by the CZ method.

Next, FIG. 3 shows the relationship between the surface generation speed S (cm / s) obtained by the MOSC-t method and the number of repetitions of the epitaxial growth process. As shown in the figure, as described in the above embodiment, when the epitaxial growth process is repeated twice, the surface generation is larger than when the silicon epitaxial growth layer is formed by a single epitaxial growth process as in the related art. The value of the speed S becomes approximately 2/3. Incidentally, when the epitaxial growth process is repeated twice, the value becomes close to the value of the surface generation speed S of the single crystal silicon wafer formed by the CZ method.

Next, a second embodiment of the present invention will be described with reference to a manufacturing sequence diagram shown in FIG. In the figure, as an example, a silicon epitaxial growth method by a reduction method using silane trichloride (SiHCl ₃ ) and hydrogen (H ₂ ) as a reaction gas will be described in the same manner as described in the first embodiment. The same steps as those in the first embodiment are denoted by the same reference numerals.

As shown in the figure, first, an epitaxial growth process 4 similar to that described in the first embodiment is performed. This epitaxial growth process 4 includes a cleaning process 11 and a gas replacement process 1 as a heating process 1 of a first process.
2, after performing pre-bake 13, hydrogen annealing 14, and light etching 15, purging 16 and epitaxial growth 1 as an epitaxial growth step 2 in a second step.
7 and then, as a cooling step 3 of the third step, a gas replacement treatment 18 and a cooling 19 are performed.

Thereafter, as shown in the figure, the substrate is taken out of the reaction chamber, and a cleaning process 6 for cleaning each surface of the semiconductor epitaxial layer and the substrate is performed. The cleaning process 6 is performed in the same manner as the cleaning process 11 described above.
That is, the cleaning process 6 includes, for example, a mixed solution of ammonia water and hydrogen peroxide solution (NH ₄ OH + H ₂ O _2).
+ H ₂ O), and then washing with a mixed solution of hydrochloric acid and hydrogen peroxide (HCl + H ₂ O ₂ + H ₂ O). Alternatively, after washing with a mixed solution of hydrochloric acid and aqueous hydrogen peroxide (HCl + H ₂ O ₂ + H ₂ O),
Mixed solution of ammonia water and hydrogen peroxide solution (NH ₄ OH
+ H ₂ O ₂ + H ₂ O). Alternatively, a washing method using nitric acid, a mixed solution of nitric acid and hydrofluoric acid, a mixed solution of sulfuric acid and aqueous hydrogen peroxide, an aqueous hydrofluoric acid solution, or hydrochloric acid can be used alone or in an appropriate combination. Then, after sufficiently drying the substrate, the substrate is mounted on a susceptor in the reaction chamber.

Next, the above epitaxial growth process 4
An epitaxial growth process 5 (4) similar to that described above is performed.
The detailed description of the respective processing conditions of the epitaxial growth processes 4 and 5 is the same as the various conditions described in the first embodiment, and a description thereof will be omitted.

By repeating the cleaning process 6 and the epitaxial growth process 4 a plurality of times as described above, the semiconductor epitaxial layer is deposited until the semiconductor epitaxial layer has a predetermined thickness (for example, the thickness is 8 μm).

In the second embodiment, the epitaxial growth process 4 and the next epitaxial growth process 5
Since the cleaning process 6 is performed between these steps, the surface layer of the semiconductor epitaxial layer can be kept clean to form the next semiconductor epitaxial layer. Therefore, contamination of the semiconductor epitaxial layer is reduced, and the lifetime of, for example, a MOS capacitor formed in the semiconductor epitaxial layer is extended.

Next, by performing the epitaxial growth process described in the second embodiment, a silicon epitaxial growth layer (N type) having a thickness of 4 μm is formed first, followed by a cleaning process, and the epitaxial growth process is repeated. To form a silicon epitaxial growth layer (N type) having a thickness of 4 μm.
The characteristics evaluation results of the silicon epitaxial growth layer when a silicon epitaxial growth layer (N type, sheet resistance is 10 Ωcm to 20 Ωcm) having a thickness of μm will be described with reference to FIGS.

First, M is added to the silicon epitaxial growth layer.
An OS capacitor was formed, and the generation lifetime τ was determined by the MOSC-t method.
FIG. 5 shows the relationship between the generation lifetime τ and the number of repetitions of the epitaxial growth process. As shown in the figure, when the cleaning process 6 is performed and the epitaxial growth process 4 is repeated twice, as compared with the case where the epitaxial growth process is repeated without performing the cleaning process as described in the first embodiment. The value of the generation lifetime τ is improved by about 16%. In addition, when the cleaning process 6 is performed and the epitaxial growth process 4 is repeated twice using the EG-treated substrate, the value of the generated lifetime τ is approximately smaller than when the epitaxial growth process is repeated without performing the cleaning process. 20%
improves. Further, variation in the value of the lifetime τ is reduced. Incidentally, when the cleaning process 6 is performed and the epitaxial growth process 4 is repeated twice, the generation lifetime τ substantially equal to the value of the generation lifetime τ of the single crystal silicon wafer formed by the CZ method is obtained with or without EG. Value or higher.

Next, FIG. 6 shows the relationship between the surface generation speed S (cm / s) obtained by the MOSC-t method and the number of repetitions of the epitaxial growth process. As shown in the figure, when the cleaning process 6 is performed and the epitaxial growth process 4 is repeated twice, the surface generation is higher than when the epitaxial growth process is repeated without performing the cleaning process described in the first embodiment. The speed S value is reduced by about 8%. Also, using the EG processing substrate,
The cleaning process 6 is performed and the epitaxial growth process 4 is performed.
Is repeated twice, than when the epitaxial growth process is repeated without performing the cleaning process,
The value of the surface generation speed S is reduced by about 8%. Further, variation in the value of the surface generation speed S is reduced. By the way, when the cleaning process 6 is performed and the epitaxial growth process 4 is repeated twice, the value of the surface generation rate S of the single crystal silicon wafer formed by the CZ method is substantially the same whether or not EG is performed. Value or less.

[0034]

As described above, according to the first aspect of the present invention, since the epitaxial growth process is repeated a plurality of times, gettering is performed in the second and subsequent epitaxial growth processes. Therefore, it is possible to improve the generation lifetime of the semiconductor element formed on the semiconductor epitaxial substrate. According to the second aspect of the present invention, since the cleaning process is performed between the epitaxial growth process and the next epitaxial growth process, the surface of the semiconductor epitaxial layer is cleaned. Therefore, 2
Impurities are less likely to be mixed into the semiconductor epitaxial layer deposited in the subsequent epitaxial growth processes. Therefore, as described above, it is possible to improve the generation lifetime of the semiconductor element formed on the semiconductor epitaxial substrate. Therefore, the semiconductor device formed on the semiconductor epitaxial substrate of the present invention has improved reliability and electrical characteristics.

[Brief description of the drawings]

FIG. 1 is a manufacturing sequence diagram of a first embodiment.

FIG. 2 is an explanatory diagram of evaluation of an occurrence lifetime in the first embodiment.

FIG. 3 is an explanatory diagram of the evaluation of the surface generation speed in the first embodiment.

FIG. 4 is a manufacturing sequence diagram of the second embodiment.

FIG. 5 is an explanatory diagram of an evaluation of an occurrence lifetime in the second embodiment.

FIG. 6 is an explanatory diagram of the evaluation of the surface generation speed in the second embodiment.

FIG. 7 is a manufacturing sequence diagram of a conventional example.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Heating process 2 Epitaxial growth process 3 Cooling process 4 Epitaxial growth process 5 Epitaxial growth process 6 Cleaning process

────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Osamu Nishima 6-7-35 Kita-Shinagawa, Shinagawa-ku, Tokyo Inside Sony Corporation (72) Inventor Masanori Ohashi 6-7-35 Kita-Shinagawa, Shinagawa-ku, Tokyo (56) References JP-A-4-129228 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 21/205 C23C 16/00-16/56 C30B 25/00-25/22 H01L 21/322

Claims (2)

(57) [Claims] A first step of heating a substrate; a second step of forming a semiconductor epitaxial layer on a surface of the substrate by performing epitaxial growth after adjusting a temperature of the substrate to an epitaxial growth temperature; A method of manufacturing a semiconductor epitaxial substrate, comprising repeating a plurality of times of an epitaxial growth process including a third step of cooling the substrate to a temperature equal to or lower than half the epitaxial growth temperature. A first step of heating the substrate; a second step of forming a semiconductor epitaxial layer on the surface of the substrate by performing epitaxial growth after adjusting the temperature of the substrate to an epitaxial growth temperature; A method of manufacturing an epitaxial substrate, comprising repeating a plurality of times of an epitaxial growth process including a third step of cooling the substrate to a temperature equal to or lower than エ ピ タ キ シ ャ ル of an epitaxial growth temperature, wherein the third step is performed before the second and subsequent epitaxial growth processes are performed. To
A method for manufacturing a semiconductor epitaxial substrate, comprising performing a cleaning process of cleaning the substrate together with a semiconductor epitaxial layer.