JP3115034B2 - 面積効率的低パワーバイポーラ電流モード論理 - Google Patents

面積効率的低パワーバイポーラ電流モード論理

Info

Publication number
JP3115034B2
JP3115034B2 JP03194676A JP19467691A JP3115034B2 JP 3115034 B2 JP3115034 B2 JP 3115034B2 JP 03194676 A JP03194676 A JP 03194676A JP 19467691 A JP19467691 A JP 19467691A JP 3115034 B2 JP3115034 B2 JP 3115034B2
Authority
JP
Japan
Prior art keywords
circuit
input
coupled
current
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP03194676A
Other languages
English (en)
Japanese (ja)
Other versions
JPH06343035A (ja
Inventor
イー． ライト マイケル
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Semiconductor Corp
Original Assignee
National Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by National Semiconductor Corp filed Critical National Semiconductor Corp
Publication of JPH06343035A publication Critical patent/JPH06343035A/ja
Application granted granted Critical
Publication of JP3115034B2 publication Critical patent/JP3115034B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/086—Emitter coupled logic
    • H03K19/0863—Emitter function logic [EFL]; Base coupled logic [BCL]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/26—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
    • H03K3/28—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
    • H03K3/281—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
    • H03K3/286—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable
    • H03K3/288—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable using additional transistors in the input circuit

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Logic Circuits (AREA)
JP03194676A 1990-05-04 1991-05-02 面積効率的低パワーバイポーラ電流モード論理 Expired - Lifetime JP3115034B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US519385 1990-05-04
US07/519,385 US5051621A (en) 1990-05-04 1990-05-04 Area-efficient low-power bipolar current-mode logic

Publications (2)

Publication Number Publication Date
JPH06343035A JPH06343035A (ja) 1994-12-13
JP3115034B2 true JP3115034B2 (ja) 2000-12-04

Family

ID=24068088

Family Applications (1)

Application Number Title Priority Date Filing Date
JP03194676A Expired - Lifetime JP3115034B2 (ja) 1990-05-04 1991-05-02 面積効率的低パワーバイポーラ電流モード論理

Country Status (2)

Country Link
US (1) US5051621A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JP3115034B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5446409A (en) * 1992-11-30 1995-08-29 Sony Corporation Cross coupled symmetrical current source unit
JP3519143B2 (ja) * 1994-11-17 2004-04-12 三菱電機株式会社 電流型インバータ回路、電流型論理回路、電流型ラッチ回路、半導体集積回路、電流型リング発振器、電圧制御発振器及びｐｌｌ回路
US5912576A (en) * 1997-03-21 1999-06-15 Alliedsignal Inc. Clocked register

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4737663A (en) * 1984-03-01 1988-04-12 Advanced Micro Devices, Inc. Current source arrangement for three-level emitter-coupled logic and four-level current mode logic
US4704544A (en) * 1986-04-22 1987-11-03 Unisearch Limited Complementary current mirror logic
US4736125A (en) * 1986-08-28 1988-04-05 Applied Micro Circuits Corporation Unbuffered TTL-to-ECL translator with temperature-compensated threshold voltage obtained from a constant-current reference voltage
US4988898A (en) * 1989-05-15 1991-01-29 National Semiconductor Corporation High speed ECL/CML to TTL translator circuit
US4988899A (en) * 1989-05-15 1991-01-29 National Semiconductor Corporation TTL gate current source controlled overdrive and clamp circuit
US4945265A (en) * 1989-07-13 1990-07-31 National Semiconductor Corporation ECL/CML pseudo-rail circuit, cutoff driver circuit, and latch circuit
US4945263A (en) * 1989-08-23 1990-07-31 National Semiconductor Corporation TTL to ECL/CML translator circuit with differential output

Also Published As

Publication number Publication date
JPH06343035A (ja) 1994-12-13
US5051621B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1992-09-15
US5051621A (en) 1991-09-24

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