JP3098194B2 - Method for manufacturing silicon semiconductor diode chip in which fully open PN junction is passivated with glass - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a silicon semiconductor diode chip in which a fully open PN junction is passivated with glass, and more particularly, to a whole cut surface including a fully open PN junction. And a method of manufacturing a silicon semiconductor commutator diode chip passivated by glass.

The manufacturing method of the present invention comprises the steps of making a silicon semiconductor commutator diode wafer by a standard diffusion process, cutting the silicon semiconductor commutator diode wafer into individual diode chips, and opening the diode chips. Chemically polishing and oxidizing the PN junction thus obtained, coating the opened PN junction with a glass powder for passivation, sintering the glass for passivation, and forming a vitrified layer. Forming.

[0003]

2. Description of the Related Art Conventionally, a standard diffusion process has been widely used in industry for manufacturing a silicon semiconductor commutator diode, and the diffusion process used industrially includes the following steps. ing. That is, phosphorus,
Pentavalent elemental impurities, such as arsenic, and trivalent elemental impurities, such as boron, aluminum, or gallium, are diffused to each side of the silicon wafer, each containing low density impurities, resulting in P- Providing an N-junction and positive and negative electrode surfaces with lower surface resistance; and forming a thin metal film (such as nickel or aluminum) into ohmic contact with the surface of the silicon wafer. ing. In a subsequent desired soldering step, different metals are used. Generally, in the case of soft soldering, nickel and gold are used. Aluminum is used for hard brazing.

After manufacturing a silicon diode wafer, the wafer is cut into small dies having predetermined shapes and sizes according to the intended use of the diode. next,
The open PN junction of the chip is chemically polished to remove mechanical damage and contamination caused by separate cutting operations. Then, after a silicon dioxide thin film is formed on the silicon diode chip so that the chip has good reverse electric characteristics, a passivation process is performed on the PN junction of the chip and a coating is formed. You. In this way, a chip is manufactured.

In a conventional method for manufacturing a diode chip,
A manufacturing method having three categories is often adopted. Hereinafter, these will be described. 1) For subassembly of conductive parts and soldered diodes: After the diode wafer is cut into chips, each diode chip is soldered with the conductive parts to form a soldered subassembly. You. Next, the open PN junction of the chip is subjected to chemical treatment, passivation and coating treatment. Methods within this category include the "sandwich cell structure" and "axial lead plastic molded package" methods previously developed by Westinghouse, and others.

2) In the case of a diode passivated by glass: FIG. 1 shows a conventional example, and shows a flow chart of a method of manufacturing a diode passivated by glass. This manufacturing method has been developed and patented by General Electric Company of the United States.

As shown in FIG. 1, after the diode wafer is manufactured (step 101), aluminum is deposited on the diode wafer (step 102). Next, the chip is subjected to sand blasting so as to obtain a round chamfered chip (step 103), and then the chip is subjected to a low temperature treatment in an etching solution containing hydrofluoric acid and nitric acid as main components (step 104).

The polished chip is blazed to make conductive parts on both sides (step 10).
5). If the coefficient of thermal expansion of the electrode material is close to the coefficient of thermal expansion of silicon, tungsten or molybdenum is used in hard brazing of aluminum joints to join conductive parts. In other cases, a brazing material such as a copper-silver-phosphorus alloy is used to bond the copper lead and electrode.

The open PN junction of the brazed subassembly tip is then subjected to a second chemical treatment (step 106), coated with a glass for passivation (step 108), and sintered. Thus, a vitrified coating layer is formed (step 108). Such a manufacturing method is a relatively progressive method for manufacturing a diode chip.

3) In the case of a diode in which a grooved open PN junction is passivated with glass: FIG. 2 shows a method of manufacturing a diode in which a grooved open PN junction is passivated with glass. 4 shows a flowchart. FIG. 3 shows the structure of the silicon semiconductor diode chip manufactured according to the flowchart shown in FIG.

As shown in FIGS. 2 and 3, after the diode wafer has been manufactured according to the prior art (step 20).
1) The diode wafer is oxidized (step 20)
2) Photoresist is coated (step 203). Standard lithographic techniques and etching are performed to form grooves 22 on the P-side 21 of the diode wafer (step 204). The groove 22 is provided for separation and surrounds the edge of the diode chip. The PN junction 23 of each diode chip is exposed and its base layer 2
4 so that the contact between the part 4 and the N layer (N side) 25 is maintained.
The pattern of the groove 22 and the depth of the groove 22 are formed.

Next, the photoresist is removed (step 2).
05), a glass 26 for passivation is coated in the groove 22 of the grooved wafer (step 206). The glass 26 for passivation is sintered (step 20).
7) A metal thin film is plated on the wafer to form electrodes (step 208). Next, the chips are cut from the wafer (step 209). The rectifying chips manufactured by this method are called GPP, pellets passivated by glass. FIG. 3 shows the structure of a silicon semiconductor diode chip 20 manufactured by the GPP method.

[0013] Among the prior art, the GPP method is more suitable than other methods. Therefore, when manufacturing a diode module such as a rectifier circuit module, it is widely used in industry. A preferred example of a component manufactured in this manner is a bridge rectifier. Furthermore, GP
The P method can also be applied to small outline diodes (SOD).

[0014]

However, the GPP method has several disadvantages. For example, in the GPP method, PN
A cut surface having a depressed chamfer at the joint 23 occurs.
The reason is that the groove 22 is etched on the P side 21 of the wafer during the manufacturing process. With such a structure, a depletion layer formed by applying a reverse voltage bias generates a reverse electric field extending to the PN junction 23 at the cutting contour of the groove.

In order to solve this problem, the chip requires a larger area, so that the same load power as the diode chip manufactured by the "vertical cutting method" or the "cutting method having a bulging chamfer" is used. Will be needed. Therefore,
There is a problem that the manufacturing cost of the diode chip increases.

As a specific example, for example, in the case of a 1-ampere rectangular diode chip manufactured by the GPP method, the surface area of the P side 21 is about 38 mil × 38 mil (1 mil is 1/1000 inch). And the surface area on the N side 25 is about 55 mils x 55 mils. The effective area of the chip is (38 × 38) / (55 × 55) and about 4
7%. Another disadvantage of the GPP method is that it is difficult to obtain a reverse voltage resistance by this method.

Further, the GPP method requires multiple lithographic steps. This is because, when the passivation material made of glass is coated in the groove, the groove 22 is formed.
Must be protected by, for example, a photoresistive material. Therefore, when plating a metal thin film, the groove 22 must also be covered with a photo-resistive material. As a result, an expensive apparatus is required and the number of manufacturing steps is increased in order to manufacture by the GPP method. There's a problem.

Finally, the important point is the mechanical damage to the glass coating that occurs when the chips are separated, which is the final stage of the GPP method, which is an unavoidable problem during the cutting process. . Thus, stress concentration is caused by cracks generated in the glass coating layer, and this is an important cause of chip malfunction.

Therefore, there is an urgent need in the industry for a method of manufacturing a novel silicon semiconductor diode chip that can overcome the problems of the GPP method.

An object of the present invention is to propose a novel method of manufacturing a silicon semiconductor diode chip in which the fully open PN junction of the semiconductor diode chip is covered with glass for passivation.

Another object of the present invention is to provide a method of manufacturing a silicon semiconductor diode chip in which the area occupied by the semiconductor diode chip is reduced.

Still another object of the present invention is to provide a semiconductor device in which a fully open PN junction of a semiconductor chip is sealed.
An object of the present invention is to provide a simple method for manufacturing a silicon semiconductor diode chip having improved electrical characteristics.

Still another object of the present invention is to provide a simple method for manufacturing a silicon semiconductor chip in which the peak reverse voltage of a diode chip is increased.

Still another object of the present invention is to provide a fully open type P
It is an object of the present invention to provide a novel manufacturing method capable of mass-producing a silicon semiconductor diode chip having a -N junction portion glass-passivated with simple steps and equipment.

For this purpose, according to the present invention, a cut surface formed by cutting a silicon semiconductor wafer includes:
Silicon having a diode chip including an exposed fully open PN junction, and a vitrified layer formed by coating a passivation glass on the entire cut surface of the diode chip before forming a metal electrode. A method for manufacturing a semiconductor diode chip is disclosed. A glass layer for glass passivation is formed on each diode chip and then individually sintered.
It has become possible to avoid damage to the glass layer for glass passivation during the cutting step in the GPP method.

The silicon semiconductor diode chip manufactured by the manufacturing method of the present invention and having the fully open PN junction passivated with glass has a chamfer in which the open PN junction swells. ing.
Therefore, the peak reverse voltage increases and the leakage current decreases.

[0027]

According to the first aspect of the present invention, a silicon semiconductor wafer having a P layer and an N layer is cut, and a cut surface from a P side to an N side formed at a peripheral edge is exposed. Manufacturing a diode chip including the PN junction, and chemically polishing and oxidizing the entire cut surface including the exposed PN junction;
Coating the passivation glass layer over the entire cut surface including the exposed PN junction of the diode chip before forming the metal electrode on the diode chip; and heating the passivation glass layer to form a diode. The step of forming a vitreous vitrified layer over the entire cut surface of the chip and the step of coating the glass for passivation have a positioning plate having a plurality of positioning means, a plurality of forming holes, and Fixing the diode chip to a fixture consisting of a molding plate having a diameter of the forming hole slightly larger than the diameter of the diode chip, and removing the glass for passivation from the gap between the diode chip and the wall of the forming hole. And positioning the diode chip by removing the molding plate It is obtained to include the steps of positioning on the plate.

According to a second aspect of the present invention, in the method for manufacturing a silicon semiconductor diode chip according to the first aspect of the present invention, the step of forming the diode chip includes the step of forming a mesa having a round shape and a rectangular mesa having a rounded corner. The shape or the hexagonal mesa shape with rounded corners is formed.

According to a third aspect of the present invention, in the method of manufacturing a silicon semiconductor diode chip according to the first aspect, in the step of manufacturing the diode chip, the angle between the cut surface and the N-side surface is about 90 °. And a cutting step.

According to a fourth aspect of the present invention, in the method of manufacturing a silicon semiconductor diode chip according to the first aspect of the present invention, a metal thin film is formed on the P side and the N side of the diode chip after forming a vitrified layer. And further comprising the step of plating.

According to a fifth aspect of the present invention, there is provided the method of manufacturing a silicon semiconductor diode chip according to the first aspect of the present invention, wherein the metal thin film serving as the metal electrode formed on the P side or the N side is formed by vapor-deposited aluminum or silver-plated nickel. Or gold-plated nickel.

According to a sixth aspect of the present invention, in the method of manufacturing a silicon semiconductor diode chip according to any one of the first to fifth aspects, the positioning means of the positioning plate is provided with a suction pipe connected to a vacuum compressor. And a plurality of suction ports, and the diameter of the suction port is formed to be slightly smaller than the diameter of the diode chip.

According to a seventh aspect of the present invention, in the method of manufacturing a silicon semiconductor diode chip according to any one of the first to fifth aspects, the method further includes a step of moving the diode chip to a fixture. It was done.

According to the present invention, a silicon semiconductor wafer having a P layer and an N layer is cut, and a cut surface from the P side to the N side formed at the peripheral edge is exposed to the exposed P- layer.
Manufacturing a diode chip including an N junction; chemically polishing and oxidizing the entire cut surface including the exposed PN junction; and forming the diode electrode before forming a metal electrode on the diode chip. Coating a glass layer for passivation on the entire cut surface including the exposed PN junction of the chip, and heating the glass layer for passivation to form a vitreous vitrified layer on the entire cut surface of the diode chip. The forming step and the step of coating the passivation glass include the steps of positioning the diode chip on the loader plate with an adhesive, and coating the passivation glass on the cut surface of the peripheral edge of the diode chip. It is meant to be included.

According to a ninth aspect of the present invention, in the method of manufacturing a silicon semiconductor diode chip according to the eighth aspect, the step of forming the diode chip includes the step of forming the diode chip in a mesa shape having a round shape and a rectangular mesa shape having a rounded corner. ,
Alternatively, it is formed so as to have a hexagonal mesa shape with rounded corners.

According to a tenth aspect of the present invention, in the method of manufacturing a silicon semiconductor diode chip according to the eighth aspect, the step of manufacturing the diode chip is such that the angle between the cut surface and the N-side surface is about 90 °. And a cutting step.

According to an eleventh aspect of the present invention, in the method for manufacturing a silicon semiconductor diode chip according to the eighth aspect, after forming a vitrified layer, the P of the diode chip is reduced.
The method further includes a step of plating a metal thin film to be a metal electrode on the N side and the N side.

According to a twelfth aspect of the present invention, in the method of manufacturing a silicon semiconductor diode chip according to the eighth aspect, the metal thin film which is to be formed on the P side or the N side as a metal electrode is formed by vapor-deposited aluminum, silver-plated nickel, Alternatively, it is formed of gold-plated nickel.

According to a thirteenth aspect of the present invention, in the method of manufacturing a silicon semiconductor diode chip according to any one of the eighth to twelfth aspects, the step of coating the glass for passivation includes the step of forming a diameter on the loader plate. Mounting a stencil plate having a plurality of positioning holes slightly larger than the diameter of the diode chip; coating passivation glass in a gap between the diode chip and the wall of the positioning hole; and And positioning the diode chip on the loader plate by removing the.

According to a fourteenth aspect of the present invention, in the method of manufacturing a silicon semiconductor diode chip according to any one of the first to fifth aspects, the glass coated on the surface of the diode chip is replaced with a glass substrate. And a step of cleaning except for the cut surface.

According to a fifteenth aspect of the present invention, in the method of manufacturing a silicon semiconductor diode chip according to any one of the eighth to twelfth aspects, glass for passivation is coated on the cut surface by injection. It was made.

According to a sixteenth aspect of the present invention, in the method for manufacturing a silicon semiconductor diode chip according to the fifteenth aspect, a step of burning off the adhesive is further included.

According to a seventeenth aspect of the present invention, in the method of manufacturing a silicon semiconductor diode chip according to the fifteenth aspect, the P side or the N side of the silicon semiconductor diode chip is provided.
The method further includes forming a nickel or metal thin film on the side by chemical plating.

[0044]

BEST MODE FOR CARRYING OUT THE INVENTION

Embodiment 1 A first embodiment of the present invention will be described in detail with reference to FIGS. FIG. 4 shows an embodiment of the present invention, and is a flow chart showing a method of manufacturing a silicon semiconductor diode chip 1 in which a fully open PN junction 6 is passivated with glass, and FIG. FIG. 2 shows a cross-sectional view of a main part of a silicon semiconductor diode chip 1 in which a -N junction 6 is passivated with glass, and a fully open PN junction 6 is sealed with a glass layer;
Each diode chip is individually processed as a part. Fig. 6 shows a fully open type P magnified 40 times.
1 shows a silicon semiconductor diode chip 1 in which a -N junction 6 is passivated with glass.

Next, the flowchart shown in FIG.
The method for manufacturing a silicon semiconductor diode chip according to the present invention will be described in detail with reference to FIG.

As shown in FIGS. 4 and 5, in order to manufacture the silicon semiconductor diode chip 1 in which the fully open PN junction 6 is passivated with glass according to the present invention, first, a conventional technique is used. Use P layer and N
A silicon semiconductor wafer having layers is manufactured (step 501). Next, the N + layer 3 (3a) and the P +
The + layer 4 (4a) and the PN junction 6 are formed.

Next, metal plating or aluminum metal is deposited so that both sides of the front and back sides of the silicon semiconductor wafer become electrodes, and the surface of the N + layer 3 and the P + layer 4 are formed.
The metal thin film 5 is formed on each of the surfaces (Step 502). In addition, as a material that can be used for the metal thin film 5 serving as an electrode, aluminum, nickel, or a silver or gold plating material thereof may be used. That is, the electrode material and the manufacturing method of the metal thin film 5 are appropriately selected according to the use of the chip.

Next, the silicon semiconductor wafer metallized by vapor deposition aluminum or metal plating is cut into small diode chips (dies) by sandblasting or chemical etching (step 503). A cut surface from the P side to the N side is formed at the peripheral edge of the diode chip thus formed, and an exposed PN junction 6 is formed on this cut surface. At this time, the angle between the cut surface and the surface of the N + layer 3 is 9
It is cut so as to be 0 °.

The N side 3a of the silicon semiconductor wafer
When sand blasting is performed, the cut surface of the fully open PN junction 6 naturally has a bulging chamfer. Diode chip has a round mesa shape, a rectangular mesa shape with rounded corners,
It may be a hexagonal mesa with rounded corners or any other suitable shape. The P electrode side is formed on the mesa bottom. In the case of the first embodiment, a round mesa diode chip having a diameter of 50 mils on the N side at the top of the mesa is formed by sandblasting.

Next, the diode chip manufactured as described above is subjected to chemical polishing and oxidizing agent treatment. In addition, when aluminum deposition is performed on the diode chip, in order to form a silicon dioxide thin film in the cut region by removing the damaged portion by the cutting by etching,
The diode chip is generally treated in a solution of an etching material of the hydrofluoric and nitric acid components (step 5).
04).

When the diode chip is plated with nickel by silver or gold plating, the diode chip is treated with a potassium hydroxide solution. Excellent characteristics can be obtained by any of the above methods.

Next, the diode chip is placed on a fixture (not shown), and paste of glass powder for passivation is applied to the cut surface including the fully open PN junction 6 (step 505). ), Heating and drying the glass for passivation in an electric furnace, sintering and melting the glass powder (step 506), and the cut surface including the fully open PN junction 6 of the diode chip includes: The vitrified and coated vitrified layer 7 is formed.

A fixing tool applicable in this embodiment includes a positioning plate provided with a plurality of positioning vacuum holes,
A forming plate provided with a plurality of forming holes is used. Less than,
A case in which a vitrified layer is formed using this fixture will be described.

The positioning plate has a positioning vacuum hole formed therein, and the diameter of the positioning vacuum hole is formed smaller than the diameter of the diode chip. Further, each positioning hole is connected to a vacuum pump via a vacuum chamber. To position such a positioning plate, the positioning plate is positioned by sucking air from a suction pipe connected to a vacuum compressor and a plurality of suction ports. The diameter of the suction port is formed to be slightly smaller than the diameter of the diode chip.

The height of the formed plate is substantially equal to the height of the die. The diameter of the forming hole is larger than the diameter of the diode chip. The position of the forming hole corresponds to the position of the positioning hole. The positioning plate and the forming plate are stacked and serve as a fixture for applying the glass slurry to the edge of the diode chip.

The diode chips to be processed are loaded into a conventional vacuum die loader. The vacuum die loader is vibrated so that the diode chip is located in the positioning hole of the vacuum die loader. The diode chip is moved from the vacuum die loader to a fixture having locating and forming holes.

The glass slurry for passivation is made of a paste-like solution and is applied using a spatula to the gap between the die and the wall of the locating hole. The glass slurry on the diode chip surface is then cleaned. The fully open PN junction 6 of the diode chip is coated with a glass slurry.

Next, after removing the forming plate, the diode chip is placed at the position of the positioning hole of the positioning plate. The glass slurry is dried and a sintered plate is placed on the diode chip. After rotating the positioning plate, the diode chip is taken out from the positioning plate with the protruding pin. A diode chip having a fully open PN junction 6 covered with glass for passivation is arranged on a sintered plate. Then, the diode chip is sintered to form a vitrified layer 7 which is a glass coating layer.

In the first embodiment of the present invention, the electrodes are not plated before the silicon semiconductor wafer is sand-blasted and formed into dies (diode chips), but the electrodes are formed after passivation with glass. (Diode chip).

In this way, the entire cut surface of the diode chip including the fully open PN junction 6 is covered with the glass for passivation. In the first embodiment, the glass for passivation coated on the fully open PN junction 6 is made of a paste of glass powder for passivation and water, or another solution, or another appropriate material. Things are fine.

The outer surface of the fully open PN junction 6 of the silicon semiconductor diode chip 1 manufactured as described above is covered with a vitrification layer 7 for passivation. Observation with a microscope revealed that the silicon semiconductor diode chip 1 did not show any mechanical damage, breakage or crack. FIG. 6 and a photograph submitted as a reference photograph show a silicon semiconductor diode chip 1 manufactured in this example and having a cut surface including a fully open PN junction 6 magnified 40 times and passivated with glass. ing.

As is apparent from FIG. 6, as compared with the conventional structure shown in FIG. 3, the silicon semiconductor in which the fully open PN junction 6 of the present invention is passivated with glass. It became clear that the diode chip 1 had excellent characteristics.

The diode chip manufactured through such a manufacturing process is tested, classified, and mounted according to industrial specifications. The outline of the diode chip may be round, round mesa, rounded rectangular mesa, rounded hexagonal mesa, or any other suitable shape.

[0064]

Embodiment 2 The second embodiment relates to a diode chip manufactured by a stencil plate-squeezing method. A silicon semiconductor diode wafer which is not metallized by using a conventional technique is manufactured, and a P side 4a and an N side 3a are formed. An etching resist is applied.

Next, the silicon semiconductor wafer is cut by a dicing source to produce hexagonal diode chips. N side 3a including P-N junction 6 to P side 4
The cut surface of the diode chip up to a is exposed to the outside air. This diode chip is treated with an etchant whose main components are nitric acid and hydrofluoric acid,
The damage is etched away to form silicon dioxide in the exposed areas.

Next, the diode chip is placed in the fixture, and a glass slurry for passivation is applied to the entire cut surface including the PN junction 6. In this embodiment, the glass for passivation is squeezed out to the cut surface of the diode chip using a stencil plate. next,
The diode chip is dried and sintered, and the glass powder is decomposed and melted. Fully open type PN of diode chip
A vitrified coating layer 7, which is a vitrified coating layer, is formed at the joint 6.

As a fixture applicable to the second embodiment, a ceramic loader plate coated with a positioning adhesive and a stencil plate provided with a plurality of forming holes are used. Any adhesive that can be used is one that burns in air at 500 ° C. For example,
Ethyl cellulose solute in n-butyl carbitol is included.

The stencil plate is a flat plate provided with a plurality of forming holes, and the thickness of the stencil plate is formed substantially equal to the thickness of the diode chip. Forming holes are formed on the stencil plate, and the distribution of the forming holes corresponds to the distribution of the diode chips on the ceramic plate. The ceramic plate and the stencil plate are stacked and combined to serve as a set of devices for applying the glass slurry to the diode chips.

After the processed diode chip is loaded into a conventional vacuum die loader, the vacuum die loader is vibrated to position the diode chip in the positioning hole of the vacuum die loader. The diode chips are then transferred from the vacuum die loader to the ceramic plate and glued to the ceramic plate with a pre-applied combustion adhesive. Next, the stencil plate is laminated so as to overlap the ceramic plate so that the die is located in the forming hole.

A glass slurry for passivation is produced using a pasty solution and is applied using a spatula to the gap between the diode chip and the wall of the forming hole. Then, the glass on the diode chip surface
After the slurry has been cleaned, the fully open PN junction 6 of the diode chip is coated with a glass slurry. In addition, as a material of the glass for passivation, Pb
O2, SiO2 and B2 O3 are included. IP-90
Certain commercially available thick films, such as 0, are also applicable to this invention.

Next, the stencil plate is removed, the diode chip coated with glass for passivation is placed on a ceramic loader plate, the glass slurry is dried and sintered, the binder is burned, and the vitrified glass is formed. Layer 7 is formed.

If necessary, a thin film of nickel or gold is plated on the P-side 4a or the N-side 3a of the diode chip using a conventional technique.

The entire cut surface including the open PN junction 6 of the diode chip manufactured as described above is covered with a glass thin film for passivation. Observation with a microscope revealed that the silicon semiconductor diode chip did not show any mechanical damage, breakage or cracking.

[0074]

Embodiment 3 The third embodiment relates to a diode chip obtained by injection molding glass for passivation.
First, a hexagonal diode chip is manufactured based on the method of the second embodiment. This diode chip is placed on a plate and then adhered to the plate, and is opened by injection molding to form an open-type P.
A glass for passivation is coated on the cut surface including the -N joint 6. Next, the bonded diode chip is peeled off and sintered to form a vitrified layer 7 on the cut surface including the fully open PN junction 6.

The glass injection molding component for passivation is produced by adding a thermoplastic binder to glass powder. Materials that can be used as the plastic binder may be those that burn in the air at 500 ° C., for example, LDPE (Low
Density Polyethylene), stearic acid and paraffin wax.

As described in the second embodiment, the diode chips to be processed are placed in a conventional vacuum die loader. Next, the diode chip is
The vacuum die loader is vibrated to position it in the positioning holes of the loader. After positioning the diode chips in this way, each diode chip moves from the vacuum loader to the positioning plate and is bonded with a previously applied adhesive.

The die holding plate is placed in the injection mold. A glass component for passivation is injected into the cavity, and a molding element is formed on the edge surface of each die. Next, the diode chip is sintered to burn out the binder, and the vitrified layer 7 is formed.

If necessary, a thin film of nickel or gold is plated on the P side 4a or the N side 3a of the diode chip using a conventional technique.

As a result of observation with a microscope, it was found that no mechanical damage, breakage or crack was observed in the glass element.

Table 1 below shows the measurements of the reverse electrical characteristics of the silicon semiconductor diode chips manufactured by the method of the present invention. As is evident from the measurement results, all measured reverse voltage resistances are greater than 1200 volts and the average reverse voltage resistance is 1400 volts.

[0081]

Table 1 is a table showing the results of measuring the reverse electrical characteristics of a diode chip manufactured according to the method of the present invention. Standard number reverse voltage Standard number reverse voltage 1 1200 11 1450 2 1450 12 1250 3 1600 13 1450 4 1600 14 1300 5 1250 15 1400 6 1400 16 1600 7 1450 17 19 430 910 430 950 10 1800 20 1850

While the above has been described with reference to the preferred embodiments of the present invention, it is clear that the above and other changes can be made without departing from the spirit and scope of the present invention.

[0083]

According to the first aspect of the present invention, a silicon semiconductor wafer having a P layer and an N layer is cut, and the cut surface from the P side to the N side formed at the peripheral edge is exposed.
Manufacturing a diode chip including the -N junction; chemically polishing and oxidizing the entire cut surface including the exposed PN junction; and forming the metal electrode on the diode chip before forming the metal electrode on the diode chip. Coating a passivation glass layer over the entire cut surface of the diode chip including the exposed PN junction; and heating the passivation glass layer to cover the entire cut surface of the diode chip with a vitreous vitrified layer. Forming, and the step of coating the glass for passivation comprises a positioning plate having a plurality of positioning means, a plurality of forming holes, and the diameter of the forming holes is slightly larger than the diameter of the diode chip. Fixing the diode chip to a fixture consisting of a large formed plate; The glass for ® down, and inserting into the gap between the diode chips and molded hole in the wall,
Positioning the diode chip on the positioning plate by removing the forming plate, so that the peripheral edge formed by cutting the silicon semiconductor wafer having the P layer and the N layer becomes exposed P
Forming a diode chip having a cut surface from the P side to the N side including the -N junction, and forming a passivation before forming a metal electrode on the entire cut surface of the diode chip including the exposed PN junction. A diode chip having a structure having a vitrified layer formed by coating glass can be formed, and can be separately processed in each step of manufacturing the diode chip, and mechanical damage and cracks can be generated. Can be eliminated.

Furthermore, a silicon semiconductor diode chip having various metallized electrode surfaces and improved characteristics can be manufactured in a simple and inexpensive step with a simple and low-cost apparatus.

The open type PN manufactured as described above
Since the cut surface of the joint has a bulging chamfer, the peak reverse voltage can be increased and the reverse current leakage can be reduced.

The chip manufactured by the method of the present invention has a smooth glass surface, so that automatic feeding and automatic placement on a fixture can be adapted to a manufacturing process in which preparation is easy.

The chip assembly and manufacturing method of the present invention can be applied to various commutators and rectifier circuit modules such as bridge commutators. The invention is also suitable for the production of small profile diode commutators (SOD).

[Brief description of the drawings]

FIG. 1 shows a conventional example and is a flow chart of a method for manufacturing a diode passivated by glass.

FIG. 2 shows a conventional example, and is a flow chart of a method of manufacturing a diode in which a grooved fully open PN junction is passivated with glass.

FIG. 3 shows a conventional example, and is a view showing a structure of a silicon semiconductor diode chip manufactured by a GPP method.

FIG. 4 shows an embodiment of the present invention, and is a fully open type P-type.
It is a flowchart of the manufacturing method of the silicon semiconductor diode chip by which the N junction part was passivated with glass.

FIG. 5 shows an embodiment of the present invention and is a fully open P-type.
FIG. 3 is a structural diagram of a silicon semiconductor diode chip in which an N junction is passivated by glass.

FIG. 6 shows an embodiment of the present invention, and is a silicon semiconductor diode chip in which a fully open PN junction enlarged by a factor of 40 is passivated with glass.

Table 1 is a table showing the results of measuring the reverse electrical characteristics of a diode chip manufactured according to the method of the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Silicon semiconductor diode chip by which the fully open PN junction part was passivated with glass 3a N side 4a P side 5 Metal thin film 6 Open PN junction part 7 Vitrified layer

Continuation of front page (73) Patent holder 596118220 8 / F No. 2, Alley 16, Lane 235, Pao Chiao R d. , Hsin Tien, Taiwan (72) Inventor Ai Phong Joan Taiwan, Chaye City, Min Sen Sauss Street, Rehne 433, No. 21 (72) Inventor Huey Jeng Chusai Thaiwan, Chaye City, Tui Yang Street, No. 266 ( 56) References JP-A-53-13361 (JP, A) JP-A-56-90575 (JP, A) JP-A-52-87360 (JP, A) JP-A-5-335600 (JP, A) JP-A-55-105355 (JP, A) JP-A-51-105269 (JP, A) JP-A-62-178539 (JP, U) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 21 / 329 H01L 21/56

Claims (17)

(57) [Claims] 1. A silicon semiconductor wafer having a P layer and an N layer is cut to produce a diode chip including a PN junction in which a cut surface from a P side to an N side formed at a peripheral edge is exposed. Chemically polishing and oxidizing the entire cut surface including the exposed PN junction; and forming the exposed P-N of the diode chip before forming a metal electrode on the diode chip. Coating a glass for passivation on the entire cut surface including the N junction; heating the glass for passivation to form a vitreous vitrified layer on the entire cut surface of the diode chip; When the step of coating the glass for passivation has a positioning plate having a plurality of positioning means and a plurality of forming holes, Fixing the diode chip to a fixture consisting of a molding plate having a diameter of the molding hole slightly larger than the diameter of the diode chip; and forming the glass for passivation with the diode chip. A method of manufacturing a silicon semiconductor diode chip, comprising: inserting the diode chip on the positioning plate by removing the forming plate; and inserting the diode chip into the gap between the hole wall. 2. The method of claim 1, wherein the forming of the diode chip is performed such that the shape of the diode chip is a round mesa, a rectangle having a rounded corner, or a hexagon having a rounded corner. The method for manufacturing a silicon semiconductor diode chip according to claim 1. 3. The silicon according to claim 1, wherein the step of manufacturing the diode chip includes a step of cutting so that an angle between the cut surface and the N-side surface is about 90 °. A method for manufacturing a semiconductor diode chip. 4. The method according to claim 1, further comprising, after forming the vitrified layer, plating a metal thin film serving as a metal electrode on the P side and the N side of the diode chip. A method for manufacturing a silicon semiconductor diode chip. 5. The method according to claim 1, wherein the metal thin film serving as the metal electrode formed on the P side or the N side is formed of vapor-deposited aluminum, silver-plated nickel, or gold-plated nickel. A method for manufacturing a silicon semiconductor diode chip. 6. The positioning means of the positioning plate comprises a suction pipe connected to a vacuum compressor and a plurality of suction ports, and the diameter of the suction port is formed slightly smaller than the diameter of the diode chip. The method for manufacturing a silicon semiconductor diode chip according to any one of claims 1 to 5, wherein: 7. The method of claim 1, further comprising moving the diode chip to the fixture.
A method for manufacturing a silicon semiconductor diode chip according to any one of claims 1 to 5. 8. A silicon semiconductor wafer having a P layer and an N layer is cut to manufacture a diode chip including a PN junction in which a cut surface from a P side to an N side formed at a peripheral edge is exposed. Chemically polishing and oxidizing the entire cut surface including the exposed PN junction; and forming the exposed P-N of the diode chip before forming a metal electrode on the diode chip. Coating a glass layer for passivation on the entire cut surface including the N junction; and heating the glass layer for passivation to form a vitreous vitrified layer on the entire cut surface of the diode chip. Covering the glass for passivation, positioning the diode chip on a loader plate with an adhesive; Method for producing a silicon semiconductor diode chip, characterized in that it comprises the steps of coating a glass for the passivation on the cut surface around the edge of the diode chip. 9. The method of forming a diode chip according to claim 1, wherein the diode chip is formed to have a round mesa shape, a rectangular mesa shape with rounded corners, or a hexagonal mesa shape with rounded corners. The method for manufacturing a silicon semiconductor diode chip according to claim 8. 10. The method of manufacturing the diode chip, wherein an angle between the cut surface and the N-side surface is about 90 °.
9. The method according to claim 8, further comprising the step of cutting the silicon semiconductor diode chip into a chip. 11. The method according to claim 8, further comprising, after forming the vitrified layer, plating a metal thin film serving as a metal electrode on the P side and the N side of the diode chip. A method for manufacturing a silicon semiconductor diode chip. 12. The method according to claim 8, wherein the metal thin film serving as the metal electrode formed on the P side or the N side is formed of vapor-deposited aluminum, silver-plated nickel, or gold-plated nickel. A method for manufacturing a silicon semiconductor diode chip. 13. The step of coating a glass for passivation, comprising: mounting a stencil plate having a plurality of positioning holes having a diameter slightly larger than the diameter of the diode chip on the loader plate; Covering the gap between the diode chip and the wall of the positioning hole with glass, and positioning the diode chip on the loader plate by removing the stencil plate. The method for manufacturing a silicon semiconductor diode chip according to any one of claims 8 to 12. 14. The method according to claim 1, further comprising the step of cleaning glass coated on the surface of the diode chip except for the cut surface of the diode chip. 13. The method for producing a silicon semiconductor diode chip according to the above item. 15. The glass for passivation,
The method for manufacturing a silicon semiconductor diode chip according to any one of claims 8 to 12, wherein the cut surface is coated by injection. 16. The method according to claim 15, further comprising the step of burning off the adhesive. 17. The P of the silicon semiconductor diode chip
The method of claim 15, further comprising forming a nickel or metal thin film on the side or the N side by chemical plating.