TWI529972B - Glass passivated semiconductor diode chip and manufacturing method thereof - Google Patents

Description

Semiconductor diode chip with protective body and manufacturing method thereof

The present invention relates to a semiconductor diode wafer and a method of fabricating the same, and more particularly to a semiconductor diode wafer having a protective body and a method of fabricating the same.

In the manufacture of semiconductor rectifying diodes, the industry has always adopted the most cost-effective standard diffusion method to produce rectified diode chips. Generally, the two sides of a single wafer (Silicon Wafer) doped with low concentration impurities are separately diffused and doped with impurities such as phosphorus and arsenic (such as phosphorus, arsenic, etc.) and trivalent impurity (such as boron, aluminum, and gallium). Etc.) to form a positive and negative electrode surface with a PN junction surface and low surface resistance. Thereafter, a metal film (such as nickel, aluminum, etc.) having an ohmic contact is formed on the surface of the wafer, which is suitable for different types of soldering processes, such as tin-lead solder materials for soldering, or The aluminum is melt-welded to be connected to the conductive member.

The silicon wafer is cut into a wafer of a certain size and shape according to the required size of the rectified diode chip, and the cutting surface is chemically etched to remove the mechanical damage and pollution caused by the cutting. At the same time, a ruthenium dioxide film is formed on the surface of the ruthenium crystal to obtain good reverse electrical characteristics. The processing of the wafer portion is completed by applying a Junction Passivation and Coating to the finished cutting surface.

In the preparation of diode chips, there are three main types of design and construction methods:

(1) The diode wafer is diced into a wafer, and the wafer is soldered to the electrical conductor to be a semi-finished part, and then chemical processing and passivation of the wafer cut surface are performed. Such as the early development of the wafer electrode rectifier diode package of Westinghouse (Sandwich Cell Construction), Axial Lead Plastic Molded Package, etc. are all included.

(2) The rectified diode wafer of the aluminized film is cut into a truncated cone-shaped wafer by sandblasting or the like. The wafer is further chemically etched at a low temperature with a mixture of hydrofluoric acid and nitric acid as a main agent, and a ruthenium oxide ruthenium dioxide film is formed. The chemically processed wafer is soldered to the electrical lead to form a semi-finished part. For the welding of electrical conductors, such as electrodes made of materials with thermal expansion coefficient such as tungsten or molybdenum, the aluminum film is used as the welding material for the brazing joint; while the electrical conductors of the copper material are generally available for the copper. , silver, phosphorus alloy welding consumables, and the electrode is brazed. Thereafter, the wafer was chemically treated twice, and coated with a passivating glass sealant to form a protective layer. This design was developed by General Electric and patented.

(3) After the diffusion of the wafer is completed, the photoresist is coated with a photoresist, and selective local chemical etching is performed to form a trench formed by the opening of the P-plane, and the PN junction is etched to form a half-cut of the individual wafer. Type of semi-wafer component. The passivation process and the glass seal are continuously applied to the half-cut wafer to complete the construction of the wafer half-section. Finally, a metal-coated metal film and a wafer are separated and cut to form a glass-shielded rectifying diode wafer (Glass Passivated Pellet GPP).

GPP has better performance than the diode package, so GPP is still widely used in various types of rectifier diodes (Rectifier Circuit Moldules). For example, Bridge Rectifiers and the like. In addition, Small Outline Diode (SOD) rectifying diodes are also produced by this method.

Although the conventional GPP method is currently the most excellent packaged rectifying diode chip, its disadvantages are still many. For example, since the GPP has a half-cut form of a P-face opening, the cut angle of the P-N joint surface is a Negative Beveld Cut. In the case of the reverse voltage load, the Depletion Region forms a reverse electric field between the N-section and the sealant junction, and expands in the joint direction. In the design of the wafer, the position of the depletion zone of sufficient size must be retained. The result is that a larger area of the wafer must be used, and its forward load power can be equivalent to vertical cutting or Wafer made by positive angle cutting. This will increase the manufacturing cost of the wafer.

Secondly, wafers made by the GPP method are not easy to obtain high reverse voltage resistance, and are also disadvantages of this method. Moreover, the process of the GPP method requires high equipment investment and high operating costs, so that its indirect manufacturing cost is also high. Finally, the wafer produced by this method inevitably causes mechanical damage to the glass film during the separation and cutting, forming micro cracks and causing stress concentration. This phenomenon becomes a very serious Operation Failure Source in application work. Although the industry has made many efforts to improve the above shortcomings, the results are still very limited. Accordingly, the present inventors have felt that the above problems can be improved, and that the present invention has been deliberately studied and used in conjunction with the theory, and a present invention which is reasonable in design and effective in improving the above problems has been proposed.

The main object of the present invention is to provide a method for fabricating a semiconductor diode wafer and a semiconductor diode chip having the same, which can protect the entire peripheral surface of the germanium semiconductor diode. Good electrical performance, but can fully solve the lack of GPP law.

In order to achieve the above object, the present invention provides a method of fabricating a semiconductor diode wafer, comprising the steps of: providing a wafer; forming a protective film on the front and back sides of the wafer; and cutting the wafer to form a plurality of wafers, each The wafer includes a wafer body including an upper surface, a lower surface, and a peripheral surface adjacent to the upper surface and the lower surface, and the upper surface and the lower surface have a protective film; planarizing the peripheral surface of each wafer; The spacers are arranged in a fixture; the fixture is filled with a protective agent and filled between the wafers; and the sealing agent in the soft baking fixture is used to form a sealing agent between the wafers as a protective film. Cutting the protective film to form a plurality of wafer units, the upper surface and the lower surface of the wafer body of each wafer unit having a protective film, and the peripheral surface of the wafer body has a protective film; the sealing film of each wafer unit is sintered Curing into a protective cover; removing the protective film of each wafer unit to expose the upper surface and the lower surface of the wafer body of each wafer unit; the upper surface of the wafer body of each wafer unit and the lower surface A positive electrode metal film and formed a negative electrode metal film, to form a body having a jacket Semiconductor diode chip.

In order to achieve the above object, the present invention provides a semiconductor diode wafer having a protective body comprising a wafer body and a shield. The wafer comprises an upper surface, a lower surface and a peripheral surface adjacent to the upper surface and the lower surface; the upper surface and the lower surface respectively form a positive metal film and a negative metal film. The shield is formed on the peripheral surface of the wafer to cover the surrounding surface.

The semiconductor diode of the present invention having the protective body and the manufacturing method thereof have the following beneficial effects:

1. The method for fabricating a semiconductor diode wafer of the present invention can effectively form a protective body on the peripheral surface of each wafer by using a simple and inexpensive device, thereby effectively reducing the production cost of the conventional technology. And can effectively simplify the complicated process steps of the prior art.

2. The method for fabricating a semiconductor diode wafer of the present invention can produce a semiconductor diode chip having a protective body having good electrical properties, high reverse voltage resistance and low leakage current, and Widely used in the production of various rectifier diodes and various rectifier diode modules (Rectifier Circuit Modules), such as rectifier bridges (Bridge Rectifiers), etc., can also be applied to small outline diodes (Small Outline Diode, SOD).

3. In the method for fabricating a semiconductor diode wafer of the present invention, the protective body of each wafer is separately sintered, and there is no need to cut again in the subsequent steps, so that the conventional technique can be effectively solved, because the protective cover needs to be again The cutting causes the protective body to cause mechanical damage and micro-cracking problems; and the present invention can thereby obtain a semiconductor diode wafer with little residual stress.

In order to further understand the techniques, methods and effects of the present invention in order to achieve the intended purpose, reference should be made to the detailed description and drawings of the present invention. It is to be understood that the appended claims are not intended to

1‧‧‧ wafer

2‧‧‧ wafer unit with protective body

3‧‧‧Semiconductor diode wafer with protective body

10‧‧‧ wafer

100‧‧‧chip body

101‧‧‧ upper surface

102‧‧‧lower surface

103‧‧‧ surrounding surface

20‧‧‧Protective film

30‧‧‧ fixture

40‧‧‧Guarding agent

41‧‧‧ protective film

42‧‧‧ protective enclosure

51‧‧‧positive metal film

52‧‧‧Negative metal film

60‧‧‧ Nickel layer

61‧‧‧Deuterated nickel layer

A-a, b-b‧‧‧ cutting line

S1~S11‧‧‧ Process steps

1 is a schematic flow chart of a first embodiment of a method of fabricating a semiconductor diode wafer of the present invention.

2 is a cross-sectional view of a wafer having a protective film according to a first embodiment of the method of fabricating a semiconductor diode wafer of the present invention.

3 is a cross-sectional view showing a wafer cut by a wafer according to a first embodiment of the method for fabricating a semiconductor diode of the present invention.

4 is a cross-sectional view showing the planarization of the peripheral surface of the wafer of the first embodiment of the method for fabricating a semiconductor diode of the present invention.

Fig. 5 is a top plan view showing a plurality of wafers of the first embodiment of the method for fabricating a semiconductor diode of the present invention disposed in a jig.

6 is a schematic cross-sectional view showing a plurality of wafers disposed in a jig and surrounded by a protective film according to a first embodiment of the method for fabricating a semiconductor diode wafer of the present invention.

Fig. 7 is a schematic cross-sectional view showing a protective body formed on a peripheral surface of a wafer body according to a first embodiment of the method for fabricating a semiconductor diode of the present invention.

Figure 8 is a cross-sectional view showing a first embodiment of a semiconductor diode wafer having a protective body of the present invention.

Fig. 9 is a cross-sectional view showing a second embodiment of a method for fabricating a semiconductor diode wafer according to the present invention, in which a protective layer is formed on a peripheral surface of a wafer body, and a nickel layer is formed on the upper and lower surfaces.

Fig. 10 is a cross-sectional view showing a second embodiment of a method for fabricating a semiconductor diode wafer according to the present invention, in which a protective layer is formed on a peripheral surface of a wafer body, and a nickel-deposited nickel layer is formed on the upper and lower surfaces.

Figure 11 is a cross-sectional view showing a second embodiment of a semiconductor diode wafer having a protective body of the present invention.

[First Embodiment]

Please refer to FIG. 1 to FIG. 8 , which are schematic flowcharts and cross-sectional views of a method for fabricating a semiconductor diode wafer according to the present invention. As shown in FIG. 1, the semiconductor diode wafer fabrication method includes the following steps:

Step S1: providing a wafer 10; for example, the wafer is a rectified diode wafer that is diffused by a P-N layer through a Standard Diffusion Process.

Step S2: As shown in FIG. 2, a protective film 20 is formed on the front and back surfaces of the wafer 10. For example, the protective film may be a photoresist film for protecting the surface grain of the wafer 10 in a subsequent step without being damaged or eroded; preferably, the protective film may be formed by spin coating. 20 is uniformly applied to the front and back surfaces of the wafer 10, and may be appropriately matched with steps of soft baking, exposure, and hard baking to ensure that the protective film 20 can be stably formed on the front and back surfaces of the wafer 10.

Step S3: As shown in FIG. 2, the wafer 10 is cut at an appropriate interval (the dotted line aa in the figure is a cutting line) to form a plurality of wafers 1 (as shown in FIG. 3); each wafer 1 includes a wafer body 100, which The upper surface 101, the lower surface 102 and a peripheral surface 103 adjacent to the upper surface and the lower surface are included; wherein the upper surface 101 and the lower surface 102 are respectively covered by the protective film 20 without being exposed, and the peripheral surface 103 is the wafer 10 The cut surface is exposed without any structural protection. In practical applications, the cutting method can be selected according to the material of the wafer, the shape to be formed after the wafer is cut (for example, a truncated cone shape, a rounded square frustum shape or a rounded hexagonal frustum); for example; It can be performed by chemical etching or sand blasting, and the shape of the cut wafer can be naturally formed into a frustum type, and if the N surface of the wafer 10 is applied, the tangent angle can be naturally obtained. Wherein, according to the selected cutting mode, the wafer body 100 The surrounding surface 103 has varying degrees of roughness.

Step S4: As shown in FIG. 4, the peripheral surface 103 of the wafer body 100 of each wafer 1 is flattened. For example, it may be carried out by chemical etching or sand blasting; preferably, it may be carried out by pickling. Specifically, when the wafer 10 is diced in the step S3, the respective cut surfaces of the wafer 10 (that is, the peripheral surface 103 of each wafer body 100) may have rough, fine cracks, and poor lattice irregularity. And through the flattening (for example, pickling) process of the step, the roughness, the fine crack, and the poor lattice irregularity can be eliminated, and the peripheral surface 103 of each wafer body 100 is smooth and flat. Further, it is ensured that the seal body formed on the peripheral surface in the subsequent step can be tightly bonded to the peripheral surface of the wafer body. For example, a chemical etching cutting operation may be performed by using a mixture of hydrofluoric acid and nitric acid as a main agent, and a ceria film may be formed on the peripheral surface 103 of each wafer body 100 during the planarization process; Alternatively, chemical etching may be performed using a mixture of potassium hydroxide as a main component, and a hafnium oxide film may be formed on the peripheral surface 103 of each wafer body 100 during the planarization process. Wherein, in the process of planarization, the crystal grains of the upper surface 101 and the lower surface 102 of each wafer body 100 can be protected by the protective film 20 from being destroyed by the relevant chemical etching liquid.

Step S5: The wafers 1 are arranged in a row at a jig 30. For example, the fixture 30 can accommodate a slot, and the interior thereof can have a plurality of positioning members for fixing the respective wafers 1, for example, by vacuum adsorption or by means of adhesive.

Step S6: As shown in FIG. 5, a sealing agent 40 is filled in the jig 30 between the wafers 1. Wherein, the sealing agent 40 may be a blending paste of passivated glass frit with water or a vehicle agent or may be selected according to requirements. In practical applications, in order to completely fill the wafer 40 In one case, an excessive amount of the sealing agent 40 may be filled before the jig 30, and the excess sealing agent 40 on the upper surface of each wafer 1 is scraped off in cooperation with the blade to ensure that the sealing agent 40 is completely filled. 1 wafer.

Step S7: As shown in FIG. 6, a sealing agent (not shown) filled in the peripheral surface 103 of each wafer 1 is soft baked to preliminarily cure the sealing agent into the protective film 41 to facilitate subsequent cutting operations.

Step S8: As shown in FIG. 6, the protective film 41 is cut according to an appropriate interval (for example, bb is a cutting line shown in the drawing) to form a plurality of wafer units (not shown); The surface 101 and the lower surface 102 are respectively formed with a protective film 20, and the peripheral surface 103 is also protected by a protective film 41, that is, all surfaces of each wafer body 100 are covered by a film body.

Step S9: As shown in FIG. 7, the sealing film of the wafer unit having the protective film on each peripheral surface is sintered and cured into a protective body 42 to become the wafer unit 2 having the protective body, even if each wafer body 100 The upper surface 101 and the lower surface 102 are respectively formed with a protective film 20, and the peripheral surface 103 is formed with a protective cover 42. Among them, by high-temperature sintering, the filler or impurities in the original sealant (film) can be simultaneously removed, and the passivation glass can be recombined to be more tightly bonded to the peripheral surface 103 of the wafer body 100. In practical applications, each of the wafer units 2 having the protective cover can be made smoother by the method of oscillating cleaning to make the surface of the protective cover 42 smoother.

Step S10: The protective film 20 of each wafer unit 2 having the protective body is removed to expose the upper surface 101 and the lower surface 102 of the wafer body 100 of each wafer unit 2.

Step S11: As shown in FIG. 8, a positive metal film 51 and a negative metal film 52 are respectively formed on the upper surface 101 and the lower surface 102 of the wafer body 100 of each wafer unit to form a semiconductor diode having a protective body. Body wafer 3. The positive electrode metal film 51 and the negative electrode metal film 52 may be metal films having an ohmic contact, such as an aluminum plating film, a nickel plating film, or a gold secondary plating film.

The semiconductor diode chip 3 having the protective cover formed by the above process steps can be subsequently tested, sorted, and packaged into industrial specifications. It can be round, conical, rounded, six-sided frustum, rounded square, rounded hexagon or other suitable shape. The completed finished product has a smooth glass cover, which is conducive to subsequent construction, such as automatic feeding and fixture positioning.

As shown in FIG. 8 , it is a semiconductor diode chip 3 having a protective body of the present invention, comprising: a wafer body 100 and a shield 42 . The wafer body 100 includes an upper surface 101, a lower surface 102, and a peripheral surface 103 adjacent to the upper surface and the lower surface. The upper surface 101 and the lower surface 102 are respectively formed with a positive metal film 51 and a negative metal film 52. The surrounding surface 103 is formed with a shield 42.

[Second embodiment]

Referring to FIG. 9 to FIG. 11 together, in practical applications, when gold is selected as the positive electrode metal film 51 and the negative electrode metal film 52, since gold and germanium have relatively poor bonding, they can be on the upper surface of the wafer body 100. And the lower surface 102 is formed as a nickel layer 60 for bonding with the gold to facilitate the bonding between the metal film and the wafer body 100. The relevant step may be after the step S10 in the foregoing embodiment, the steps are as follows: S101: As shown in FIG. 9, a nickel layer 60 is formed on the exposed upper surface 101 and the lower surface 102 of the wafer body 100 respectively; Step S102: as shown in FIG. 10, the upper surface of the wafer body 100 is formed by high-temperature sintering. A nickel-deposited nickel layer 61 is formed between the 101 and the nickel layer 60, and a lower layer 102 of the wafer body 100 is also formed with a nickel-deposited layer 61 between the nickel layer 60. The nickel layer 60 can be more tightly bonded to the upper surface 101 and the lower surface 102 of the wafer body 100.

As shown in FIG. 11, then in step S11, a positive electrode metal film 51 (particularly a metal film containing a gold element) is formed directly on the nickel layer 60 of the upper surface 101 of the wafer body 100, and the wafer body 100 is formed on the wafer body 100. The negative electrode metal film 52 is formed on the nickel layer 60 of the lower surface 102.

[Possible effects of the implementation of the present invention]

1. A semiconductor diode wafer having a sheath body produced by the method for fabricating a semiconductor diode wafer of the present invention has excellent electrical and mechanical properties.

2. A semiconductor diode wafer having a sheath body produced by the method for fabricating a semiconductor diode wafer of the present invention has a remarkable effect on improvement in reverse pressure resistance and reduction in leakage current.

3. Compared with the conventional method, a plurality of wafers are simultaneously formed into a protective body, and then the sealing of the individual wafers is performed. The method for fabricating the semiconductor diode wafer of the present invention, the protective layer formed on the peripheral surface of each wafer The individual wafers are individually sintered, so that each wafer is formed with a protective body, and no cutting operation is required, thereby avoiding problems such as mechanical damage or micro-cracks caused by the cutting of the sealing body, and A wafer with relatively little residual stress can be obtained.

4. The method for fabricating a semiconductor diode wafer of the present invention can be mass-produced using a simple and inexpensive device, which is sufficient to reduce the cost of raw materials and can effectively simplify the complicated steps of the conventional method.

5. The method for fabricating a semiconductor diode wafer of the present invention and the semiconductor diode chip having the sheath body, which can be widely applied to various types of rectifier diodes and rectifiers of various types. Rectifier Circuit Modules, such as Bridge Rectifiers, can also be applied to Small Outline Diodes (SOD).

However, the above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of patent protection of the present creation, so the equivalent of using the present specification and the content of the schema is used. Changes are all included in the scope of protection of this creation and are given to Chen Ming.

S1~S11‧‧‧ Process steps

Claims (5)

A method for fabricating a semiconductor diode wafer, comprising the steps of: providing a wafer; forming a protective film on the front and back sides of the wafer; and cutting the wafer to form a plurality of wafers, each of the wafers comprising a wafer body The wafer body includes an upper surface, a lower surface, and a peripheral surface adjacent to the upper surface and the lower surface, and the upper surface and the lower surface have the protective film; the peripheral surface of each of the wafers is planarized; Arranging each of the wafers in a jig; the jig is filled with a protective agent and filled between the wafers; the sealing agent in the jig is soft baked to make each of the wafers The protective agent is formed as a protective film; the protective film is cut to form a plurality of wafer units, and the upper surface and the lower surface of the wafer body of each of the wafer units have the protective film, and the wafer body The surrounding surface has the protective film; the protective film of each of the wafer units is sintered and cured into a protective body; the protective film of each of the wafer units is removed to expose the wafer body of each of the wafer units Upper surface and lower Face; and the bulk of the wafer in each of the die units of the upper surface and the lower surface of a positive electrode metal film and formed a negative electrode metal film to form a semiconductor diode chip having a jacket body. A method of fabricating a semiconductor diode wafer according to claim 1, wherein the sealant is made of passivated glass frit. The method of fabricating a semiconductor diode wafer according to claim 1, wherein the wafer has a circular shape, a rounded square shape or a rounded hexagon shape. The method for fabricating a semiconductor diode wafer according to claim 1, wherein the positive electrode metal film and the negative electrode metal film are aluminum plating film, nickel, silver plating film or gold secondary plating film, and the protective film is a photoresist film. The method of fabricating a semiconductor diode according to claim 1, wherein after the step of removing the protective film of each of the wafer units, the method further comprises the step of: forming the upper surface of the wafer body of each of the wafer units And the lower surface is respectively plated with a nickel layer; and the high temperature sintering is performed to form a nickel ruthenium layer between each of the nickel layers and the upper surface and the lower surface.