JPH05335600A - Diode element - Google Patents

Abstract

PURPOSE:To avoid separation of metal of a diode element to improve reliability by diffusing impurity layer of the one conductivity type to the one surface of a semiconductor substrate and then diffusing impurity layer of the opposed conductivity type and semiconductor growth layer of the opposed conductivity type on the other surface. CONSTITUTION:After an N type substrate semiconductor substrate 1 is heated and then a thermally oxide film 2 is formed on the rear surface BCl3 is diffused to the front surface to form a P<+> layer 3 and a thermally oxide film 2 is then formed thereon. Next, after the thermally oxide film 2 is removed from the rear surface, POCl3 is diffused to form an N<+> layer 4 in high concentration. Next, after a As-doped epiaxial layer 5 is grown on the N<+> layer 4, the oxide film is removed entirely and a nickel plated layer is formed to both front rear surfaces and sintering is carried out to form a nickel silicide layer 6. After unwanted nickel is removed, the nickel plated layer 7 is formed again and a gold plated layer 8 is then formed thereon.

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION The present invention relates to a diode element,
In particular, the present invention relates to a diode element in which peeling of metal plating layers as electrodes formed on the front and back surfaces is prevented and reliability is improved.

[0002]

Conventionally, this type of diode, as shown in the sectional view of the manufacturing process in FIG. 3, first, as shown in FIG. 3 (a), N ^- on the front and back surfaces of the mold substrate 1 by thermal oxidation After the oxide film is grown to about 1 μm, only the oxide film 2 on the back surface is left and the front surface is removed. Subsequently, BCl ₃ of about 50 Hr is diffused from the surface at about 1250 ° C. to form a P ⁺ layer 3 having a thickness of 40 μm to 50 μm. Further, as shown in FIG. 3B, a thermal oxide film is formed again, and the entire back surface is removed leaving only the oxide film 2 on the front surface.
Then, POCl ₃ of about 5 Hr is diffused on the back surface at about 1250 ° C. to form an N ⁺ layer 4 having a thickness of about 20 μm to 25 μm.

Next, as shown in FIG. 3C, the oxide film is entirely removed, and nickel plating is simultaneously applied to the entire front and back surfaces by electroless plating, and thereafter sintering is performed to form the nickel silicide layer 6. Form. Then, after removing the excess nickel layer by etching, the nickel plating layer 7 is applied again on the front and back surfaces, and the gold plating layer 8 is further formed by the electrolytic plating method. After that, it is cut into pieces of a desired size with a wire saw, cut with a mixed solution of hydrofluoric acid and nitric acid, the side surfaces are etched, and then mounted in a predetermined package.

[0004]

In the conventional diode element described above, the high concentration layer of POCl ₃ forming the back surface N ⁺ layer 4 and the nickel plating layer 7 chemically react with each other, which is generally called a blackening phenomenon. Cause a physical change. This change becomes more severe with the passage of time, and there is a problem that metal peeling occurs from the silicon surface and the nickel surface, resulting in deterioration of electrical characteristics. An object of the present invention is to provide a diode element with improved reliability by avoiding metal peeling of the diode element.

[0005]

A diode element according to the present invention comprises an impurity layer of one conductivity type diffused and formed on one surface of a semiconductor substrate, and an impurity layer of opposite conductivity type diffused and formed on the other surface. , And a semiconductor growth layer of the opposite conductivity type formed on the other surface. For example, a BCl ₃ impurity layer is formed on one surface of an N-type semiconductor substrate, and PO is formed on the other surface.
The semiconductor growth layer has an impurity layer of Cl ₃ and is composed of an epitaxial growth layer or a polysilicon layer heavily doped with As.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings. FIG. 1 is a sectional view showing a first embodiment of the present invention in the order of manufacturing steps. First, as shown in FIG. 1A, the N-type substrate semiconductor substrate 1 is heated at a temperature of about 1000 ° C. to form a thermal oxide film 2 of about 1 μm on the entire front and back surfaces. And the oxide film 2 on the back surface
The thermal oxide film on the surface is completely removed, leaving 12
BCl _{3 is} diffused for about 50 hours at about 50 ℃ and the thickness is 40μm.
A P ⁺ layer 3 of about 50 μm is formed. Then, FIG.
As shown in (b), the oxide film 2 is again formed on the entire front and back surfaces by the thermal oxidation method, the oxide film on the back surface is completely removed, and then POCl _{3 is} diffused at about 1250 ° C. for about 5 hours to obtain a thickness of 20 μm. twenty five
A high concentration N ⁺ layer 4 of μm is formed.

Further, as shown in FIG. 1C, this N ⁺ layer 4
An epitaxial layer 5 with a concentration of 1 × 10 ¹⁹ cm / □ or more doped with As is grown thereon to a thickness of about 1 μm to 2 μm. Thereafter, as shown in FIG. 1D, the oxide film is entirely removed, a nickel plating layer is formed on the entire front and back surfaces by electroless plating, and sintering is performed to form a nickel silicide layer 6. After the silicide layer is formed, excess nickel is removed by etching and the entire front and back surfaces are 1 μm-
A nickel layer 7 having a thickness of about 2 μm is formed. After the nickel layer 7 is formed, the gold plating layer 8 having a thickness of about 2 μm to 5 μm is formed by electrolytic plating.

Then, after cutting into pieces of a desired size with a wire saw, a mixed solution of hydrofluoric acid and nitric acid is used for 10 seconds to
It is etched for 15 seconds, washed in running water, and then replaced with alcohol. The diode element formed in this manner has the epitaxial layer 5 of As highly doped on the N ⁺ layer 4 of POCl ₃ diffusion provided on the back surface. There is an advantage that the metalization phenomenon is not generated, metal peeling from the blackening phenomenon portion is prevented, and good electrical characteristics and stable yield are maintained.

Next, a second embodiment according to the present invention will be described with reference to manufacturing process sectional views of FIGS. In this embodiment, FIG.
As shown in (a) and (b), the same procedure as in the first embodiment is performed until the N ⁺ layer 4 of POCl ₃ diffusion is formed on the back surface.
After that, as shown in FIG. 2 (c), a glass layer doped with As is deposited on the back surface, and 2 μm at a temperature of about 1000 ° C.
As is pushed into the As diffusion layer 9 until the thickness becomes 3 μm. After that, the same procedure as in the first embodiment is performed, and as shown in FIG.
To obtain the diode element. Also in this embodiment, the first
Although the same effect as the embodiment can be obtained, there are advantages that the working process can be further shortened and the manufacturing cost can be reduced. The epitaxial layer of the first embodiment and the As push layer of the second embodiment may be formed of polysilicon thin film layers.

[0010]

As described above, according to the present invention, since the epitaxially grown layer of As highly doped is provided on the N ⁺ layer formed by diffusing POCl ₃ on the back surface of the diode element, There is no blackening phenomenon that occurs when the ⁺ layer directly reacts with the plating layer, metal peeling from the blackening portion is prevented, and good electrical characteristics and stable yield are maintained. There is an advantage that. Further, by forming the As diffusion layer instead of the epitaxial layer, there is an advantage that the working process can be shortened and the manufacturing cost can be reduced.

[Brief description of drawings]

FIG. 1 is a sectional view showing a first embodiment of a diode element of the present invention in the order of manufacturing steps.

FIG. 2 is a cross-sectional view showing a second embodiment of the diode element of the present invention in the order of manufacturing steps.

FIG. 3 is a cross-sectional view showing a conventional diode element in the order of manufacturing steps.

[Explanation of symbols]

1 N-type semiconductor substrate 3 P ⁺ layer 4 N ⁺ layer 5 As high concentration epitaxial layer 6 Nickel silicide layer 7 Nickel plating layer 8 Gold plating layer 9 As diffusion layer

Claims (2)

[Claims] 1. A one conductivity type impurity layer diffused and formed on one surface of a semiconductor substrate, an opposite conductivity type impurity layer diffused and formed on the other surface, and an opposite conductivity type formed on the other surface. Element having a semiconductor growth layer of the type. 2. An epitaxial growth layer in which an impurity layer of BCl ₃ is formed on one surface of a semiconductor substrate and a POCl ₃ impurity layer is formed on the other surface, and the semiconductor growth layer is heavily doped with As. Alternatively, it is a polysilicon layer.
Diode element.