JP3085371B2 - Associative memory search circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a content addressable memory (Conetent A) capable of performing an address search by contents.
ddressable memory).

[0002]

2. Description of the Related Art A conventional associative storage memory is disclosed in
As disclosed in Japanese Patent Application Laid-Open No. 258579 and Japanese Patent Application Laid-Open No. 5-144276, the next search can be performed while the search result output is being processed by simply holding the search result.

FIG. 6 is a block diagram of the prior art, and FIG. 7 is a timing chart of the operation. In this conventional technique, the result output 1 of the CAM 7 based on the search data 107 of the search control 6
11 is only held by the search result holding unit 8.
When the search request signal 601 is input, the counter starts operating, the match signal 602 and the multiple match signal 603 are output, and the search result 111 is held in the search result holding unit 8. However, in this case, since there is a plurality of matches, the result output 112 cannot be updated even though the next search result is output. After the next search request signal 605 is input, the result output 112 is updated. In this case, since there is only a match signal, the search data resumes execution of the counter. However, even if the next search request signal 606 is input, the update of the result output 112 is suspended until the match output signal 607 is output.

As described above, in the prior art, since there is no means for holding the search data and the search data is lost when the counter is operated, the counting operation of the search data is stopped when a plurality of matches occur, and as a result, the search data is not counted. Updates are delayed.

[0005]

In the above-mentioned prior art, the time for updating the search address is not considered. If the search address is generated by an increment counter, if the search result matches a single value with a certain value of the counter, the next search can be performed by simply holding the search result, but if multiple matches occur, Since the search address cannot be updated, the next search cannot be performed, and there is a problem that a search waiting time is required.

[0006] An object of the present invention is to enable a search address to be updated when a search address is generated by an increment-type counter, and even when a plurality of matches occur in a search result with a certain value of the counter. An object of the present invention is to provide an associative memory search circuit capable of reducing time.

[0007]

An associative memory search circuit of the present invention performs a match search between search data and storage data, outputs a match signal when there is match data, and further outputs a plurality of match data. If there is, a CAM that outputs a plurality of match signals and outputs an address as a search result as a search output, and the search output as an input, holds the data by the holding signal, and outputs the held content as a result output A search result holding unit, a search data holding unit that inputs and holds search holding data, and outputs it as old search data, and selects a new search data or the old search data by a switching signal and outputs the same to the CAM as search data. The selection means starts counting operation of the search clock in response to the first search request signal, and counts the count value in the CAM.
And outputs the switching signal so that the selecting means selects the new search data, and outputs the match signal or the multiple match signal. Then, there is a search control unit that outputs the holding signal, outputs the new search data at that time to the search data holding unit, and controls the switching signal until the next search clock.

Since means for holding search data (not an address) is provided, by holding search data, a search can be performed by the held address instead of the output of the counter in the case of multiple matches.

[0009]

Next, embodiments of the present invention will be described with reference to the drawings.

Referring to FIG. 1, an associative memory search circuit according to one embodiment of the present invention includes a search control unit 1, a search data holding unit 2, a selector 3, a CAM 4, and a search result holding unit 5.

The search control unit 1 is constituted by a counter for generating search data, is operated by an operation clock 102, starts a count operation in response to a search instruction 101, and counts when a match signal 103 or a plurality of match signals 104 is generated. Stop operation. The search data holding unit 2 is constituted by a latch circuit, and the search holding data 10
When 8 is output, it is retained and output as old search data 109. The selector 3 selects the search data 107 or the old search data 108 according to the switching signal 106 and outputs the selected data as a select output 110. The CAM (associative memory) 4 searches for an address having the select output 110 as data, outputs a matched address as an address output 111, and outputs a matched output 104 when there is one matching address. If there are multiple matches, a multiple match output 104 is output. The search result holding unit 5 is configured by a latch, latches a dress output 111 according to the holding signal 105, and outputs it as a result output 112.

FIGS. 2 (1), (2) and (3) are flowcharts showing the processing of the search control unit 1. Figure (1),
The processes of (2) and (3) operate independently.

First, it is checked whether the match output 103 or the multiple match output 104 has been output (step 50).
1). If any of them has been output, it is checked whether or not the search result is busy, that is, whether or not the search result holding unit 5 has output the search result by the internal flag (step 502). If no search result is given, search data 1
08 in the search data holding unit 2 (step 50).
3). If the search result is output, the previous match when the CAM 4 is connected is checked (step 504). If there is only one match, the search data 108 is held in the search data holding unit 2 (step 505). Next, the counting operation of the output clock (search clock) 102 is started (step 506). Next, it waits until there is a search request 101 (step 507). When there is a search request 101, a switch signal 106 for selecting the old search data is output (step 5).
08). The search result 111 is stored in the search result storage unit 5 (step 509). Next, the counting operation is started in steps 516 and 517, but is stopped, so the counting operation is started (step 510). Next, it is checked whether there is a plurality of matches (step 511). The previous match type is set according to the result (steps 513 and 514). Return to the beginning.

Next, the operation of this embodiment will be described with reference to a timing chart.

FIG. 3 is a timing chart when the number of search results is one. The search control unit 1 starts the counting operation in response to the signal 201 of the search instruction 101, and the value 107
Is input to the CAM 4 as the select output 110. C
The AM 4 performs a search as needed, and outputs a signal 202 of the match signal 103 when there is matching data. Upon receiving the match signal 103 (signal 202), the search control unit 1 outputs the holding signal 105 (signal 203), and the search result holding unit 5
Holds the address output 111 as the search output 112. The search output 112 is arranged by a higher-level control device (not shown), and when the processing is completed, the signal 2 of the search instruction 101 is again output.
04 occurs.

FIG. 4 is a timing chart in the case where the search results match continuously. The search control unit 1 starts the counting operation in response to the signal 301 of the search instruction 101, and the value is input to the CAM 4 as the select output 110. The CAM 4 performs a search at any time, and outputs a signal 302 of the match signal 103 when there is matching data. Search control unit 1 receiving a match signal (signal 302)
Outputs the holding signal 105 (signal 303), and the search result holding unit 5 holds the address output 111 as the search output 112. The search output 112 is processed by the host controller. On the other hand, the search control unit 1
Is output as the search holding data 108 and held by the search data holding unit 2, and the counting of the search data 107 is executed again until the next occurrence of the coincidence signal. CAM4
Performs a search at any time, so when a match occurs, a match signal 1
03 signal 304 is generated. The search control unit 1 receiving the signal 304 holds the search data 107 as the signal 305 of the old search data 109. At this point, the result output 1
Since the processing of 12 is continued in the host device, the search result 111 is not held in the search result holding unit 5. When the processing of the result output 112 in the host device ends, a signal 306 of the search request 101 is generated from the host device. This signal 3
06, the search control unit 1 controls the switching signal 106 and reselects the old search data 109 to the select output 110.
To CAM4 (signal 307). The CAM 4 executes a search, and outputs the search result 111 as a result output 112 to the host device. That is, instead of restarting the count operation after receiving the search request 101, the count operation is performed in advance, so that the search result 111 can be output quickly.

FIG. 5 is a timing chart when a plurality of search results match. The search control unit 1 searches for the search request 1
The count operation is started by the signal 401 of 01, and the value 107 is input to the CAM 4 as the select signal 110. The CAM 4 performs a search as needed, and outputs a signal 402 of the coincidence signal 103 and a signal 403 of the plural coincidence 104 when there is a plurality of coincident data. Upon receiving the match signal (signal 402) and the multiple match signal (signal 403), the search control unit 1 outputs the holding signal 105 (signal 4).
04). The search result holding unit 5 holds the address output 111 as the search output 112. The search output 112 is processed by the host controller. On the other hand, the search control unit 1 outputs the previous search data 107 as the search holding data 108, holds the search data 107 in the search data holding unit 2, and then counts the search data 107 again. When the processing of the result output 112 in the host device is completed, the search request 1
A signal 405 of 01 is generated. Upon receiving this signal 405, the search control unit 1 controls the switching signal 106, and the selector 3 reselects the old search data 109 to the select output 110.
Is input to the CAM4 (signal 307). The CAM 4 executes a search and outputs the search result 111 as a result output 112 to the host device. During this time, the search control unit 1 continues to perform the counting, and the signal 4 of the match signal 103 is output.
07 is monitored. That is, even when a plurality of matches occur, the output of the search result 111 can be quickly performed by performing the count operation in advance, instead of restarting the count operation after receiving the search request 101.

[0018]

As described above, according to the present invention, when the search address is generated by the increment type counter,
Even when a plurality of matches of the search result occur with a certain value of the counter, the search address can be updated, and the CAM can be updated.
Search waiting time can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram of a content addressable memory search circuit according to an embodiment of the present invention.

FIG. 2 is a flowchart showing an operation of the associative memory search circuit of FIG. 1;

FIG. 3 is a timing chart for explaining the operation of the associative memory search circuit of FIG. 1;

FIG. 4 is a timing chart for explaining the operation of the associative memory search circuit of FIG. 1;

FIG. 5 is a timing chart for explaining the operation of the content addressable memory search circuit of FIG. 1;

FIG. 6 is a block diagram of a conventional associative memory search circuit.

FIG. 7 is a timing chart for explaining the operation of the associative memory search circuit of FIG. 6;

[Explanation of symbols]

 1 Search control unit 2 Search data holding unit 3 Selector 4 CAM 5 Search result holding unit 101 Search data 102 Operation lock 103 Match signal 104 Multiple match 105 Holding signal 106 Switching signal 107 New search data 108 Search holding data 109 Old search data 110 Search Data 111 Search result 112 Result output 201 Search request signal input 202 Match signal output 203 Hold signal output 204 Search request signal input 301 Search request signal input 302 Match signal output 303 Hold signal output 304 Match signal output 305 Old search data holding state 306 Search Request signal input 307 Select output state 401 Search request signal input 402 Match signal output 403 Multiple match signal output 404 Hold signal output 405 Search request signal input 406 Select output state 407 Match signal Power 501-517 step 601 the search request signal input 602 matches the signal output 603 a plurality coincidence signal output 604 holds the signal output 605 search request input 606 search request input 607 coincident signal output

Claims (3)

(57) [Claims] 1. A match search between search data and storage data is performed. If there is match data, a match signal is output. If there is a plurality of match data, a multiple match signal is output. A CAM that outputs an address as a search result as a search output, a search result holding unit that inputs the search output, holds the search output by the holding signal, and outputs the held content as a result output, Search data holding means for inputting and holding the same and outputting the same as old search data; selecting means for selecting new search data or the old search data by a switching signal and outputting the selected search data to the CAM as search data; A search clock count operation is started by a signal, and the count value is used as the new search data for performing a new search in the CAM. Means, and outputs the switching signal so that the selecting means selects the new search data, and outputs the holding signal when the match signal or the multiple match signal is output. The associative memory search circuit having a search control means for outputting the new search data to the search data holding means and controlling the switching signal until the next search clock. 2. The associative memory search circuit according to claim 1, further comprising search control means for preventing the holding signal from being output in the next match signal when a plurality of match signals are output. 3. The method according to claim 1, wherein the switching signal selects the new search data after one coincidence output or the multiple coincidence output is generated and the next coincidence output or the multiple coincidence output is generated next time. 3. The associative memory search circuit according to claim 1, further comprising search control means for preventing the counting operation from stopping.