JP3078773B2 - Electronic component and method of manufacturing the same - Google Patents

Electronic component and method of manufacturing the same

Info

Publication number
JP3078773B2
JP3078773B2 JP31325997A JP31325997A JP3078773B2 JP 3078773 B2 JP3078773 B2 JP 3078773B2 JP 31325997 A JP31325997 A JP 31325997A JP 31325997 A JP31325997 A JP 31325997A JP 3078773 B2 JP3078773 B2 JP 3078773B2
Authority
JP
Japan
Prior art keywords
resin
chip
bonding wire
opening
semiconductor chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP31325997A
Other languages
Japanese (ja)
Other versions
JPH11145180A (en
Inventor
健 師藤
重幸 鵜木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to JP31325997A priority Critical patent/JP3078773B2/en
Publication of JPH11145180A publication Critical patent/JPH11145180A/en
Application granted granted Critical
Publication of JP3078773B2 publication Critical patent/JP3078773B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/181Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/28Applying non-metallic protective coatings
    • H05K3/284Applying non-metallic protective coatings for encapsulating mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • H05K3/3442Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3452Solder masks

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、金属配線層を有
し、それを絶縁層で被覆した基板における金属ダイパッ
上に半導体チップを載置し、半導体チップと基板上の
金属配線層のボンディングワイヤ接続部とをボンディン
グワイヤで接続し、半導体チップボンディングワイヤ
ボンディングワイヤ接続部とを樹脂で封止した電子部
品およびその製造方法に関するものである。
The present invention relates to a metal die pad on a substrate having a metal wiring layer and covering the same with an insulating layer.
The semiconductor chip is placed on de, Bondin the bonding wire connecting portion of the semiconductor chip and the metal wiring layer on the substrate
TECHNICAL FIELD The present invention relates to an electronic component in which a semiconductor chip , a bonding wire, and a bonding wire connection part are sealed with a resin, and a method of manufacturing the electronic component.

【0002】[0002]

【従来の技術】従来、半導体チップを封止しないで、直
接(ベア)実装するプリント基板を製造する場合には、
プリント基板の表面は半導体チップおよびワイヤをボン
ディングする部分の周囲を除いて、ガラス層からなる絶
縁層が形成されていて、樹脂広がりを制御する構成には
なっていない。したがって、半導体チップの実装には、
つぎのような方法が考えられる。第1の方法は、半導体
チップを樹脂なしで実装する方法である。第2の方法
は、樹脂を使って実装するが、後でチップ部品接着用の
半田ペーストが印刷できなくなるという問題を回避する
ために、樹脂の横広がりを考慮して他の部品の配置を決
めるという方法である。第3の方法は、樹脂を使って実
装するが、この際に粘度の高い樹脂を注射器等で、横広
がりのないように、かつ半導体チップとワイヤがきれい
に覆われるように、注意して滴下するという方法であ
る。
Conventionally, without sealing the semiconductor chip, in the case of manufacturing a printed circuit board to directly (bare) implementation,
The surface of the printed circuit board is provided with an insulating layer made of a glass layer except for a portion around which a semiconductor chip and a wire are bonded, and is not configured to control resin spread. Therefore, when mounting a semiconductor chip ,
The following methods are conceivable. The first method is semiconductor
This is a method of mounting the chip without resin. In the second method, mounting is performed using a resin, but in order to avoid a problem that a solder paste for bonding chip components cannot be printed later, an arrangement of other components is determined in consideration of a lateral spread of the resin. That is the method. In the third method, the resin is mounted using a resin. At this time, a high-viscosity resin is carefully dropped with a syringe or the like so that the resin does not spread laterally and the semiconductor chip and the wire are covered neatly. That is the method.

【0003】以下、従来の電子部品について説明する。
図5(a)は樹脂なしで実装した従来の電子部品の平面
図であり、図5(b)は同図(a)のC−C’線断面図
である。この電子部品は、図5に示すように、プリント
基板1上に、AgPt等で金属配線層2が適宜形成され
ている。また、プリント基板1上には、金属配線層2に
つながる状態にAu等で金属ダイパッド3が形成されて
おり、金属ダイパッド3上に半導体チップ4がダイボン
ド接続されて搭載されている。そして、半導体チップ4
の上面と金属配線層2につながるボンディングワイヤ接
続部10との間がボンディングワイヤ5で接続されてい
る。また、他の相対する2本の金属配線層2につながる
チップ部品搭載パッド11には、各々半田層6が設けら
れ、この半田層6によってチップ部品7がチップ部品搭
載パッド11に接着され、かつ電気的に接続されてい
る。プリント基板1上は、厚さ10〜15μmの金属配
線層保護用のガラス層9で被覆されている。ガラス層9
には、金属ダイパッド3を包囲する開口9Aと、金属配
線層2につながるボンディングワイヤ接続部10を包囲
する開口9Bと、チップ部品載置用の開口9Cとを有し
ている。
Hereinafter, a conventional electronic component will be described.
FIG. 5A is a plan view of a conventional electronic component mounted without resin, and FIG. 5B is a cross-sectional view taken along line CC ′ of FIG. In this electronic component, as shown in FIG. 5, a metal wiring layer 2 made of AgPt or the like is appropriately formed on a printed circuit board 1. Further, on the printed circuit board 1 is in a state connected to the metal wiring layer 2 and the metal die pad 3 is formed of Au or the like, semi-conductor chip 4 on the metal die pad 3 are mounted is connected die bonding. And the semiconductor chip 4
It is connected between Gabon loading wire 5 between the bonding wire connecting portion 10 connected to the top and the metal wiring layer 2. Further, a solder layer 6 is provided on each of the chip component mounting pads 11 connected to the other two opposing metal wiring layers 2, and the chip component 7 is bonded to the chip component mounting pads 11 by the solder layer 6, and It is electrically connected. The printed circuit board 1 is covered with a glass layer 9 for protecting a metal wiring layer having a thickness of 10 to 15 μm. Glass layer 9
Has an opening 9A surrounding the metal die pad 3, an opening 9B surrounding the bonding wire connecting portion 10 connected to the metal wiring layer 2, and an opening 9C for mounting chip components.

【0004】図6(a)は樹脂を用いて実装した従来の
電子部品の平面図であり、図6(b)は同図(a)のD
−D’線断面図である。この電子部品は、図6に示すよ
うに、半導体チップ4とボンディングワイヤ5とボンデ
ィングワイヤ接続部10とを樹脂8で封止したもので、
その他の構成は図5と同様である。
FIG. 6A is a plan view of a conventional electronic component mounted using a resin, and FIG. 6B is a plan view of D in FIG.
It is a sectional view taken along line -D '. The electronic components, as shown in FIG. 6, the sealing the semiconductor chip 4 and bonding wires 5 and the bonding wire connecting portion 10 in the resin 8 ash,
Other configurations are the same as those in FIG.

【0005】[0005]

【発明が解決しようとする課題】上記のような従来例で
は、図5のように、樹脂なしで形成すると、半導体チッ
プ4の耐湿性等の信頼性が低下する。また、図6のよう
に、樹脂8を半導体チップ4の上に形成すると、プリン
ト基板1上を樹脂8が横に広がり、それがチップ部品7
の接着部まで広がると、後でチップ部品接着用に印刷す
るペースト状の半田層6がうまくプリント基板1に印刷
されず、チップ部品7が接着不良になるため、半導体チ
ップ4とチップ部品7の距離を最低2〜3mmとる必要
があるという欠点があった。
In the conventional example as described above, if the semiconductor chip 4 is formed without a resin as shown in FIG. 5, the reliability of the semiconductor chip 4 such as moisture resistance decreases. When the resin 8 is formed on the semiconductor chip 4 as shown in FIG. 6, the resin 8 spreads laterally on the printed circuit board 1, and
When the solder part 6 spreads to the bonding part, the paste-like solder layer 6 to be printed later for bonding the chip parts is not printed well on the printed circuit board 1 and the chip parts 7 become poorly bonded. There was a disadvantage that the distance had to be at least 2-3 mm.

【0006】また、粘度の高い樹脂8を使うと横広がり
は少ないが、逆にうまく広がらず、ある程度の量の樹脂
をプリント基板1上に落とさないと、半導体チップ4お
よびボンディングワイヤ5がきれいに封止されず、樹脂
量を適度にコントロールしなければならないため、作業
性も悪かった。本発明の目的は、半導体チップの樹脂封
止を行うことで高信頼性を確保しつつ、樹脂で封止する
際の樹脂の横広がりを抑制するとともに、樹脂封止時の
作業性を向上させることができる電子部品およびその製
造方法を提供することである。
When the resin 8 having a high viscosity is used, the spread is small, but the resin does not spread well. On the other hand, unless a certain amount of resin is dropped on the printed circuit board 1, the semiconductor chip 4 and the bonding wires 5 are sealed tightly. The workability was also poor because the amount of resin had to be controlled appropriately without being stopped. An object of the present invention is to secure high reliability by performing resin sealing of a semiconductor chip , suppress lateral spread of the resin when sealing with a resin, and improve workability at the time of resin sealing. To provide an electronic component and a method for manufacturing the same.

【0007】[0007]

【課題を解決するための手段】請求項1記載の電子部品
は、基板上に、金属配線層と金属ダイパッドとボンディ
ングワイヤ接続部とチップ部品搭載パッドとが設けら
れ、金属ダイパッド上には半導体チップが搭載され、チ
ップ部品搭載パッドにはチップ部品が搭載され、半導体
チップとボンディングワイヤ接続部とがボンディングワ
イヤにより接続された電子部品であって、 絶縁層が、金
属ダイパッドとボンディングワイヤ接続部とを包囲する
第1の開口部とチップ部品搭載用の第2の開口部とを備
えて金属配線層を覆い、 樹脂が、半導体チップとボンデ
ィングワイヤとを封止するように第1の開口部内に設け
られたことを特徴とする
According to a first aspect of the present invention, there is provided an electronic component comprising a substrate , a metal wiring layer, a metal die pad, and a bonder.
Wiring wires and chip component mounting pads
The semiconductor chip is mounted on the metal die pad,
Chip components are mounted on the
The chip and the bonding wire connection are
An electronic component connected by ears, wherein the insulating layer is made of gold.
Surrounds metal die pads and bonding wire connections
A first opening and a second opening for mounting chip components are provided.
Cover the metal wiring layer and allow the resin to
Provided in the first opening so as to seal the wiring wire.
It is characterized by having been done .

【0008】この構成によると、半導体チップ等の樹脂
封止を行うので、高信頼性を確保することができ、また
樹脂で封止する際に、絶縁層の開口部の段差により樹脂
が横に広がるのを抑制することができる。しかも、比較
的粘度の低い樹脂を使用することができ、作業性が良好
である。請求項2記載の電子部品は、請求項1記載の電
子部品において、絶縁層がガラス層である。
According to this structure, since the semiconductor chip or the like is sealed with a resin, high reliability can be ensured. Further, when the semiconductor chip is sealed with the resin, the resin is laid sideways due to a step in the opening of the insulating layer. Spreading can be suppressed. In addition, a resin having a relatively low viscosity can be used, and workability is good. Electronic component according to claim 2, wherein, in the electronic component according to claim 1, wherein the insulating layer is Ru glass layer der.

【0009】この構成によると、請求項1と同様に作用
する。
According to this configuration, the operation is the same as that of the first aspect.

【0010】[0010]

【0011】[0011]

【0012】[0012]

【0013】[0013]

【0014】[0014]

【0015】 請求項記載の電子部品の製造方法は、金
属配線層と金属ダイパッドとボンディングワイヤ接続部
とチップ部品搭載パッドとが設けられた基板上に、金属
ダイパッドとボンディングワイヤ接続部とを包囲する第
1の開口部とチップ部品搭載用の第2の開口部とを有し
て金属配線層を覆う絶縁層を設け、 金属ダイパッド上に
半導体チップを搭載し、 半導体チップとボンディングワ
イヤ接続部とをボンディングワイヤにより接続し、 樹脂
を半導体チップとボンディングワイヤとを封止するよう
に第1の開口部内に設け、 第2の開口部内のチップ部品
搭載パッドに半田を印刷した後に、チップ部品搭載パッ
ド上にチップ部品を搭載することを特徴とする。
[0015] Claim3The manufacturing method of the described electronic component is gold
Metal wiring layerAnd metal die pad and bonding wire connection
Metal on the substrate on which
A second portion surrounding the die pad and the bonding wire connection portion
1 opening and a second opening for mounting chip components.
To provide an insulating layer covering the metal wiring layer, On metal die pad
Mounted with semiconductor chips, Semiconductor chip and bonding wire
Connect to the ear connection with a bonding wire, resin
To seal the semiconductor chip and the bonding wire
Provided in the first opening, Chip component in the second opening
After solder is printed on the mounting pad, the chip component mounting
A chip component is mounted on a chip.

【0016】この方法によると、従来の樹脂なしで実装
する場合よりも耐湿性等の信頼性に優れ、また、樹脂が
横に広がるのを抑制することができ、従来の樹脂を使っ
た場合よりも、樹脂の横広がりを考慮して、他の部品配
置を決めなければならないということがない。また、樹
脂の滴下する量を微妙に制御しなければならないという
こともなく、比較的粘度の低い樹脂を使用することがで
き、作業性が良好である。請求項4記載の電子部品の製
造方法は、請求項3記載の電子部品の製造方法におい
て、絶縁層がガラス層であることを特徴とする。 この方
法によると、請求項3と同様に作用する。
According to this method, the reliability such as moisture resistance is superior to the conventional mounting without resin, and the resin can be prevented from spreading laterally. However, it is not necessary to determine the arrangement of other components in consideration of the lateral spread of the resin. Further, the resin having a relatively low viscosity can be used without having to finely control the amount of the resin to be dropped, and the workability is good. 5. Production of the electronic component according to claim 4.
The manufacturing method is the same as the method for manufacturing an electronic component according to claim 3.
Wherein the insulating layer is a glass layer. This one
According to the method, it works in the same way as claim 3.

【0017】[0017]

【発明の実施の形態】以下、本発明の実施の形態につい
て、図面を参照しながら説明する。 (第1の実施の形態) 図1(a)は本発明の第1の実施の形態における電子部
品の平面図であり、図1(b)は同図(a)のA−A’
線断面図である。この電子部品は、図1に示すように、
プリント基板1上に、AgPt等で金属配線層2が適宜
形成されている。また、プリント基板1上には、金属配
線層2につながるAu,AgPt,AgPd等で金属ダ
イパッド3が形成されており、金属ダイパッド3上に半
導体チップ4がダイボンド接続されて搭載されている。
上記の金属ダイパッド3は、素子載置部としての機能を
果たし、半導体チップ4の底面つまり接着面がAuのと
きはAuで構成され、半導体チップ4の接着面が半田の
ときはAgPtまたはAgPdで構成される。
Embodiments of the present invention will be described below with reference to the drawings. (First Embodiment) FIG. 1A is a plan view of an electronic component according to a first embodiment of the present invention, and FIG. 1B is an AA ′ line of FIG.
It is a line sectional view. This electronic component, as shown in FIG.
On the printed circuit board 1, a metal wiring layer 2 is appropriately formed of AgPt or the like. Further, on the printed circuit board 1, Au lead to the metal interconnection layer 2, AgPt, etc. are metal die pad 3 is formed with AgPd, semi <br/> conductor chip 4 is connected die-bonded on the metal die pad 3 It is installed.
Metal die pad 3 above, serves as element this part, when the bottom surface, i.e. bonding surface of the semiconductor chip 4 is Au is composed of Au, AgPt or AgPd when bonding surface of the semiconductor chip 4 is solder It consists of.

【0018】そして、半導体チップ4の上面と金属配線
層2につながるボンディングワイヤ接続部10との間
、ボンディングワイヤ5で接続されている。また、他
の相対する2本の金属配線層2につながるチップ部品搭
載パッド11には、各々半田層6が設けられ、この半田
層6によってチップ部品7がチップ部品搭載パッド11
に接着され、かつ電気的に接続されている。
[0018] Then, between the bonding wire connecting portion 10 connected to the upper surface and the metal wiring layer 2 of the semiconductor chip 4 are connected in Bonn loading wire 5. Each of the chip component mounting pads 11 connected to the other two opposing metal wiring layers 2 is provided with a solder layer 6, and the chip component 7 is attached to the chip component mounting pad 11 by the solder layer 6.
And are electrically connected.

【0019】さらに、プリント基板1上は、絶縁層とし
て機能する厚さ10〜15μmの金属配線層保護用のガ
ラス層9で被覆されている。このガラス層9は、プリン
ト基板1上の金属ダイパッド3と半導体チップ4に対し
てボンディングワイヤ5で接続されるボンディングワイ
ヤ接続部10とを包括的に包囲する開口部9Dと、チッ
プ部品載置用の開口9Cとを有している。この場合、
ガラス層の開口部9Dは、半導体チップ4およびボン
ディングワイヤ接続部10の周囲を除いて、ボンディン
グワイヤ接続部10から0.5mm程度のところから円
形もしくは楕円形に形成している。つまり、開口部9D
は、金属ダイパッド3およびボンディングワイヤ接続部
10の各々の外周縁(特に隅部分)より0.5mm程度
離れたところが開口縁となるように形成される。
Further, the printed circuit board 1 is covered with a glass layer 9 for protecting a metal wiring layer having a thickness of 10 to 15 μm, which functions as an insulating layer. The glass layer 9 has an opening 9D that comprehensively surrounds the metal die pad 3 on the printed circuit board 1 and the bonding wire connection portion 10 connected to the semiconductor chip 4 by the bonding wire 5, and a chip component mounting portion. and an opening 9C of. in this case,
The opening 9 </ b> D of the glass layer 9 is formed in a circular or elliptical shape from about 0.5 mm from the bonding wire connection part 10 except for the periphery of the semiconductor chip 4 and the bonding wire connection part 10 . That is, the opening 9D
Are formed such that the opening edge is about 0.5 mm apart from the outer peripheral edge (particularly, a corner portion) of each of the metal die pad 3 and the bonding wire connecting portion 10.

【0020】そして、半導体チップ4とボンディングワ
イヤ5とボンディングワイヤ接続部10とを粘度6〜8
Pa・s程度のシリコンゴム系の材料からなる樹脂8で
封止している。この場合、開口部9Dの段差が樹脂8の
広がりを抑制することになる。以下、図2に参照して、
この電子部品の製造方法について説明する。
Then, the semiconductor chip 4, the bonding wires 5, and the bonding wire connecting portions 10 are
It is sealed with a resin 8 made of a silicon rubber-based material of about Pa · s. In this case, the step of the opening 9 </ b> D suppresses the spread of the resin 8. Hereinafter, referring to FIG.
A method for manufacturing this electronic component will be described.

【0021】まず、図2(a)に示すように、プリント
基板1上に金属配線層2、金属ダイパッド3、ボンディ
ングワイヤ接続部10、チップ部品搭載パッド11等を
形成し、さらにその上に開口部9C,9D等を有したガ
ラス層9を形成する。つぎに、図2(b)に示すよう
に、金属ダイパッド3上に半導体チップ4を接着し、半
導体チップ4とボンディングワイヤ接続部10との間を
ボンディングワイヤ5で接続する。
First, as shown in FIG. 2A, a metal wiring layer 2, a metal die pad 3, a bonding wire connection portion 10, a chip component mounting pad 11, etc. are formed on a printed board 1, and an opening is further formed thereon. A glass layer 9 having portions 9C, 9D and the like is formed. Next, as shown in FIG. 2B, the semiconductor chip 4 is bonded onto the metal die pad 3, and the semiconductor chip 4 and the bonding wire connection portion 10 are connected by the bonding wires 5.

【0022】つぎに、図2(c)に示すように、開口部
9D上に樹脂8を塗布して硬化させることにより、半導
体チップ4とボンディングワイヤ接続部10とボンディ
ングワイヤ5とを樹脂8で封止する。この場合、半導体
チップ4およびボンディングワイヤ5が埋まる程度の量
の樹脂8を滴下すると、樹脂8は保護用のガラス層9の
段差で横広がりが止まり、樹脂8の高さはチップ表面か
ら1〜5mmと薄く調整できる。
Next, as shown in FIG. 2C, a resin 8 is applied on the opening 9D and cured, so that the semiconductor chip 4, the bonding wire connection portion 10, and the bonding wire 5 are bonded with the resin 8. Seal. In this case, when the resin 8 is dropped in such an amount that the semiconductor chip 4 and the bonding wires 5 are buried, the resin 8 stops spreading laterally due to the step of the protective glass layer 9, and the height of the resin 8 is 1 to 1 from the chip surface. It can be adjusted as thin as 5 mm.

【0023】なお、ガラス層9の段差の寸法は、一般的
に10〜15μm程度であり、粘度6〜8Pa・S程度
の樹脂8を使うと、樹脂の高さは半導体チップ4とボン
ディングワイヤ5がちょうど覆われる程度の高さ1〜5
mmになる。つぎに、図2(d)に示すように、チップ
部品搭載パッド11に半田層6を印刷により塗布する。
The size of the step of the glass layer 9 is generally about 10 to 15 μm, and when the resin 8 having a viscosity of about 6 to 8 Pa · S is used, the height of the resin becomes the semiconductor chip 4 and the bonding wire 5. Is just high enough to be covered
mm. Next, as shown in FIG. 2D, the solder layer 6 is applied to the chip component mounting pad 11 by printing.

【0024】つぎに、図2(e)に示すように、チップ
部品搭載パッド11の半田層6上チップ部品7を搭載
し、その後リフロー炉にてベーキングを行い、半田層6
を硬化させると、半導体チップ4およびチップ部品7か
らなる回路を搭載したプリント配線基板ができ、リード
を接続し、パッケージングすると所望の電子部品が完成
する。
Next, as shown in FIG. 2 (e), the chip component 7 is mounted on the solder layer 6 of the chip component mounting pad 11, and then baked in a reflow furnace.
Is cured, a printed wiring board on which a circuit composed of the semiconductor chip 4 and the chip component 7 is mounted is formed. After connecting leads and packaging, a desired electronic component is completed.

【0025】この実施の形態の電子部品によれば、半導
体チップ4の樹脂封止を行うので、高信頼性を確保する
ことができ、また樹脂8で封止する際に、ガラス層9に
おける金属ダイパッドとボンディングワイヤ接続部1
とを包括的に包囲する開口部9Dの段差により樹脂が
横に広がるのを抑制することができる。しかも、比較的
粘度の低い樹脂8を使用することができ、作業性が良好
である。また、ガラス層9の開口部9D略円形(円形
もしくは楕円形)としているので、樹脂8を滴下した
際、樹脂8の広がる力がその周囲にほぼ均一にかかるこ
とになり、略円形部分のガラス層9の開口部9Dの段差
で樹脂8の横広がりを効果的に抑制することができる。
According to the electronic component of this embodiment, since the semiconductor chip 4 is sealed with resin, high reliability can be ensured. Die pad 3 and bonding wire connection 1
The resin can be prevented from spreading laterally due to the step of the opening 9D that comprehensively surrounds the zero . In addition, the resin 8 having a relatively low viscosity can be used, and the workability is good. In addition, since the opening 9D of the glass layer 9 is substantially circular (circular or oval), when the resin 8 is dropped, the spreading force of the resin 8 is applied substantially uniformly around the resin 8, and the substantially circular portion The lateral spread of the resin 8 can be effectively suppressed by the step of the opening 9D of the glass layer 9.

【0026】以上のように、プリント基板4上のガラス
層9の段差を利用することにより、滴下する樹脂8の量
が多少変動しても、常に所望の樹脂形状が安定して得ら
れる。またその結果、他のチップ部品7が後工程で近く
に実装可能、即ち集積化が可能となり、かつ、後工程の
半田塗布、チップ部品搭載、洗浄工程での耐溶性が向上
する。さらに、半導体素子の耐湿性を向上させることが
できるため、プリント基板としての耐湿性の向上にも効
果が得られる。
As described above, by utilizing the step of the glass layer 9 on the printed circuit board 4, a desired resin shape can always be stably obtained even if the amount of the resin 8 to be dropped slightly varies. As a result, another chip component 7 can be mounted nearby in a later process, that is, integrated, and the soldering resistance in the subsequent steps of solder application, chip component mounting, and cleaning process is improved. Furthermore, since the moisture resistance of the semiconductor element can be improved, the effect of improving the moisture resistance of the printed circuit board can be obtained.

【0027】また、この実施の形態の電子部品の製造方
法によれば、金属配線層2を形成したプリント基板1
に、金属配線層2につながる金属ダイパッド3と金属配
線層2につながるボンディングワイヤ接続部10とを包
囲する開口部9Dを有するガラス層9を設け、開口部9
D内の金属ダイパッド3上に半導体チップ4を載置し、
半導体チップ4とボンディングワイヤ接続部10とをボ
ンディングワイヤ5で接続し、半導体チップ4とボンデ
ィングワイヤ5とボンディングワイヤ接続部0とを樹
脂8で封止し、金属配線層2につながるチップ部品搭載
パッド11に半田層6を印刷してチップ部品7を搭載す
るので、従来の樹脂なしで実装する場合よりも耐湿性等
の信頼性に優れ、また、樹脂8が横に広がるのを抑制す
ることができ、従来の樹脂を使った場合よりも、樹脂の
横広がりを考慮して、他の部品配置を決めなければなら
ないということがない。また、樹脂の滴下する量を微妙
に制御しなければならないということもなく、比較的粘
度の低い樹脂を使用することができ、作業性が良好であ
る。
According to the method for manufacturing an electronic component of this embodiment, the printed circuit board 1 on which the metal wiring layer 2 is formed
A glass layer 9 having an opening 9D surrounding a metal die pad 3 connected to the metal wiring layer 2 and a bonding wire connecting portion 10 connected to the metal wiring layer 2;
The semiconductor chip 4 is placed on the metal die pad 3 in D,
The semiconductor chip 4 and the bonding wire connection portion 10 are connected with the bonding wire 5, the semiconductor chip 4, the bonding wire 5 and the bonding wire connection portion 10 are sealed with the resin 8, and the chip components mounted on the metal wiring layer 2 are mounted. Since the chip component 7 is mounted by printing the solder layer 6 on the pad 11, the reliability such as moisture resistance is superior to the conventional mounting without resin, and the resin 8 is prevented from spreading laterally. Therefore, it is not necessary to determine another component arrangement in consideration of the lateral spread of the resin as compared with the case where the conventional resin is used. Further, the resin having a relatively low viscosity can be used without having to finely control the amount of the resin to be dropped, and the workability is good.

【0028】(第2の実施の形態) 図3(a)は本発明の第2の実施の形態における電子部
品の平面図であり、図3(b)は同図(a)の
線断面図である。この電子部品は、図3に示すように、
ガラス層9の開口部9Dの全周を包囲するように、環状
の溝9Eが形成されている点特徴で、それ以外は図1
に示したものと同様である。つまり、この実施の形態で
は、開口部9Dおよび溝9Eが二重円形あるいは二重楕
円形となっている。
[0028] (Second Embodiment) FIG. 3 (a) is a plan view of an electronic component according to the second embodiment of the present invention, B in FIG. 3 (b) FIG. (A) - B '
It is a line sectional view. This electronic component, as shown in FIG.
So as to surround the entire periphery of the opening 9D of the glass layer 9, a feature is that the annular groove 9E is formed, otherwise 1
Is the same as that shown in FIG. That is, in this embodiment, the opening 9D and the groove 9E have a double circular shape or a double elliptical shape.

【0029】この場合において、開口部9Dおよび溝9
Eの間にある環状のガラス層9の幅を0.1〜0.3m
mに設定し、溝9Eの幅を0.1〜0.3mm程度にす
るのが好ましい。このように、開口部9Dの外側に溝9
Eを形成することで、ガラス層9の段差が二重になる
と、万一、内側の段差を樹脂8が乗り越えても(はみ出
し部分8A)、外側の段差で樹脂8の横広がりは止める
ことができる。なお、溝9Eは2本以上であってもよ
い。
In this case, the opening 9D and the groove 9
E, the width of the annular glass layer 9 is 0.1 to 0.3 m.
m, and the width of the groove 9E is preferably about 0.1 to 0.3 mm. Thus, the groove 9 is formed outside the opening 9D.
By forming E, if the step of the glass layer 9 becomes double, even if the resin 8 gets over the inner step (protruding portion 8A), the lateral spread of the resin 8 can be stopped at the outer step. it can. The number of grooves 9E may be two or more.

【0030】また、電子部品の製造方法は、図4に示す
ように、ガラス層9に溝9Eが形成されている以外、図
2に示したものと同様である。この実施の形態の電子部
品によれば、開口部9Dの周辺のガラス層9に開口部9
Dの周縁に沿って延びる環状の溝9Eを設けているの
で、樹脂を滴下した際、たとえ開口部9Dから樹脂8が
溢れ出たとしても、溝9Eの段差により樹脂8が横に広
がるのを抑制することができる。その他の効果は第1の
実施の形態と同様である。
The method of manufacturing the electronic component is the same as that shown in FIG. 2 except that a groove 9E is formed in the glass layer 9 as shown in FIG. According to the electronic component of this embodiment, the opening 9 is formed in the glass layer 9 around the opening 9D.
Since the annular groove 9E extending along the periphery of D is provided, even when the resin 8 is dropped, even if the resin 8 overflows from the opening 9D, the resin 8 spreads horizontally due to the step of the groove 9E. Can be suppressed. Other effects are the same as those of the first embodiment.

【0031】[0031]

【0032】[0032]

【発明の効果】請求項1記載の電子部品によれば、半導
体チップの樹脂封止を行うので、高信頼性を確保するこ
とができ、また樹脂で封止する際に、絶縁層の開口部の
段差により樹脂が横に広がるのを抑制することができ
る。しかも、比較的粘度の低い樹脂を使用することがで
き、作業性が良好である。
According to the electronic component of the first aspect, the semiconductor component
Since the body chip is sealed with a resin, high reliability can be ensured. Further, when the chip is sealed with the resin, the resin can be prevented from spreading laterally due to a step in an opening of the insulating layer. In addition, a resin having a relatively low viscosity can be used, and workability is good.

【0033】請求項2記載の電子部品によれば、請求項
1と同様の効果がある。
According to the electronic component of the second aspect, the same effect as that of the first aspect is obtained.

【0034】[0034]

【0035】[0035]

【0036】 請求項記載の電子部品の製造方法によれ
ば、従来の樹脂なしで実装する場合よりも耐湿性等の信
頼性に優れ、また、樹脂が横に広がるのを抑制すること
ができ、従来の樹脂を使った場合よりも、樹脂の横広が
りを考慮して、他の部品配置を決めなければならないと
いうことがない。また、樹脂の滴下する量を微妙に制御
しなければならないということもなく、比較的粘度の低
い樹脂を使用することができ、作業性が良好である。請
求項4記載の電子部品の製造方法によれば、請求項3と
同様の効果がある。
[0036] Claim3According to the manufacturing method of the described electronic component
Is better than conventional mounting without resin.
Excellent reliability and restrains the resin from spreading laterally
And the width of the resin is wider than when using the conventional resin.
The other parts arrangement must be determined in consideration of
I can't say that. In addition, the amount of resin dripping is delicately controlled.
Relatively low viscosity without having to
Resin can be used and workability is good. Contract
According to the method of manufacturing an electronic component according to claim 4, claim 3 and
There is a similar effect.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の第1の実施の形態における電子部品の
平面図およびそのA−A’線断面図である。
FIG. 1 is a plan view of an electronic component according to a first embodiment of the present invention and a cross-sectional view taken along line AA ′ thereof.

【図2】本発明の第1の実施の形態における電子部品の
製造方法を示す工程順断面図である。
FIG. 2 is a cross-sectional view illustrating a method of manufacturing the electronic component according to the first embodiment of the present invention in order of steps.

【図3】本発明の第2の実施の形態における電子部品の
平面図およびその’線断面図である。
Plane of the electronic component diagram of the second embodiment of the present invention; FIG and its B - B 'line cross-sectional views.

【図4】本発明の第2の実施の形態における電子部品の
製造方法を示す工程順断面図である。
FIG. 4 is a cross-sectional view illustrating a method of manufacturing an electronic component according to a second embodiment of the present invention in the order of steps.

【図5】従来の電子部品の平面図およびそのC−C’線
断面図である。
FIG. 5 is a plan view of a conventional electronic component and a cross-sectional view taken along line CC ′ of the electronic component.

【図6】従来の他の電子部品の平面図およびそのD−
D’線断面図である。
FIG. 6 is a plan view of another conventional electronic component, and FIG.
It is D 'line sectional drawing.

【符号の説明】[Explanation of symbols]

1 プリント基板 2 金属配線層 3 金属ダイパッド 4 半導体チップ 5 ボンディングワイヤ 6 半田層 7 チップ部品 8 樹脂 9 ガラス層(絶縁層) 9A 開口部 9B 開口部 9C 開口部 9D 開口部 9E 溝 10 ボンディングワイヤ接続部 11 チップ部品搭載パッド 1 printed circuit board 2 metal wiring layer 3 metal die pad  4 Semiconductor chip  5 Bonding wire  Reference Signs List 6 solder layer 7 chip component 8 resin 9 glass layer (insulating layer) 9A opening 9B opening 9C opening 9D opening 9E groove 10 bonding wire connection portion 11 chip component mounting pad

フロントページの続き (58)調査した分野(Int.Cl.7,DB名) H01L 21/56 H01L 21/60 Continuation of the front page (58) Field surveyed (Int.Cl. 7 , DB name) H01L 21/56 H01L 21/60

Claims (4)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 基板上に、金属配線層と金属ダイパッド
とボンディングワイヤ接続部とチップ部品搭載パッドと
が設けられ、前記金属ダイパッド上には半導体チップが
搭載され、前記チップ部品搭載パッドにはチップ部品が
搭載され、前記半導体チップと前記ボンディングワイヤ
接続部とがボンディングワイヤにより接続された電子部
品であって、 絶縁層が、前記金属ダイパッドと前記ボンディングワイ
ヤ接続部とを包囲する第1の開口部と前記チップ部品搭
載用の第2の開口部とを備えて前記金属配線層を覆い、 樹脂が、前記半導体チップと前記ボンディングワイヤと
を封止するように前記第1の開口部内に設けられたこと
を特徴とする 電子部品。
A metal wiring layer and a metal die pad are provided on a substrate.
And bonding wire connection parts and chip component mounting pads
Is provided, and a semiconductor chip is provided on the metal die pad.
The chip component is mounted on the chip component mounting pad.
Mounted, the semiconductor chip and the bonding wire
Electronic part whose connection part is connected by bonding wire
An insulating layer formed between the metal die pad and the bonding wire.
A first opening surrounding the chip connection portion and the chip component housing.
A second opening for mounting, covering the metal wiring layer , wherein a resin is provided between the semiconductor chip and the bonding wire.
Is provided in the first opening so as to seal
Electronic components characterized by the following .
【請求項2】 絶縁層がガラス層である請求項1記載
の電子部品。
2. The electronic component according to claim 1 insulating layer is a glass layer.
【請求項3】 金属配線層と金属ダイパッドとボンディ
ングワイヤ接続部とチップ部品搭載パッドとが設けられ
た基板上に、前記金属ダイパッドと前記ボンディングワ
イヤ接続部とを包囲する第1の開口部と前記チップ部品
搭載用の第2の開口部とを有して前記金属配線層を覆う
絶縁層を設け、 前記金属ダイパッド上に半導体チップを搭載し、 前記半導体チップと前記ボンディングワイヤ接続部とを
ボンディングワイヤにより接続し、 樹脂を前記半導体チップと前記ボンディングワイヤとを
封止するように前記第1の開口部内に設け、 前記第2の開口部内の前記チップ部品搭載パッドに半田
を印刷した後に、前記チップ部品搭載パッド上にチップ
部品を搭載することを特徴とする電子部品の製造方法。
3. A metallization layer , a metal die pad, and a bondy.
Wiring wire connection parts and chip component mounting pads are provided.
The metal die pad and the bonding wire
A first opening surrounding the ear connection and the chip component
Covering the metal wiring layer with a second opening for mounting
An insulating layer is provided, a semiconductor chip is mounted on the metal die pad, and the semiconductor chip and the bonding wire connection portion are connected to each other.
The semiconductor chip and the bonding wire are connected by a bonding wire.
Solder is provided in the first opening so as to be sealed and soldered to the chip component mounting pad in the second opening.
After printing, the chip is placed on the chip component mounting pad.
A method for manufacturing an electronic component, comprising mounting a component.
【請求項4】 絶縁層がガラス層である請求項3に記載
の電子部品の製造方法。
4. The method according to claim 3, wherein the insulating layer is a glass layer.
Electronic component manufacturing method.
JP31325997A 1997-11-14 1997-11-14 Electronic component and method of manufacturing the same Expired - Fee Related JP3078773B2 (en)

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Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP31325997A JP3078773B2 (en) 1997-11-14 1997-11-14 Electronic component and method of manufacturing the same

Publications (2)

Publication Number Publication Date
JPH11145180A JPH11145180A (en) 1999-05-28
JP3078773B2 true JP3078773B2 (en) 2000-08-21

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100779345B1 (en) * 2001-08-17 2007-11-23 앰코 테크놀로지 코리아 주식회사 Semiconductor package
KR100708045B1 (en) * 2001-09-05 2007-04-16 앰코 테크놀로지 코리아 주식회사 Semiconductor package and its manufacturing method
JP2004356494A (en) 2003-05-30 2004-12-16 Hitachi Ltd Electronic equipment and pressure detection device
JP6020100B2 (en) * 2012-12-04 2016-11-02 株式会社デンソー Physical quantity sensor

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