JP3063345B2 - Saturation prevention circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a saturation prevention circuit for preventing a transistor externally attached to an integrated circuit from being saturated.

[0002]

2. Description of the Related Art Generally, in a constant current output amplifying circuit which outputs a large current, it is difficult to integrate a drive transistor in an output stage. Therefore, an external transistor is used as an output stage transistor. In many cases, a circuit for driving a transistor is integrated on a semiconductor integrated circuit substrate. Further, in the constant current output amplifier circuit, the output stage transistor may be saturated depending on the state of the load. However, if the transistor is saturated, a disadvantage such as a decrease in switching speed occurs. A saturation prevention circuit is provided.

FIG. 4 is a circuit diagram showing a conventional saturation prevention circuit. Reference numerals G, H, I, J and L are external terminals provided on the semiconductor integrated circuit. The terminal G is supplied with the power supply voltage V _CC , and the terminal J is connected to the ground. The amplifier A and the reference voltage circuit D are formed on the same semiconductor integrated circuit substrate.

A reference voltage _Vref is _supplied from a reference voltage circuit D to a non-inverting input terminal (+) of the amplifier A. The inverting input terminal (-) of the amplifier A is connected to the external terminal H.
And the output terminal is connected to the external terminal I. Further, the signal input terminal for preventing saturation of the amplifier A is connected to the external terminal L.

[0005] The PNP transistor Q1 is an output transistor externally attached to the outside of the integrated circuit, and its emitter is connected to the external terminal H of the integrated circuit. A resistor R1 is connected between the external terminal H and the power supply. A resistor R3 is connected between the base of the transistor Q1 and the external terminal I. Further, a resistor R2 as a load is connected to the collector of the transistor Q1, and a diode D1 is connected between the collector and the external terminal L.

The amplifier A comprises, for example, as shown in FIG. 5, a differential amplifier circuit M, PNP transistors Q3 and Q4, a resistor R5, a diode D2, and a constant current source I1. That is, the non-inverting input terminal and the inverting input terminal of the differential amplifier circuit M are connected to the external terminal H and the reference voltage circuit D, respectively, and the output terminal is connected to the base of the transistor Q4. The collector of the transistor Q4 is grounded, and the emitter is connected to the base of the transistor Q3 and one end of the resistor R5. The other end of the resistor R5 and the emitter of the transistor Q3 are both connected to a power supply. The collector of the transistor Q3 is connected to the external terminal I and to the anode of the diode D2. The cathode of the diode D2 is connected to the external terminal L. Furthermore, this diode D
The constant current source I1 is connected between the cathode of No. 2 and ground.

Next, the operation of the conventional saturation prevention circuit configured as described above will be described.

When the transistor Q1 is not saturated, the amplifier A compares the reference voltage _{Vref supplied} from the reference voltage circuit D with the voltage _supplied to the external terminal H, and based on the result, determines the base of the transistor Q1. Control the voltage. That is, the amplifier A _{is, (V CC -V ref) /} R1 becomes as constant current flows through the transistor Q1,
Controls the base voltage of transistor Q1.

Here, depending on the state of the resistor 2 as a load,
As an example of saturation of the output stage transistor, a diode D
A case is considered in which a current I ₀ is externally applied to an interconnection point M of 1, the resistor R2 and the transistor Q1, and the potential of the interconnection point M rises. Here, V _H is the potential of the connection point H, V _CEQ1
Is the collector-emitter voltage of transistor Q1.
You. If there is no diode D1, the potential V of the connection point M
_M rises, and when it exceeds the potential of _VH - _VCEQ1 ,
The transistor Q1 saturates, and the resistor R2
The supplied constant current cannot be supplied. Next, FIG.
And in the case of FIG. 5, the current I ₀ is supplied to the connection point M from outside.
Once, V _M rises, diode D1 becomes conductive. Therefore, assuming that the potential at the terminal L is V _L and the forward voltage of the diode D1 is V _D1 , the potential V _{M at} the connection point M is V _M = V _L + V _D1 .

By the way, the potential V _L of the terminal L, and the potential of the terminal I V _I, the forward voltage of the diode D2 and V _D2, which is V _L = V _I -V _D2. When the forward voltage of the diodes D1, D2 are substantially equal (V _D1 ≒ V _D2), substantially equal to the potential V _I in the potential V _M and the terminal I of the connection point M. Thus, it is possible to prevent the collector potential of the transistor Q1 from rising above the base potential, thereby preventing the transistor Q1 from being saturated.

[0011]

However, in the above-mentioned conventional saturation prevention circuit, since the external terminal L is required to detect the collector potential of the transistor Q1, the number of external terminals of the integrated circuit increases. There is a problem that miniaturization of the semiconductor integrated circuit is hindered.

The present invention has been made in view of the above problems, and has as its object to provide a saturation prevention circuit capable of reducing the number of external terminals.

[0013]

Means for Solving the Problems] saturation prevention circuit according to the present invention, the external transistor load collector is connected, a first resistor connected between the emitter and the power supply voltage of said transistor , inverting input terminal connected to the emitter of said transistor, an amplifier a first reference voltage is applied to the non-inverting input terminal, an output terminal and the transistor base and connected to a second between the said amplifier Resistance and before
A potential difference detection means for detecting a potential difference serial both sides of the second resistor, have a control means to control the output of the amplifier based on the output of the potential difference detection unit on a result of comparison with the second reference voltage The amplifier, the second resistor and the
The detecting means is formed in the same semiconductor .

[0014]

In the present invention, there is provided a potential difference detecting means for detecting a potential difference on both sides of the second resistor connected between the output terminal of the amplifier and the base of the transistor. When the transistor is not saturated, the potential difference on both sides of the second resistor is the product of the base current of the transistor and the resistance of the second resistor.
However, for example, when a large current flows through the load and the collector potential of the transistor rises, a current flows from the collector to the base, and as a result, the potential difference on both sides of the second resistor changes. The potential difference detecting means detects a change in the potential difference. The control means compares the detection result of the potential difference detection means with the second reference potential, and controls the output of the amplifier based on the result.

That is, in the present invention, the state of the transistor is detected based on a change in the potential difference between both sides of the second resistor due to the collector potential of the transistor being higher than the base potential, and the output of the amplifier circuit is controlled to control the transistor. In order to prevent saturation of the transistor, an external terminal for detecting the collector potential of the transistor, which is conventionally required, becomes unnecessary.

[0016]

Next, an embodiment of the present invention will be described with reference to the accompanying drawings.

FIG. 1 is a circuit diagram showing a saturation prevention circuit according to a first embodiment of the present invention. Note that the symbols G, H, I, J
Are external terminals provided in the semiconductor integrated circuit, a power supply voltage V _CC is applied to a terminal G, and a terminal J is connected to the ground. The amplifier A, the comparator B, the differential amplifier C, the reference voltage circuits D and E, and the resistor R3 are formed on the same semiconductor integrated circuit substrate.

The reference voltage _Vref is _supplied from the reference voltage circuit D to the non-inverting input terminal of the amplifier A. The inverting input terminal of the amplifier A is connected to the external terminal H, and the output terminal is connected to one end of the resistor R3 and the inverting input terminal of the differential amplifier C. Further, the other end of the resistor R3 is connected to the terminal I and to the non-inverting input terminal of the differential amplifier C. Furthermore, the comparator B compares the output of the differential amplifier C with the reference voltage provided from the reference voltage circuit E, and controls the output of the amplifier A based on the result.

The PNP transistor Q1 is an external transistor whose emitter is connected to the external terminal H and whose base is connected to the external terminal I. Then, a resistor R2 (load) is connected to the collector. A resistor R1 is connected between the terminal H and the power supply.

[0020] In the thus constituted saturation preventing circuit, the amplifier A, as in the prior _{art, (V CC -V ref) /} R1 becomes as constant current flows through the transistor Q1,
Controls the base voltage of transistor Q1.

[0021] In the normal state where the transistor Q1 is not saturated, the potential difference across the resistor R3 is the product of the resistance value of the base current I _B and the resistor R3 of the transistor Q1 (R3
× I _B ).

Here, depending on the state of the resistor R2 as a load,
In this case, the output stage transistor is saturated, and the case where a current I ₀ is externally applied to the resistor R2 is considered. At this time , it is assumed that the collector potential of the transistor Q1 has become higher than the base potential by at least the forward voltage of the transistor.
Normally, the transistor Q1 may not be saturated,
The constant current that had been supplied to the resistor R2 until
Become. However, in the configuration of the present invention, 'flow, by this, the potential difference across the resistor R3, R3 × (I _B + I _B' base current I _B from the collector of the transistor Q1 becomes). Differential amplifier C detects the R3 × I _B 'becomes voltage.

The output of the differential amplifier C is provided to a comparator B. As shown in FIG. 2, for example, the comparator B includes a differential amplifier K to which the outputs of the differential amplifier C and the reference voltage circuit E are supplied, a PNP transistor Q2 to which the output of the differential amplifier K is supplied to the base, And a resistor R4 connected between the emitter of the transistor Q2 and the power supply.

The comparator B compares the output of the differential amplifier C with the reference voltage provided from the reference voltage circuit E, and controls the output of the amplifier A based on the result. That is, when the output potential of the differential amplifier C is higher than the reference voltage value given to the differential amplifier K, the comparator B outputs a current flowing through the transistor Q2 and the resistor R4, and the output value of the differential amplifier C is When it is low, the current output becomes "0".

By giving the output of the comparator B to the output of the amplifier A (ie, the output end of the amplifier A, the resistor R3 and the interconnection point N of the inverting input terminal of the differential amplifier C), the output of the amplifier A is obtained. Can be controlled.

In this embodiment, the number of external terminals can be reduced as compared with the prior art, so that the size of the integrated circuit can be further reduced.

FIG. 3 is a circuit diagram showing a saturation prevention circuit according to a second embodiment of the present invention.

This embodiment is different from the first embodiment in that the inverting input terminal and the non-inverting input terminal of the differential amplifier C are connected to the external terminal I and the external terminal H, respectively. Are basically the same as those in the first embodiment. In FIG. 3, the same components as those in FIG. 1 are denoted by the same reference numerals, and detailed description thereof will be omitted.

In this embodiment, the output terminal of the amplifier A is connected to the inverting input terminal of the differential amplifier C and is also directly connected to the terminal I. The differential amplifier C
Are connected to the terminal H. A resistor R3 is connected between the base of the transistor Q1 and the terminal I as an external resistor.

In the first embodiment, the differential amplifier C detects the potential difference between both ends of the resistor R3. In the present embodiment, however, the potential difference between both ends of the resistor R3 and the base / emitter of the transistor Q1 are detected. The sum with the forward voltage is detected. The comparator B controls the output of the amplifier A based on the output of the differential amplifier C.

In this embodiment, the same effect as that of the first embodiment can be obtained. In addition, since the resistor R3 is an external resistor, the starting point of the effect of preventing the saturation of the transistor Q1 can be set arbitrarily. It has the effect of being able to.

[0032]

As described above, according to the present invention, the potential difference detecting means detects the potential difference on both sides of the second resistor connected between the amplifier and the base of the transistor,
Since the control means controls the output of the amplifier based on the result, the number of terminals of the integrated circuit can be reduced as compared with the related art, and the size of the integrated circuit can be further reduced.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a saturation prevention circuit according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram showing a configuration of the comparator.

FIG. 3 is a circuit diagram showing a saturation prevention circuit according to a second embodiment of the present invention.

FIG. 4 is a circuit diagram showing a conventional saturation prevention circuit.

FIG. 5 is a circuit diagram showing a configuration of the amplifier.

[Explanation of symbols]

 A; amplifier B; comparators C, K; differential amplifiers D, E; reference voltage circuits Q1, Q2, Q3, Q4; PNP transistors D1, D2;

Claims (1)

(57) [Claims] And external tiger <br/> Njisuta the load is connected to the 1. A collector, a first resistor and, inverting input terminal the transistor connected between the emitter and the power supply voltage of said transistor is connected to the emitter, the non-inverting and first amplifier reference voltage is applied to the input terminal, a second resistor connected between the base of the output terminal and the transistor of the amplifier, the second resistor a potential difference detection means for detecting a potential difference on both sides of, the output of the potential difference detecting means have a control means to control the output of the amplifier based on the result compared to the second reference voltage, said amplifier , The second resistor
A saturation prevention circuit, wherein the resistance and the detection means are formed in the same semiconductor .