JP3060900B2 - Varistor manufacturing method - Google Patents

Varistor manufacturing method

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Publication number
JP3060900B2
JP3060900B2 JP7161819A JP16181995A JP3060900B2 JP 3060900 B2 JP3060900 B2 JP 3060900B2 JP 7161819 A JP7161819 A JP 7161819A JP 16181995 A JP16181995 A JP 16181995A JP 3060900 B2 JP3060900 B2 JP 3060900B2
Authority
JP
Japan
Prior art keywords
temperature
varistor
manufacturing
time
varistor according
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP7161819A
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Japanese (ja)
Other versions
JPH0917612A (en
Inventor
巌 上野
彰仁 小西
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
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Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to JP7161819A priority Critical patent/JP3060900B2/en
Publication of JPH0917612A publication Critical patent/JPH0917612A/en
Application granted granted Critical
Publication of JP3060900B2 publication Critical patent/JP3060900B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Thermistors And Varistors (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、バリスタの製造方法に
関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a varistor.

【0002】[0002]

【従来の技術】従来より、バリスタは焼成により半導体
化した粒界を再酸化するため、電極焼付けを空気中で7
00〜900℃で実施することにより粒界の再酸化を同
時に行っている。
2. Description of the Related Art Conventionally, a varistor has been used to bake electrodes in air in order to re-oxidize grain boundaries that have been converted into semiconductors by firing.
The re-oxidation of the grain boundaries is performed at the same time by performing the process at 00 to 900 ° C.

【0003】即ち、粒界を制御することにより電気特性
を発現させている。
In other words, electrical characteristics are developed by controlling grain boundaries.

【0004】[0004]

【発明が解決しようとする課題】上記粒界を制御するこ
とによりバリスタの電気特性は容易に発現されるが、反
面、粒界の制御方法、この場合では電極焼付け条件を変
えることでバリスタの電気特性が大きく左右されること
を意味する。
The electrical characteristics of the varistor can be easily exhibited by controlling the grain boundaries. On the other hand, the electrical characteristics of the varistor are changed by changing the method of controlling the grain boundaries, in this case, the electrode baking conditions. This means that the characteristics are greatly affected.

【0005】そこで、本発明はバリスタの電気特性が最
大限に発現される電極焼付け条件を提供することを目的
とするものである。
Accordingly, an object of the present invention is to provide electrode baking conditions under which the electrical characteristics of a varistor are maximized.

【0006】[0006]

【課題を解決するための手段】この目的を達成するため
に本発明のバリスタの製造方法は、バリスタ素子を半導
体化させるために焼成する第1工程と、次にこのバリス
タ素子表面に少なくとも一対の電極ペーストを塗布する
第2工程と、次いで酸化雰囲気でこの電極ペーストを焼
き付けると共に前記バリスタ素子の粒界を再酸化する第
3工程とを備え、この第3工程において、降温スピード
は昇温スピードと同等もしくはより速くするものであ
る。
In order to achieve the above object, a method for manufacturing a varistor according to the present invention comprises a first step of firing the varistor element to make it a semiconductor, and at least a pair of varistor elements on the surface of the varistor element. A second step of applying an electrode paste; and a third step of baking the electrode paste in an oxidizing atmosphere and reoxidizing the grain boundaries of the varistor element. In the third step, the temperature decreasing speed is equal to the temperature increasing speed. It is equivalent or faster.

【0007】[0007]

【作用】この方法によると、バリスタ素子粒界部分への
不純物の析出が少なく、粒界の厚みが薄く均一であり、
また半導体化している粒子が酸化されないので粒界が
「強固な障壁」となり、サージ耐量及び電圧非直線指数
αの向上、バリスタ電圧のバラツキ低減が可能となる。
また電極ペーストに含有されるガラス等の不純物の拡散
が強固な障壁により遮断されるのでさらに上記電気特性
を向上させることができる。
According to this method, the varistor element grain boundary portion
The precipitation of impurities is small, the thickness of the grain boundaries is thin and uniform,
In addition, the grain boundaries are not
Becomes a "strong barrier", surge tolerance and voltage non-linear index
It is possible to improve α and reduce variation in varistor voltage.
Diffusion of impurities such as glass contained in the electrode paste
Is further blocked by a strong barrier,
Can be improved.

【0008】[0008]

【実施例】【Example】

(実施例1)以下、本発明の第1の実施例について、図
面を用いて説明する。
(Embodiment 1) Hereinafter, a first embodiment of the present invention will be described with reference to the drawings.

【0009】図3において、1はバリスタ素子で、その
内部には複数の内部電極2がセラミックシート1aを挟
んで互いに相対向するように設けられ、その両端には外
部電極3が設けられている。バリスタ素子1は、SrT
iO3を主成分とし、副成分としてNb25,Ta
25,MnO2,SiO2などを添加して形成したもので
ある。また、内部電極2はNiを主成分とし、副成分と
してLi2CO3などを添加して形成したものである。さ
らに、外部電極3は、下層3aをNiを主成分とし、副
成分としてLi2CO3などを添加して形成し、上層3b
をAg,Pd,Ptの少なくとも一種類以上で形成し、
その上層にNiメッキ4aと半田メッキ4bを形成した
ものである。
In FIG. 3, reference numeral 1 denotes a varistor element, in which a plurality of internal electrodes 2 are provided so as to face each other with a ceramic sheet 1a interposed therebetween, and external electrodes 3 are provided at both ends. . The varistor element 1 is made of SrT
iO 3 as the main component and Nb 2 O 5 , Ta as the sub-components
It is formed by adding 2 O 5 , MnO 2 , SiO 2 and the like. The internal electrode 2 is formed by using Ni as a main component and adding Li 2 CO 3 or the like as a sub-component. Further, the external electrode 3 is formed by forming the lower layer 3a with Ni as a main component and adding Li 2 CO 3 or the like as a sub component, and forming the upper layer 3b.
Is formed of at least one of Ag, Pd and Pt,
An Ni plating 4a and a solder plating 4b are formed thereon.

【0010】図4は、製造工程を示し、(5)に示すご
とく、原料の混合、粉砕、スラリー化、シート成形によ
り、セラミックシート1aを作製した。
FIG. 4 shows a manufacturing process. As shown in (5), a ceramic sheet 1a was manufactured by mixing, pulverizing, slurrying, and sheet forming the raw materials.

【0011】次にセラミックシート1aと、内部電極2
とを積層(6)し、それを切断(7)、脱バイ・仮焼
(8)、面とり(9)した。
Next, the ceramic sheet 1a and the internal electrodes 2
Were laminated (6), and cut (7), debindered / calcined (8), and chamfered (9).

【0012】次に、バリスタ素子1の端面に、下層3a
となるNi外部電極を塗布(10)し、1200〜13
00℃で還元焼成(11)し、その後、下層3aの上
に、上層3bとなるAg外部電極となるAg粉末とホウ
ケイ酸鉛ガラスとエチルセルロースとブチルカルビトー
ル等で作製したAgペーストを塗布(12)し、図1に
示す降温スピード(800℃/h)が昇温スピード(6
00℃/h)より速くなる条件で、Ag焼付けと同時に
バリスタ素子1の再酸化のため700〜900℃の一定
温度にて加熱(13)した。
Next, a lower layer 3a is formed on the end face of the varistor element 1.
Ni external electrode to be applied (10)
After reduction firing at 00 ° C. (11), an Ag paste made of Ag powder serving as an Ag external electrode serving as an upper layer 3b, lead borosilicate glass, ethyl cellulose, butyl carbitol, etc. is applied onto the lower layer 3a (12). ) And the temperature decreasing speed (800 ° C./h) shown in FIG.
Under the condition that the varistor element 1 was re-oxidized at the same time as Ag baking under the condition of being faster than (00 ° C./h), the varistor element 1 was heated at a constant temperature of 700 to 900 ° C. (13).

【0013】実施例1の結果より、降温スピードが昇温
スピードより速くなる焼付け条件では、バリスタ素子1
の電圧非直線指数αの向上、サージ耐量のワイブル破壊
値の向上を確認した。
According to the results of Example 1, under the baking condition in which the temperature decreasing speed is higher than the temperature increasing speed, the varistor element 1
It was confirmed that the voltage non-linear index α and the surge resistance Weibull breakdown value improved.

【0014】なお、本実施例1では、Ag焼付け用の炉
として、断熱壁の外側に空気供給用のファンが配置さ
れ、空気が連続的に流入される構造となっていた。
In the first embodiment, as a furnace for baking Ag, a fan for supplying air is arranged outside the heat insulating wall, so that air is continuously introduced.

【0015】また、Agペーストを塗布したバリスタ素
子1はくっつき防止のため重ならないようにしてAg焼
付けと再酸化(13)を行った。
The varistor element 1 to which the Ag paste was applied was subjected to Ag baking and reoxidation (13) so as not to overlap to prevent sticking.

【0016】実施例1の結果より、降温スピードが昇温
スピードより速い場合では、電圧非直線指数α、サージ
耐量の向上が顕著に現われた。
From the results of Example 1, when the temperature decreasing speed is faster than the temperature increasing speed, the voltage non-linear index α and the surge withstand capability are remarkably improved.

【0017】この理由について考察すると、 (I)降温スピード<昇温スピードの場合 粒界絶縁層が形成される降温時において、降温スピード
が遅く長時間の場合では、粒界部分の再酸化のみなら
ず、(1)粒界部分への不純物の析出、(2)Agペー
ストに含有されるガラスの拡散などにより、(3)粒界
部分の不純物濃度の増大、(4)粒界の厚みの増大およ
び半導体化している粒子の酸化などにより結果として、
粒界部分の耐電圧(サージ耐量)や電圧非直線指数αが
低下すると考えられる。
The reason for this is as follows: (I) In the case where the temperature lowering speed is lower than the temperature increasing speed In the temperature lowering where the grain boundary insulating layer is formed, if the temperature lowering speed is slow and long, only the re-oxidation of the grain boundary is performed. In addition, (1) precipitation of impurities at the grain boundary portion, (2) diffusion of glass contained in the Ag paste, (3) increase in impurity concentration at the grain boundary portion, and (4) increase in thickness of the grain boundary. And as a result of oxidation of the particles that have become semiconductors,
It is considered that the withstand voltage (withstand surge) and the voltage non-linear index α of the grain boundary part decrease.

【0018】(II)逆に、降温スピード≧昇温スピード
の場合 (1)粒界部分への不純物の析出が少ない、(2)粒界
の厚みが薄く均一であり、また半導体化している粒子が
酸化されないことなどにより、(3)粒界がより「強固
な障壁」として形成されるためであると考えられる。ま
た、この場合では、Agペーストに含有されるガラス
も、より「強固な障壁」や、降温時での急冷却により粒
子や粒界への拡散が抑えられ、結果としてサージ耐量、
電圧非直線指数αが向上すると考えられる。
(II) Conversely, when the cooling rate is equal to or higher than the heating rate: (1) the precipitation of impurities at the grain boundary is small; (2) the grain boundaries are thin and uniform, and the grains are semiconductors. It is considered that (3) the grain boundary is formed as a "stronger barrier" due to the fact that is not oxidized. Further, in this case, the glass contained in the Ag paste also has a “stronger barrier” and diffusion to particles and grain boundaries is suppressed by rapid cooling at the time of temperature decrease, and as a result, surge resistance,
It is considered that the voltage non-linear index α is improved.

【0019】また、上記した効果は、炉内に空気(酸
素)が連続的に供給される場合において顕著に現われ、
供給される空気により(1)粒界部分の均一な酸化、
(2)炉内温度の均一化また、(3)Agペースト中に
含有されるバインダーの除去(脱バイ)が図られると考
えられる。但し、この場合、空気の流れを直接炉内に引
込むより、例えば、断熱壁の外側にファンなどを設置し
間接的に供給する方がより効果が現われ、かつ特性バラ
ツキも小さかった。しかし、空気が直接バリスタ素子1
に当たると、炉内の温度が冷えかつ、バリスタ素子1の
間でAg焼付け(再酸化)の温度が異なるため、特性に
バラツキが生じるので、間接的に接触するようにする方
が好ましい。
Further, the above-mentioned effect is remarkably exhibited when air (oxygen) is continuously supplied into the furnace.
(1) uniform oxidation of the grain boundary part by the supplied air,
It is considered that (2) the temperature in the furnace is made uniform and (3) the binder contained in the Ag paste is removed (de-buy). However, in this case, it is more effective to install a fan or the like outside the heat insulating wall and supply the air indirectly, and the variation in characteristics is smaller than that of drawing the flow of air directly into the furnace. However, the air is directly varistor element 1
In this case, the temperature inside the furnace is cooled and the temperature of the baking (re-oxidation) between the varistor elements 1 is different, which causes variations in characteristics. Therefore, it is preferable to make indirect contact.

【0020】またAgペースト中に含有されるバインダ
ーをすみやかに除去するためには以下に述べる方法が考
えられる。
In order to quickly remove the binder contained in the Ag paste, the following method can be considered.

【0021】(1)昇温時に、Agペーストに用いたバ
インダーのエチルセルロースの分解温度200〜250
℃以上の温度300〜500℃で10〜30分間保持
し、図2に示すような脱バイゾーンを設ける。
(1) Decomposition temperature of ethyl cellulose as a binder used for Ag paste at a temperature rise of 200 to 250
The temperature is maintained at 300 to 500 ° C. or higher for 10 to 30 minutes, and a debuy zone as shown in FIG. 2 is provided.

【0022】(2)昇温時に流入させる酸素の量をバリ
スタ素子1を再酸化させる時と降温時よりも1.5〜2
倍の範囲で多くする。
(2) The amount of oxygen introduced at the time of temperature rise is 1.5 to 2 times that at the time of reoxidizing the varistor element 1 and at the time of temperature decrease.
Do more in double the range.

【0023】(3)昇温時にまず水蒸気を流入して、バ
インダーを加水分解させる。この時の水蒸気量は、処理
するバリスタ素子1の量に関係するが、バリスタ素子1
を1万個処理するのに約0.5〜2.0cc/分必要であ
り、流入温度は100〜500℃の範囲が最適である。
(3) At the time of raising the temperature, steam is first introduced to hydrolyze the binder. The amount of water vapor at this time is related to the amount of the varistor element 1 to be processed.
Approximately 0.5 to 2.0 cc / min is required to process 10,000 pieces, and the inflow temperature is optimally in the range of 100 to 500 ° C.

【0024】(4)脱バイ排ガスの再付着や再流通を防
ぐため炉に排気用ダクトを設置する方が望ましい。
(4) It is desirable to install an exhaust duct in the furnace in order to prevent the re-adhesion and re-circulation of the degassing exhaust gas.

【0025】(実施例2)次に、第2の実施例について
説明する。
(Embodiment 2) Next, a second embodiment will be described.

【0026】還元焼成(11)後、Ag外部電極を塗布
(12)し、図1に示す条件でAg焼付けと同時に再酸
化のため加熱(13)した。
After the reduction firing (11), an Ag external electrode was applied (12) and heated (13) for reoxidation simultaneously with the baking of Ag under the conditions shown in FIG.

【0027】その結果、昇温時での三角形の面積Aが、
保持時での四角形の面積Bと比較し (1)A≧Bの場合では、上記した降温スピード≧昇温
スピードの場合と同様にサージ耐量や電圧非直線指数α
の向上が確認された。
As a result, the area A of the triangle at the time of temperature rise is:
(1) In the case of A ≧ B, the surge withstand voltage and the voltage non-linear index α are the same as in the case of the above-mentioned temperature lowering speed ≧ temperature increasing speed.
Improvement was confirmed.

【0028】逆に、 (2)A<Bの場合では、上記した降温スピード<昇温
スピードの場合と同様の結果を得た。
Conversely, (2) In the case of A <B, the same result as in the case of the above-mentioned temperature lowering speed <temperature raising speed was obtained.

【0029】これらの場合も、上記したように、保持時
間の違いにより粒界部分の形成が異なるために生じる結
果であると考えられる。
In these cases, as described above, it is considered that the result is caused by the difference in the formation of the grain boundary portion due to the difference in the holding time.

【0030】(3)さらに、昇温の途中で脱バイゾーン
を設けた図2に示す条件で実施した時でも、A≧Bの場
合では、サージ耐量や電圧非直線指数αの向上が確認さ
れた。
(3) Further, even when the test was carried out under the condition shown in FIG. 2 in which a de-buying zone was provided in the course of raising the temperature, in the case of A ≧ B, it was confirmed that the surge resistance and the voltage nonlinearity index α were improved. .

【0031】なお、実施例1,2において積層バリスタ
を例にあげたが、本発明はディスク型、円筒型、積層型
など何にでも適用できるものである。
In the first and second embodiments, a laminated varistor has been described as an example. However, the present invention can be applied to any type such as a disk type, a cylindrical type, and a laminated type.

【0032】また、外部電極3としてAgのみを取上げ
たが、他のPd,Ptなどや、これらの合金を用いても
同様の効果が得られることを確認した。
Although only Ag was used as the external electrode 3, it was confirmed that the same effect could be obtained by using other Pd, Pt, or an alloy thereof.

【0033】さらにバリスタ素子1の主成分をSrTi
3としたが、Srの一部をBa,Mg,Caで置換し
たものやそれらの中から2種類以上用いたものについて
も同様の効果が得られる。
The main component of the varistor element 1 is SrTi
Although O 3 was used, the same effect can be obtained also in the case where a part of Sr is replaced with Ba, Mg, Ca or in the case where two or more kinds of them are used.

【0034】そして、昇温スピードは400〜600℃
/h、その後の保持温度は700〜900℃で、その時
間は20〜40分、降温スピードは600〜800℃/
hであることが望ましい。また、昇温途中で脱バイゾー
ンを設けた場合、前半の昇温スピードを200〜400
℃/h、後半の昇温スピードを400〜600℃/h
と、二段階に分けることが望ましい。
The heating speed is 400 to 600 ° C.
/ H, the subsequent holding temperature is 700 to 900 ° C, the time is 20 to 40 minutes, and the temperature decreasing speed is 600 to 800 ° C /
h is desirable. When a debuying zone is provided during the heating, the heating speed in the first half is 200 to 400.
° C / h, heating rate in the latter half is 400-600 ° C / h
It is desirable to divide into two stages.

【0035】なお、降温時約500℃ぐらいになると、
炉内の温度が下がりにくくなり、ゆるやかな放物線を描
いて降温していく。
When the temperature drops to about 500 ° C.,
The temperature inside the furnace is unlikely to drop, and the temperature drops in a gentle parabola.

【0036】しかし、電極焼付けのための保持温度から
炉内の温度が下がりにくくなる程度までの温度範囲にお
いて降温速度を制御すれば効果がある。
However, it is effective to control the cooling rate in a temperature range from the holding temperature for baking the electrodes to the temperature at which the temperature in the furnace is hardly lowered.

【0037】[0037]

【発明の効果】以上本発明によると、バリスタ素子粒界
部分への不純物の析出が少なく、粒界の厚みが薄く均一
であり、また半導体化している粒子が酸化されないので
粒界が「強固な障壁」となり、サージ耐量及び電圧非直
線指数αの向上、バリスタ電圧のバラツキ低減が可能と
なる。また電極ペーストに含有されるガラス等の不純物
の拡散が強固な障壁により遮断されるのでさらに上記電
気特性を向上させることができる。
As described above, according to the present invention, the varistor element grain boundary
Low precipitation of impurities on the part, thin and uniform grain boundaries
In addition, since the particles that are semiconducting are not oxidized,
Grain boundaries become "strong barriers", and surge withstand and voltage
Improved line index α and reduced variation in varistor voltage
Become. In addition, impurities such as glass contained in the electrode paste
Diffusion is blocked by a strong barrier,
The air quality can be improved.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施例における電極焼付け条件を示
す特性図
FIG. 1 is a characteristic diagram showing electrode baking conditions in one embodiment of the present invention.

【図2】本発明の一実施例における電極焼付け条件を示
す特性図
FIG. 2 is a characteristic diagram showing electrode baking conditions in one embodiment of the present invention.

【図3】本発明の一実施例における積層バリスタの断面
FIG. 3 is a sectional view of a multilayer varistor according to an embodiment of the present invention.

【図4】本発明の一実施例における積層バリスタの製造
工程図
FIG. 4 is a manufacturing process diagram of a laminated varistor according to one embodiment of the present invention.

【符号の説明】 1 積層バリスタ素子 3 外部電極[Description of Signs] 1 Multilayer varistor element 3 External electrode

───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7,DB名) H01C 7/02 - 7/22 ──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int.Cl. 7 , DB name) H01C 7/ 02-7/22

Claims (9)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】バリスタ素子を半導体化させるために焼成
する第1工程と、次にこのバリスタ素子表面に少なくと
も一対の電極ペーストを塗布する第2工程と、次いで
化雰囲気でこの電極ペーストを焼き付けると共に前記バ
リスタ素子の粒界を再酸化する第3工程とを備え、この
第3工程において、降温スピードは昇温スピードと同等
もしくはより速くするバリスタの製造方法。
And 1. A first step of firing in order to the varistor element is semiconductive, then a second step of applying at least one pair of electrode paste on the varistor element surface and then acid
Baking the electrode paste in a oxidizing atmosphere and reoxidizing the grain boundaries of the varistor element. In the third step, the temperature decreasing speed is equal to or faster than the temperature increasing speed.
【請求項2】昇温スピードが400〜600℃/h、降
温スピードが600〜800℃/hである請求項1記載
のバリスタの製造方法。
2. The method for manufacturing a varistor according to claim 1, wherein the temperature rising speed is 400 to 600 ° C./h and the temperature decreasing speed is 600 to 800 ° C./h.
【請求項3】電極ペーストがAg,Pd,Pt粉末の少
なくとも一種類以上と、ガラス粉末と有機物により構成
されている請求項1記載のバリスタの製造方法。
3. The method for manufacturing a varistor according to claim 1, wherein the electrode paste comprises at least one of Ag, Pd, and Pt powders, a glass powder, and an organic substance.
【請求項4】第3工程において、酸素を連続的に流入す
る請求項1記載のバリスタの製造方法。
4. The method for manufacturing a varistor according to claim 1, wherein in the third step, oxygen is continuously introduced.
【請求項5】第3工程において、昇温時にある温度で一
定時間バリスタ素子を保持する請求項1記載のバリスタ
の製造方法。
5. The method for manufacturing a varistor according to claim 1 , wherein in the third step, the varistor element is held at a certain temperature for a certain time when the temperature is raised.
【請求項6】ある温度を電極ペースト中に含まれる有機
物の分解温度よりも高い温度とする請求項5記載のバリ
スタの製造方法。
6. The method for manufacturing a varistor according to claim 5, wherein a certain temperature is higher than a decomposition temperature of an organic substance contained in the electrode paste.
【請求項7】第3工程において、昇温時の酸素分圧を降
温時よりも高くする請求項1記載のバリスタの製造方
法。
7. The method for manufacturing a varistor according to claim 1 , wherein in the third step, the oxygen partial pressure at the time of temperature rise is higher than that at the time of temperature fall.
【請求項8】第3工程において、昇温時に水蒸気を流入
させて、バリスタ素子内に含まれる有機物を分解し、そ
の後に、酸素を流入させる請求項1記載のバリスタの製
造方法。
8. The method for manufacturing a varistor according to claim 1 , wherein, in the third step, steam is caused to flow in at the time of raising the temperature to decompose organic substances contained in the varistor element, and thereafter oxygen is caused to flow.
【請求項9】第3工程において、最高温度での保持温度
と保持時間の積(四角形の面積B)が、昇温時の多角形
の面積Aと比較してA≧Bの関係が成り立つ請求項1記
載のバリスタの製造方法。
9. The method according to claim 3, wherein the product of the holding temperature and the holding time at the highest temperature (the area of the square B) is larger than the area of the polygon A when the temperature is raised, and the relationship of A ≧ B is satisfied. Item 7. A method for manufacturing a varistor according to Item 1.
JP7161819A 1995-06-28 1995-06-28 Varistor manufacturing method Expired - Fee Related JP3060900B2 (en)

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Application Number Priority Date Filing Date Title
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JP3060900B2 true JP3060900B2 (en) 2000-07-10

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003059758A (en) * 2001-08-10 2003-02-28 Nec Tokin Corp Method of manufacturing multilayer ceramic capacitor
KR100649634B1 (en) * 2005-02-22 2006-11-27 삼성전기주식회사 Glass for a Coating Material of Chip Passive Components and Chip Passive Components therefrom
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