JP3044725B2 - Thin film transistor substrate - Google Patents

Thin film transistor substrate

Info

Publication number
JP3044725B2
JP3044725B2 JP31581289A JP31581289A JP3044725B2 JP 3044725 B2 JP3044725 B2 JP 3044725B2 JP 31581289 A JP31581289 A JP 31581289A JP 31581289 A JP31581289 A JP 31581289A JP 3044725 B2 JP3044725 B2 JP 3044725B2
Authority
JP
Japan
Prior art keywords
electrode
thin film
film transistor
storage capacitor
transistor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP31581289A
Other languages
Japanese (ja)
Other versions
JPH03175486A (en
Inventor
祥治 市川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP31581289A priority Critical patent/JP3044725B2/en
Publication of JPH03175486A publication Critical patent/JPH03175486A/en
Application granted granted Critical
Publication of JP3044725B2 publication Critical patent/JP3044725B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は薄膜トランジスタ基板に関し、特に製造歩留
りの高い薄膜トランジスタ基板に関する。
Description: TECHNICAL FIELD The present invention relates to a thin film transistor substrate, and more particularly to a thin film transistor substrate having a high production yield.

〔従来の技術〕[Conventional technology]

従来、この種の薄膜トランジスタ基板は、第3図に示
す薄膜トランジスタの模式的平面図のように、ストレー
ジキャパシタ電極1とゲート配線電極3とを同一工程で
形成し、その上にゲート絶縁膜および半導体膜8を形成
し、半導体膜8の不用部分をエッチング除去し、その上
にドレイン配線電極4を形成しさらに表示電極5を形成
した構成となっていた。ストレージキャパシタ電極1と
絶縁膜を介して対向した表示電極5の重なり容量でスト
レージキャパシタが形成される。
Conventionally, a thin film transistor substrate of this type has a storage capacitor electrode 1 and a gate wiring electrode 3 formed in the same step as shown in a schematic plan view of a thin film transistor shown in FIG. 8, the unnecessary portion of the semiconductor film 8 is removed by etching, the drain wiring electrode 4 is formed thereon, and the display electrode 5 is further formed. The storage capacitor is formed by the overlapping capacitance of the display electrode 5 opposing the storage capacitor electrode 1 via the insulating film.

〔発明が解決しようとする課題〕[Problems to be solved by the invention]

上述した従来の薄膜トランジスタ基板は、ゲート配線
電極とストレージキャパシタ電極を同一工程で一体に形
成しているためにゲート配線電極の断線や欠陥による抵
抗増大により製造歩留りが低いという欠点がある。
The above-described conventional thin film transistor substrate has a drawback that the production yield is low due to an increase in resistance due to disconnection or a defect of the gate wiring electrode because the gate wiring electrode and the storage capacitor electrode are integrally formed in the same process.

〔課題を解決するための手段〕[Means for solving the problem]

本発明は、n−1番目のストレージキャパシタ電極を
n番目のゲート電極に電気的に接続した構成の薄膜トラ
ンジスタ基板において、ストレージキャパシタ電極を透
明電極で構成し、ストレージキャパシタ電極の配線電極
とゲート配線電極を同一工程で一体に形成したことを特
徴とする。
The present invention provides a thin film transistor substrate in which an (n-1) th storage capacitor electrode is electrically connected to an nth gate electrode, wherein the storage capacitor electrode is formed of a transparent electrode, and a wiring electrode of the storage capacitor electrode and a gate wiring electrode Are integrally formed in the same process.

〔実施例〕〔Example〕

次に本発明について図面を参照して説明する。第1図
は本発明の第1の実施例の模式的平面図である。ストレ
ージキャパシタ電極1を透明電極で形成した後、ストレ
ージキャパシタ配線電極2とゲート配線電極3とを同一
工程で形成し、つづいてゲート絶縁膜と半導体膜8を形
成し半導体膜8の不用部分をエッチング除去する。その
後ドレイン電極配線4を形成しさらに表示電極5を形成
して12インチ液晶ディスプレイ用薄膜トランジスタ基板
とした。
Next, the present invention will be described with reference to the drawings. FIG. 1 is a schematic plan view of a first embodiment of the present invention. After the storage capacitor electrode 1 is formed of a transparent electrode, the storage capacitor wiring electrode 2 and the gate wiring electrode 3 are formed in the same process, then a gate insulating film and a semiconductor film 8 are formed, and unnecessary portions of the semiconductor film 8 are etched. Remove. Thereafter, a drain electrode wiring 4 was formed, and further, a display electrode 5 was formed to obtain a thin film transistor substrate for a 12-inch liquid crystal display.

このようにして形成した薄膜トランジスタ基板は、ゲ
ート電極の断線に関しては、歩留りが100%であり従来
の薄膜トランジスタ基板のゲート電極の断線に関する歩
留り85〜90%に比して優れている。これはストレージキ
ャパシタ電極の配線電極とゲート配線電極が同時に切断
しなければ断線欠陥とはならないためである。
The thin film transistor substrate thus formed has a yield of 100% with respect to the disconnection of the gate electrode, which is superior to the yield of 85 to 90% with respect to the disconnection of the gate electrode of the conventional thin film transistor substrate. This is because a disconnection defect does not occur unless the wiring electrode of the storage capacitor electrode and the gate wiring electrode are cut at the same time.

第2図は本発明の第2の実施例の模式的平面図であ
る。ストレージキャパシタ電極1を透明電極で形成した
後、ストレージキャパシタ配線電極2とゲート配線電極
3とを同一工程で形成し、つづいてゲート絶縁膜と半導
体膜8を形成し半導体膜8の不要部分をエッチング除去
する。その後ゲート絶縁膜にコンタクトホール6を開
け、次にドレイン電極配線4と接続電極7を同一工程で
形成しさらに表示電極5を形成して12インチ液晶ディス
プレイ用薄膜トランジスタ基板とした。この薄膜トラン
ジスタ基板はゲート電極2本とドレイン電極2本とで分
けられた4つの表示電極で1画素を形成するもので従来
の薄膜トランジスタ基板ではストレージキャパシタの形
成が困難であった。しかしこの実施例では、ストレージ
キャパシタ電極を透明電極で形成し、ストレージキャパ
シタ電極の配線電極とゲート配線電極を同一の工程で形
成しているため、ゲート電極2本とドレイン電極2本で
分けられた4つの表示電極で1画素を構成していてさら
にストレージキャパシタを作ることができる。したがっ
て、この薄膜トランジスタ基板を用いた液晶ディスプレ
イは表示特性が良いという利点がある。
FIG. 2 is a schematic plan view of a second embodiment of the present invention. After the storage capacitor electrode 1 is formed of a transparent electrode, the storage capacitor wiring electrode 2 and the gate wiring electrode 3 are formed in the same process, then a gate insulating film and a semiconductor film 8 are formed, and unnecessary portions of the semiconductor film 8 are etched. Remove. Thereafter, a contact hole 6 was opened in the gate insulating film, then a drain electrode wiring 4 and a connection electrode 7 were formed in the same process, and further a display electrode 5 was formed to obtain a thin film transistor substrate for a 12-inch liquid crystal display. In this thin film transistor substrate, one pixel is formed by four display electrodes divided by two gate electrodes and two drain electrodes, and it is difficult to form a storage capacitor with a conventional thin film transistor substrate. However, in this embodiment, the storage capacitor electrode is formed of a transparent electrode, and the wiring electrode and the gate wiring electrode of the storage capacitor electrode are formed in the same process. Therefore, the storage capacitor electrode is divided into two gate electrodes and two drain electrodes. One pixel is composed of four display electrodes, and a storage capacitor can be further formed. Therefore, a liquid crystal display using the thin film transistor substrate has an advantage that display characteristics are good.

〔発明の効果〕〔The invention's effect〕

以上説明したように本発明は、ストレージキャパシタ
電極を透明電極で構成し、ストレージキャパシタ電極の
配線電極とゲート配線電極を同一の工程で形成するた
め、ゲート配線電極の断線がなく製造歩留りが高い薄膜
トランジスタ基板を提供できる効果がある。
As described above, according to the present invention, since the storage capacitor electrode is formed of a transparent electrode and the wiring electrode of the storage capacitor electrode and the gate wiring electrode are formed in the same step, the thin film transistor having a high production yield without disconnection of the gate wiring electrode This has the effect of providing a substrate.

【図面の簡単な説明】[Brief description of the drawings]

第1図は本発明の第1の実施例の薄膜トランジスタ基板
を示す模式的平面図、第2図は本発明の第2の実施例の
薄膜トランジスタ基板を示す模式的平面図、第3図は従
来の薄膜トランジスタ基板を示す模式的平面図である。 1…ストレージキャパシタ電極、2…ストレージキャパ
シタ配線電極、3…ゲート配線電極、4…ドレイン配線
電極、5…表示電極、6…コンタクトホール、7…接続
電極、8…半導体膜。
FIG. 1 is a schematic plan view showing a thin film transistor substrate according to a first embodiment of the present invention, FIG. 2 is a schematic plan view showing a thin film transistor substrate according to a second embodiment of the present invention, and FIG. FIG. 3 is a schematic plan view showing a thin film transistor substrate. DESCRIPTION OF SYMBOLS 1 ... Storage capacitor electrode, 2 ... Storage capacitor wiring electrode, 3 ... Gate wiring electrode, 4 ... Drain wiring electrode, 5 ... Display electrode, 6 ... Contact hole, 7 ... Connection electrode, 8 ... Semiconductor film.

───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7,DB名) G09F 9/30 338 G02F 1/1365 H01L 21/822 H01L 27/04 H01L 29/786 ──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. 7 , DB name) G09F 9/30 338 G02F 1/1365 H01L 21/822 H01L 27/04 H01L 29/786

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】n−1番目のストレージキャパシタ電極を
n番目のゲート配線電極に電気的に接続した構成の薄膜
トランジスタ基板において、ストレージキャパシタ電極
を透明電極で構成し、ストレージキャパシタ電極の配線
電極とゲート配線電極を同一工程で一体に形成したこと
を特徴とする薄膜トランジスタ基板。
1. A thin film transistor substrate having a structure in which an (n-1) th storage capacitor electrode is electrically connected to an nth gate wiring electrode, wherein the storage capacitor electrode is formed of a transparent electrode, and the storage capacitor electrode has a wiring electrode and a gate. A thin film transistor substrate wherein wiring electrodes are integrally formed in the same step.
JP31581289A 1989-12-04 1989-12-04 Thin film transistor substrate Expired - Lifetime JP3044725B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP31581289A JP3044725B2 (en) 1989-12-04 1989-12-04 Thin film transistor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP31581289A JP3044725B2 (en) 1989-12-04 1989-12-04 Thin film transistor substrate

Publications (2)

Publication Number Publication Date
JPH03175486A JPH03175486A (en) 1991-07-30
JP3044725B2 true JP3044725B2 (en) 2000-05-22

Family

ID=18069851

Family Applications (1)

Application Number Title Priority Date Filing Date
JP31581289A Expired - Lifetime JP3044725B2 (en) 1989-12-04 1989-12-04 Thin film transistor substrate

Country Status (1)

Country Link
JP (1) JP3044725B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW413955B (en) * 1997-10-18 2000-12-01 Samsung Electronics Co Ltd Liquid crystal displays and manufacturing methods thereof

Also Published As

Publication number Publication date
JPH03175486A (en) 1991-07-30

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