JP3015080U - Package for electronic parts - Google Patents

Package for electronic parts

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Publication number
JP3015080U
JP3015080U JP1994016658U JP1665894U JP3015080U JP 3015080 U JP3015080 U JP 3015080U JP 1994016658 U JP1994016658 U JP 1994016658U JP 1665894 U JP1665894 U JP 1665894U JP 3015080 U JP3015080 U JP 3015080U
Authority
JP
Japan
Prior art keywords
layer
cavity
package
plating layer
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1994016658U
Other languages
Japanese (ja)
Inventor
隆次 小松
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nihon Micron Co Ltd
Original Assignee
Nihon Micron Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nihon Micron Co Ltd filed Critical Nihon Micron Co Ltd
Priority to JP1994016658U priority Critical patent/JP3015080U/en
Application granted granted Critical
Publication of JP3015080U publication Critical patent/JP3015080U/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

(57)【要約】 【目的】 キャビティ部周囲の回路と一体にしてサイド
ウォールに導体めっき層を形成して、密着強度を強化し
て界面剥離を防止するとともに、対吸湿性に優れた電子
部品用パッケージを提供する。 【構成】 サイドウォールに導体めっき層を形成した電
子部品用パッケージにおいて、キャビティ部周囲に形成
した回路と一体にして導体めっき層が被着形成されたこ
とを特徴とする。
(57) [Abstract] [Purpose] An electronic component with excellent moisture absorption as well as a conductor plating layer is formed on the sidewalls to enhance the adhesion strength to prevent interfacial peeling and to be integrated with the circuit around the cavity. Provide the package for. In a package for an electronic component in which a conductor plating layer is formed on a side wall, the conductor plating layer is adhered and formed integrally with a circuit formed around the cavity.

Description

【考案の詳細な説明】[Detailed description of the device]

【0001】[0001]

【産業上の利用分野】[Industrial applications]

本考案は、半導体チップ等の電子部品を収容する電子部品用パッケージ、特に サイドウォールに形成した導体めっき層を通じてパッケージの電源層、アース層 等に接続する電子部品用パッケージに関する。 The present invention relates to an electronic component package that houses electronic components such as semiconductor chips, and more particularly to an electronic component package that is connected to a power supply layer, a ground layer, etc. of the package through a conductor plating layer formed on a sidewall.

【0002】[0002]

【従来の技術】[Prior art]

通常、端子と電源層、アース層等を接続するには、所要の位置にスルーホール を設けて、端子とスルーホールを回路で接続し、スルーホールを介して端子と電 源層またはアース層等を接続する。 これに比して、サイドウォールに形成した導体めっき層を通じてパッケージの 電源層、アース層等に接続する電子部品用パッケージは、一般に、図11および 図12に示したように、ボンディング端子80と電源層またはアース層等の内層 回路20を、キャビティ部のサイドウォールに形成した銅めっき等の導体めっき 層65によって接続している。この方法によれば、スルーホールを介して端子と 電源層またはアース層等を接続するための回路引き廻しやスルーホールを省略す ることができるなど製法上で簡便になりまた、より短距離で接続が可能になるな どの利点がある。 Usually, in order to connect a terminal to a power supply layer, a ground layer, etc., a through hole is provided at a required position, and the terminal and the through hole are connected by a circuit. Connect. On the other hand, a package for an electronic component, which is connected to a power layer, a ground layer, etc. of the package through a conductor plating layer formed on the sidewall, generally has a bonding terminal 80 and a power source as shown in FIGS. 11 and 12. The inner layer circuit 20 such as a layer or an earth layer is connected by a conductor plating layer 65 such as copper plating formed on the sidewall of the cavity. According to this method, it is possible to omit the circuit routing and the through hole for connecting the terminal and the power supply layer or the ground layer, etc. through the through hole. There are advantages such as being able to connect.

【0003】[0003]

【考案が解決しようとする課題】[Problems to be solved by the device]

しかしながら、上記パッケージにおいては、ボンディング端子80とサイドウ ォールに形成した導体めっき層65は、ボンディング端子80の断面のみで接続 されているため密着性に劣り、パッケージ本体の基板の基材と導体めっき層65 の熱膨張係数の差により、その界面が剥離する危険があるので接続の信頼性に問 題がある。また、パッケージ本体の基板の端面は吸湿し易く、キャビティ側の端 面と導体めっき層65の界面剥離の危険性をいっそう高め、対吸湿の信頼性にも 問題があり、さらに絶縁性劣化の起因ともなる。 本考案はこのような問題点を鑑みてなされ、サイドウォールに形成した導体め っき層の密着力を高めてパッケージ本体の基板との界面剥雌を防止し、さらにパ ッケージ本体の基板のキャビティ側の端面からの吸湿を的確に防止できる電子部 品用パッケージ(以下、パッケージという)を提供することを目的としている。 However, in the above package, the bonding terminal 80 and the conductor plating layer 65 formed on the side wall are inferior in adhesiveness because they are connected only by the cross section of the bonding terminal 80, and the base material of the substrate of the package body and the conductor plating layer. Due to the difference in the coefficient of thermal expansion of 65, there is a risk of the interface peeling, so there is a problem with the reliability of the connection. In addition, the end surface of the substrate of the package body easily absorbs moisture, which further increases the risk of interfacial peeling between the end surface on the cavity side and the conductor plating layer 65, and there is also a problem in reliability against moisture absorption. Will also be. The present invention has been made in view of the above problems, and enhances the adhesion of the conductor plating layer formed on the sidewall to prevent the interface between the package body and the substrate to be peeled off. It is an object of the present invention to provide a package for electronic parts (hereinafter referred to as a package) that can properly prevent moisture absorption from the side end surface.

【0004】[0004]

【課題を解決するための手段】[Means for Solving the Problems]

上記の目的を達成するために、本考案のパッケージは次の構成を備える。 すなわち、キャビティ部周囲にあらかじめ回路形成した基材を内層にして、こ れを積層してパッケージ本体の基板とし、キャビティを形成する面の側から内層 を削り出して、キャビティ部周囲の回路と一体にしてサイドウォールに導体めっ き層が施されたことを特徴とする。 また、あらかじめキャビティを形成する所要個所に窓明け加工を施して、サイ ドウォールに導体めっき層を施した後に回路形成し、この基材を内層にして他の 基材と貼り合わされたことを特徴とする。 上記の導体めっき層は、無電解めっきまたは電解めっきによって形成できる。 また、導体めっき層にはニッケルめっき、金めっき等の保護めっきを施しても良 い。 In order to achieve the above object, the package of the present invention has the following configuration. In other words, the base material on which the circuit is formed in advance around the cavity is used as the inner layer, and this is laminated to form the substrate of the package body, and the inner layer is carved out from the side of the surface that forms the cavity and integrated with the circuit around the cavity. It is characterized in that a conductor plating layer is applied to the side wall. In addition, it is characterized in that a required area for forming a cavity is pre-drilled, a conductor plating layer is applied to a side wall and then a circuit is formed, and this base material is used as an inner layer and bonded to another base material. To do. The conductor plating layer can be formed by electroless plating or electrolytic plating. Further, the conductor plating layer may be subjected to protective plating such as nickel plating and gold plating.

【0005】[0005]

【作用】[Action]

サイドウォールに被着形成された導体めっき層は、基板のキャビティ部周囲の 回路と一体にして形成されるので、強い密着力を実現して界面剥離を防止する。 また、導体めっき層は、パッケージ本体の基板のキャビティ側の端面を包み込 むように形成されるので吸温を的確に防止する。 また、導体めっき層に保護めっきを施した場合は、その効果をさらに向上させ ることができる。 Since the conductor plating layer formed on the sidewall is formed integrally with the circuit around the cavity of the substrate, it realizes strong adhesion and prevents interfacial peeling. Further, the conductor plating layer is formed so as to wrap around the cavity-side end surface of the substrate of the package body, so that heat absorption is accurately prevented. In addition, when protective plating is applied to the conductor plating layer, the effect can be further improved.

【0006】[0006]

【実施例】【Example】

以下、本考案に係るパッケージ及びその製造方法に関する好適な実施例につい て添付図面とともに説明する。図では説明上、一部のみ示す。 (実施例1) 図1〜図5は本発明に係るパッケージの製造方法の第1実施例を示す。本実施 例は、キャビティ部周囲にあらかじめ回路形成した基材を内層にして、これを積 層してパッケージ本体の基板とし、キャビティを形成する面の側から内層を削り 出して、キャビティ部周囲の回路と一体にしてサイドウォールに導体めっき層が 被着形成する例である。 図1は、所要個所にボンディング端子等の内層回路と、キャビティ部周囲の 内層回路をあらかじめ形成した基材を内層にして、これを積層したパッケージ本 体の基板の断面図である。 つぎに、パッケージ本体の基板に所要の孔明け加工を行い、スルーホールめ っき50を施して、スルーホールを形成する。スルーホールめっきは、無電解銅 めっきを施した後、電解銅めっきを施して行う。 図2は、導体めっき層を形成する位置に合わせて、キャビティを形成する面 の側からルーター加工した状態の断面図である。このとき、所要の電源層または アース層等の内層回路20より若干オーバーして加工することが肝要である。こ うすることにより、後工程で形成する導体めっき層を確実に電源層またはアース 層等の内層回路20と接続することができる。 図3は、導体めっき層65を形成するための銅めっきを施した状態の断面図 である。この銅めっきは、無電解銅めっきを施した後、電解銅めっきを施して行 う。 このとき、無電解銅めっきのみ厚付けして、電解銅めっきを省略しても良い。 図4は、所要の外層回路35形成をした後、所要の内層回路に削り出し加工 を施した断面図である。図5は、その一部平面図である。 つぎに、ニッケルめっき、金めっき等の保護めっき90を施す。この保護め っきは、導体めっき層65の上にも施されるので、導体めっき層65の密着力が 強化され、また対吸湿性が向上されるので望ましい。 Hereinafter, preferred embodiments of a package and a manufacturing method thereof according to the present invention will be described with reference to the accompanying drawings. For the sake of explanation, only a part is shown in the figure. (Embodiment 1) FIGS. 1 to 5 show a first embodiment of a package manufacturing method according to the present invention. In this example, a base material on which a circuit has been formed in advance around the cavity is used as the inner layer, and this is laminated to form the substrate of the package body.The inner layer is ground from the side of the cavity forming surface, This is an example in which a conductor plating layer is adhered and formed on a sidewall integrally with a circuit. FIG. 1 is a cross-sectional view of a substrate of a package body in which an inner layer circuit such as a bonding terminal at a required location and an inner layer circuit around the cavity are formed in advance as an inner layer and the layers are laminated. Next, the substrate of the package body is subjected to a required punching process and the through-hole plating 50 is performed to form the through-hole. Through-hole plating is performed by electroless copper plating and then electrolytic copper plating. FIG. 2 is a cross-sectional view showing a state in which router processing is performed from the side of the surface on which the cavity is formed, according to the position where the conductor plating layer is formed. At this time, it is important to process the inner layer circuit 20 such as a required power source layer or a ground layer so as to be slightly over. By doing so, the conductor plating layer formed in the subsequent step can be reliably connected to the inner layer circuit 20 such as the power supply layer or the ground layer. FIG. 3 is a cross-sectional view showing a state in which copper plating for forming the conductor plating layer 65 is applied. This copper plating is performed by electroless copper plating and then electrolytic copper plating. At this time, only the electroless copper plating may be thickened and the electrolytic copper plating may be omitted. FIG. 4 is a cross-sectional view in which the required outer layer circuit 35 is formed and then the required inner layer circuit is subjected to shaving. FIG. 5 is a partial plan view thereof. Next, protective plating 90 such as nickel plating and gold plating is applied. Since this protective plating is also applied on the conductor plating layer 65, the adhesion of the conductor plating layer 65 is enhanced and the moisture absorption is improved, which is desirable.

【0007】 (実施例2) 図6〜図10は本発明に係るパッケージの製造方法の第2実施例を示す。本実 施例は、あらかじめキャビティを形成する所要個所に窓明け加工を施し、サイド ウォールに導体めっき層を被着形成して回路形成し、この基材を内層にして他の 基材と貼り合わせる例である。 まず、両面に銅箔10を被着形成した基材15に、キャビティを形成する所 要個所に窓明け40加工を施して、サイドウォールを形成する(図6)。 つぎに、インナーバイア45が必要な場合は所要の孔明け加工を行って、ス ルーホールめっきを施す。スルーホールめっきは、孔の内壁面および銅箔表面に めっき層を形成すると共に、サイドウォールに導体めっき層65を形成する(図 7)。 つぎに、インナーバイアおよびサイドウォールの導体めっき層65をインク 等で保護し、銅箔表面を研削して平坦化する。次いで、内層となる所要の回路を 形成する。このとき、キャビティ部周囲の回路25を形成し、この回路とサイド ウォールの導体めっき層65を一体にすることが肝要である(図8)。 つぎに、同様にして窓明け加工を施した、または窓明け加工を施していない 他の基材と貼り合わせ、インク等を用いてキャビティ部保護70を行う。このイ ンク等には、後のエッチングレジスト剥離工程に於いて剥離しないものを用いる (図9)。 つぎに、孔明け加工を行い、スルーホールめっきを施して、外層の所要回路 を形成する。 つぎに、キャビティ部保護をしていたインク等を除去し、ニッケルめっき、 金めっき等の保護めっきを施す(図10)。Second Embodiment FIGS. 6 to 10 show a second embodiment of the package manufacturing method according to the present invention. In this example, a window is formed in advance at a required location to form a cavity, a conductor plating layer is deposited on the side wall to form a circuit, and this base material is used as an inner layer and bonded to another base material. Here is an example. First, the base material 15 on which the copper foils 10 are adhered on both sides is subjected to a window opening 40 process at a position where a cavity is to be formed to form sidewalls (FIG. 6). Next, when the inner via 45 is required, the required perforating process is performed and the through hole plating is performed. Through-hole plating forms a plating layer on the inner wall surface of the hole and the copper foil surface, and also forms a conductor plating layer 65 on the sidewall (FIG. 7). Next, the conductor plating layers 65 of the inner vias and the sidewalls are protected with ink or the like, and the surface of the copper foil is ground and flattened. Then, a required circuit to be an inner layer is formed. At this time, it is important to form the circuit 25 around the cavity and integrate the circuit and the conductor plating layer 65 of the sidewall (FIG. 8). Next, similarly, another substrate having a window-opening process or another substrate not having a window-opening process is attached to the substrate, and the cavity 70 is protected by using ink or the like. As the ink and the like, one that will not be removed in the subsequent etching resist removing process is used (FIG. 9). Next, perforation processing is performed and through-hole plating is performed to form a required outer layer circuit. Next, the ink or the like that protected the cavity is removed, and protective plating such as nickel plating or gold plating is applied (FIG. 10).

【0008】[0008]

【考案の効果】[Effect of device]

本考案に係るパッケージは、上述したように、基板の回路と一体にしてサイド ウォールに導体めっき層が形成されるので、強い密着力を実現して界面剥離を防 止でき、またパッケージ本体の基板のキャビティ側の端面を包み込むように形成 されるので、吸湿を的確に防止する製品として提供することができる。 また、本考案に係るパッケージの製造方法によれば、積層したパッケージ本体 の基板の内層に削り出し加工を施すので、多層基板の高信頼性を実現する。 また、基板の回路と一体にしてサイドウォールに導体めっき層を被着形成する ので、密着強度に優れ、対吸湿の信頼性に著効を奏する。また、導体めっき層に ニッケルめっき、金めっき等の保護めっきを施した場合は、その効果をさらに向 上できる。 In the package according to the present invention, as described above, the conductor plating layer is formed on the side wall integrally with the circuit of the board, so that strong adhesion can be achieved and interface peeling can be prevented, and the board of the package body can be prevented. Since it is formed so as to enclose the end surface of the cavity side, it can be provided as a product that accurately prevents moisture absorption. Further, according to the method of manufacturing a package according to the present invention, the inner layer of the substrates of the laminated package bodies is subjected to the shaving process, so that high reliability of the multilayer substrate is realized. Further, since the conductor plating layer is formed on the sidewall integrally with the circuit of the substrate, the adhesion strength is excellent and the reliability against moisture absorption is remarkably effective. Further, when the conductor plating layer is subjected to protective plating such as nickel plating and gold plating, the effect can be further improved.

【図面の簡単な説明】[Brief description of drawings]

【図1】穣層したパッケージ本体の基板の断面図。FIG. 1 is a cross-sectional view of a substrate of a package body in which layers are stacked.

【図2】導体めっき層を形成するためのルーター加工を
した状態の断面図。
FIG. 2 is a cross-sectional view showing a state where a router process for forming a conductor plating layer is performed.

【図3】導体めっき層のための銅めっきを施した状態の
断面図。
FIG. 3 is a cross-sectional view showing a state in which copper plating for a conductor plating layer is applied.

【図4】外層に回路形成を行い、内層の削り出し加工を
施した状態の断面図。
FIG. 4 is a cross-sectional view of a state in which a circuit is formed on the outer layer and the inner layer is carved out.

【図5】図4の一部平面図。5 is a partial plan view of FIG.

【図6】窓明け加工を施して、サイドウォールを形成し
た状態の断面図。
FIG. 6 is a cross-sectional view showing a state where a side wall is formed by performing window opening processing.

【図7】サイドウォールに導体めっき層を形成した状態
の断面図。
FIG. 7 is a cross-sectional view showing a state where a conductor plating layer is formed on the sidewall.

【図8】キャビティ部周囲の回路を形成して、サイドウ
ォールの導体めっき層と一体にした状態の断面図。
FIG. 8 is a cross-sectional view showing a state in which a circuit around the cavity is formed and integrated with a conductor plating layer of a sidewall.

【図9】インク等でキャビティ部保護をした状態の断面
図。
FIG. 9 is a cross-sectional view of a state in which a cavity portion is protected by ink or the like.

【図10】キャビティ部保護をしていたインク等を除去
した状態の断面図。
FIG. 10 is a cross-sectional view of a state in which ink or the like that has protected the cavity is removed.

【図11】従来のパッケージの断面図。FIG. 11 is a sectional view of a conventional package.

【図12】図11の一部平面図。FIG. 12 is a partial plan view of FIG.

【符号の説明】[Explanation of symbols]

10 銅箔 15 基材 20 電源層またはアース層等の内層回路 25 キャビティ部周辺の回路 30 他の内層回路 35 外層回路 40 窓明け 45 インナーバイア 50 スルーホールめっき 60 導体めっき層形成用ドリル加工 65 導体めっき層 70 キャビティ部保護 80 ボンディング端子 85 他のボンディング端子 90 保護めっき 10 Copper Foil 15 Base Material 20 Inner Layer Circuit such as Power Supply Layer or Ground Layer 25 Circuit around Cavity 30 Other Inner Layer Circuit 35 Outer Layer Circuit 40 Opening Window 45 Inner Via 50 Through Hole Plating 60 Conductor Plating Layer Forming Drilling 65 Conductor Plating layer 70 Cavity protection 80 Bonding terminals 85 Other bonding terminals 90 Protection plating

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【手続補正書】[Procedure amendment]

【提出日】平成7年1月10日[Submission date] January 10, 1995

【手続補正1】[Procedure Amendment 1]

【補正対象書類名】明細書[Document name to be amended] Statement

【補正対象項目名】請求項2[Name of item to be corrected] Claim 2

【補正方法】変更[Correction method] Change

【補正内容】[Correction content]

【手続補正2】[Procedure Amendment 2]

【補正対象書類名】明細書[Document name to be amended] Statement

【補正対象項目名】請求項3[Name of item to be corrected] Claim 3

【補正方法】変更[Correction method] Change

【補正内容】[Correction content]

Claims (3)

【実用新案登録請求の範囲】[Scope of utility model registration request] 【請求項1】サイドウォールに形成した導体めっき層を
通じてパッケージの電源層、アース層等に接続する電子
部品用パッケージにおいて、 キャビティ部周囲に形成した回路と一体にしてサイドウ
ォールに導体めっき層が被着形成されたことを特徴とす
る電子部品用パッケージ。
1. In a package for electronic parts, which is connected to a power supply layer, an earth layer, etc. of a package through a conductor plating layer formed on a sidewall, the conductor plating layer covers the sidewall integrally with a circuit formed around the cavity. A package for electronic parts, which is characterized by being formed.
【請求項2】キャビティ部周囲にあらかじめ回路形成し
た基材を内層にして、これを積層してパッケージ本体の
基板とし、キャビティを形成する面の側から内層を削り
出して、キャビティ部周囲の回路と一体にしてサイドウ
ォールに導体めっき層が施された、請求項1記載の電子
部品用パッケージの製造方法。
2. A base material on which a circuit has been formed in advance around the cavity is used as an inner layer, and the base is laminated to form a substrate of a package body. The method of manufacturing an electronic component package according to claim 1, wherein a conductor plating layer is applied to the sidewall integrally with the side wall.
【請求項3】あらかじめキャビティを形成する所要個所
に窓明け加工を施して、サイドウォールに導体めっき層
を施した後、この導体めっき層と一体にしてキャビティ
部周囲に回路形成し、この基材を内層にして他の基材と
貼り合わせた、請求項1記載の電子部品用パッケージの
製造方法。
3. A base material is formed by forming a circuit around the cavity by integrally forming a cavity with a conductor plating layer by subjecting a side wall to a conductor plating layer by subjecting a window to a desired portion where a cavity is to be formed. The method for manufacturing an electronic component package according to claim 1, wherein the substrate is an inner layer and the substrate is attached to another substrate.
JP1994016658U 1994-12-07 1994-12-07 Package for electronic parts Expired - Lifetime JP3015080U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1994016658U JP3015080U (en) 1994-12-07 1994-12-07 Package for electronic parts

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1994016658U JP3015080U (en) 1994-12-07 1994-12-07 Package for electronic parts

Publications (1)

Publication Number Publication Date
JP3015080U true JP3015080U (en) 1995-08-29

Family

ID=43150662

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1994016658U Expired - Lifetime JP3015080U (en) 1994-12-07 1994-12-07 Package for electronic parts

Country Status (1)

Country Link
JP (1) JP3015080U (en)

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