JP2995335B2 - Two-terminal element - Google Patents
Two-terminal elementInfo
- Publication number
- JP2995335B2 JP2995335B2 JP22184090A JP22184090A JP2995335B2 JP 2995335 B2 JP2995335 B2 JP 2995335B2 JP 22184090 A JP22184090 A JP 22184090A JP 22184090 A JP22184090 A JP 22184090A JP 2995335 B2 JP2995335 B2 JP 2995335B2
- Authority
- JP
- Japan
- Prior art keywords
- liquid crystal
- film
- terminal element
- pixel electrode
- linear resistance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Liquid Crystal (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は計測器の表示パネル、パソコンの画像表示装
置、液晶テレビなどの液晶パネルにおける二端子素子に
関する。The present invention relates to a two-terminal element in a liquid crystal panel such as a display panel of a measuring instrument, an image display device of a personal computer, and a liquid crystal television.
本発明は、画素電極と駆動用電極間に非線形抵抗膜を
設けた二端子素子において、画素電極としてガラス基板
上に透明電極と絶縁膜を成膜し、パターニング時に絶縁
膜をサイドエッチングすることにより画素電極上に約１
μｍ小さい形状の絶縁膜を形成した。これにより粗いパ
ターンでも非線形抵抗膜の画素電極と駆動用電極間に挟
まれる面積を小さくでき、画素を小さくすることができ
る。The present invention provides a two-terminal device in which a non-linear resistance film is provided between a pixel electrode and a driving electrode, by forming a transparent electrode and an insulating film on a glass substrate as a pixel electrode, and by side-etching the insulating film during patterning. About 1 on the pixel electrode
An insulating film having a shape smaller by μm was formed. This makes it possible to reduce the area of the non-linear resistance film sandwiched between the pixel electrode and the driving electrode even with a coarse pattern, and to reduce the size of the pixel.
小型、軽量、薄型、低消費電力の表示装置として、液
晶表示装置は他の表示装置と比べて優位性を持ち、近年
実用化が進められて来ている。液晶表示装置の表示情報
量の増大化を図る目的で薄膜トランジスタなどの三端子
アクティブマトリクス液晶表示装置や、ZnOバリスタや
金属−絶縁膜−金属構造からなるいわゆるMIM形非線形
抵抗素子、絶縁膜部にSiリッチな窒化膜や酸化膜などを
用いた非線形抵抗素子などの二端子アクティブマトリク
ス液晶表示装置が研究されている。As a small, light, thin, and low power consumption display device, a liquid crystal display device has an advantage over other display devices, and has been put to practical use in recent years. In order to increase the amount of display information of the liquid crystal display device, a three-terminal active matrix liquid crystal display device such as a thin film transistor, a so-called MIM type nonlinear resistance element having a ZnO varistor or a metal-insulating film-metal structure, and an insulating film portion of Si. A two-terminal active matrix liquid crystal display device such as a nonlinear resistance element using a rich nitride film or an oxide film has been studied.
二端子素子は、三端子素子と比較して、形成膜数が少
なく、パターニング精度はかなり粗くてよいなどの特徴
があり、低コスト、大面積表示装置への応用が可能であ
る。A two-terminal element has features such as a smaller number of films formed and a relatively coarse patterning accuracy than a three-terminal element, and can be applied to a low-cost, large-area display device.
第４図は、非線形抵抗素子を用いた二端子アクティブ
マトリクス液晶表示装置のＸ−Ｙマトリクスパネル回路
図である。行液晶駆動電極と列液晶駆動電極は基板及び
対向基板にそれぞれ通常100〜1000本程形成される。Ｘ
−Ｙ交差部には液晶33と非線形抵抗素子34が形成され
る。第３図は非線形抵抗素子として、Siリッチな窒化シ
リコン膜などを用いた従来の二端子素子の正面図と側面
図である。透明基板上に画素電極22（I.T.O.）を選択的
に形成した後、非線形抵抗膜26（窒化シリコン）と駆動
電極23（Cr）を堆積し、それぞれを選択的にエッチング
した構造になっている。FIG. 4 is an XY matrix panel circuit diagram of a two-terminal active matrix liquid crystal display device using a nonlinear resistance element. Usually, about 100 to 1,000 row liquid crystal drive electrodes and column liquid crystal drive electrodes are formed on the substrate and the counter substrate, respectively. X
A liquid crystal 33 and a nonlinear resistance element 34 are formed at the -Y intersection. FIG. 3 is a front view and a side view of a conventional two-terminal element using a silicon-rich silicon nitride film or the like as a nonlinear resistance element. After a pixel electrode 22 (ITO) is selectively formed on a transparent substrate, a non-linear resistance film 26 (silicon nitride) and a drive electrode 23 (Cr) are deposited, and each is selectively etched.
このような液晶表示装置の駆動は次のように行う。第
４図の多数の行電極31を一本ずつ上の方から線順次に選
択し、その選択期間内に列電極32によってデータを書き
込む。このとき充分なコントラストで表示が行えるため
には、選択点での液晶に印加される実行電圧が液晶の飽
和電圧よりも大きいこと、非選択点での液晶に印加され
る実行電圧が液晶の闘値電圧よりも小さいことが必要で
ある。非線形抵抗膜を用いると、選択点では書き込み時
（高電圧印加時）には非線形抵抗膜26の抵抗が低くな
り、液晶33に電荷が注入されやすくなり、保持期間（低
電圧印加時）には、非線形抵抗膜26の抵抗が高くなり、
液晶33に注入された電荷が保持されやすくなる。こうし
て液晶33に印加される実行電圧を高く保つことができ
る。非選択時では書き込み時に非線形抵抗膜26の抵抗は
それ程低くならず液晶33にはあまり電荷は注入されな
い。よって液晶33に印加される実行電圧は比較的小さく
抑えられることになり、分割数をかなり大きくしても高
いコントラストを保てる。非線形抵抗素子においては、
書き込み期間、保持期間それぞれの期間に、非線形抵抗
膜が所望の抵抗値になるように膜の組成や構造を決定す
る。また、このような液晶表示装置で表示を行うにあた
って、十分な駆動マージンを得るためには、各々の画素
における液晶部の容量ＣLCと、非線形抵抗素子部の容量
CIとの比を十分大きくすることも必要である。The driving of such a liquid crystal display device is performed as follows. A large number of row electrodes 31 in FIG. 4 are line-sequentially selected one by one from the top, and data is written by the column electrodes 32 during the selection period. At this time, in order to perform display with sufficient contrast, the execution voltage applied to the liquid crystal at the selected point must be higher than the saturation voltage of the liquid crystal, and the execution voltage applied to the liquid crystal at the non-selected point must be equal to the liquid crystal. It must be smaller than the value voltage. When a non-linear resistance film is used, the resistance of the non-linear resistance film 26 at the selected point during writing (when a high voltage is applied) becomes low, electric charges are easily injected into the liquid crystal 33, and during the holding period (when a low voltage is applied). , The resistance of the nonlinear resistance film 26 increases,
The charge injected into the liquid crystal 33 is easily held. Thus, the execution voltage applied to the liquid crystal 33 can be kept high. At the time of non-selection, the resistance of the non-linear resistance film 26 does not decrease so much at the time of writing, and little charge is injected into the liquid crystal 33. Therefore, the execution voltage applied to the liquid crystal 33 can be kept relatively low, and high contrast can be maintained even if the number of divisions is considerably increased. In a nonlinear resistance element,
In each of the writing period and the holding period, the film composition and structure are determined so that the nonlinear resistance film has a desired resistance value. In order to obtain a sufficient driving margin when performing display with such a liquid crystal display device, it is necessary to set the capacitance CLC of the liquid crystal part and the capacitance of the non-linear resistance element part in each pixel.
It is also necessary to increase the ratio to CI sufficiently.
（最低でもＣLC/CI≧５） 〔発明が解決しようとする課題〕 このように非線形抵抗素子を用いた液晶表示装置で
は、画素が小さくなると容量比（ＣLC/CI）を十分大き
くするために非線形抵抗素子を小さくする必要があり、
従来の構造ではパターニング精度を上げる必要がある。
本発明はパターニング精度を上げることなく画素を小さ
くすることができる。また、成膜時のゴミ付着、パター
ニング不良等による点欠陥の対策して１画素を分割した
場合も同様である。(At least CLC / CI ≧ 5) [Problem to be Solved by the Invention] As described above, in a liquid crystal display device using a non-linear resistance element, when a pixel becomes small, a non-linear element is required to sufficiently increase a capacitance ratio (CLC / CI). It is necessary to reduce the resistance element,
In the conventional structure, it is necessary to increase the patterning accuracy.
According to the present invention, a pixel can be reduced without increasing patterning accuracy. The same applies to the case where one pixel is divided in order to prevent point defects due to dust adhesion during film formation, patterning failure, and the like.
本発明は上記問題点を解決するために、ガラス基板上
に透明電極と絶縁膜を成膜し、レジスト塗布、露光、現
像した後、絶縁膜、透明電極をエッチングし、画素電極
パターンを形成する。その後、レジスト剥離前に、絶縁
膜を再度エッチングすることにより画素電極上に約１μ
ｍ小さい形状の絶縁膜を形成した。次に非線形抵抗膜、
金属膜を成膜し、二端子素子および駆動用電極を形成す
る。The present invention solves the above problems by forming a transparent electrode and an insulating film on a glass substrate, applying a resist, exposing and developing, and then etching the insulating film and the transparent electrode to form a pixel electrode pattern. . After that, before the resist is stripped, the insulating film is etched again so that about 1 μm
An insulating film having a shape smaller by m was formed. Next, a nonlinear resistance film,
A metal film is formed, and a two-terminal element and a driving electrode are formed.
従来の方法では、二端子素子の面積は画素電極と駆動
用電極の線幅（約５μｍ）によって決まり面積を小さく
するためには、パターニング精度を向上する必要があっ
た。本発明では、二端子素子の面積は駆動用電極の線幅
と絶縁壁のサイドエッチング幅（約１μｍ）からなり、
パターニング精度を向上することなく小さくできる。In the conventional method, the area of the two-terminal element is determined by the line width (about 5 μm) of the pixel electrode and the driving electrode, and it is necessary to improve the patterning accuracy in order to reduce the area. In the present invention, the area of the two-terminal element is defined by the line width of the driving electrode and the side etching width of the insulating wall (about 1 μm),
The size can be reduced without improving the patterning accuracy.
以下に本発明の実施例を図面に基づいて説明する。第
１図および第２図は本発明の二端子素子を示す図であ
る。第１図は、絶縁膜にSi3N4を用いた場合で、非線形
抵抗膜６と画素電極２との重なる部分にSi3N4の絶縁膜
４が介在され、重なる部分の一部Ａで非線形抵抗膜６と
画素電極２とが接触する構造となっている。まず、I.T.
O.などの透明電極をスパッタ法などによって堆積し、さ
らに連続してSi3N4をPCVD法などにより堆積する。次に
画素電極パターンを選択的にエッチングすることによっ
て形成し、レジスタ剥離前に再度Si3N4をエッチングす
る。これにより画素電極上に約１μｍ小さいSi3N4膜５
が形成される。次に非線形抵抗膜６（例えばSiリッチな
SiNx）と駆動用電極３（例えばCr）をこの順に連続的に
堆積し、１回のマスク工程で連続的にエッチングする。
この時、画素電極２上のSi3N4膜５は駆動用電極３の下
以外は非線形抵抗膜６のエッチング時に同時にエッチン
グされる。Si3N4膜５の形状は２回目のエッチング時間
により決まり、二端子素子の面積を自由に変えられる。Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 and FIG. 2 are views showing a two-terminal element of the present invention. Figure 1 is a case of using the Si 3 N 4 in the insulating film, is part interposed Si 3 N 4 insulation film 4 overlaps with the non-linear resistance film 6 and the pixel electrode 2, a portion of the overlapping portion A The structure is such that the nonlinear resistance film 6 and the pixel electrode 2 are in contact with each other. First, IT
A transparent electrode such as O. is deposited by a sputtering method or the like, and Si 3 N 4 is continuously deposited by a PCVD method or the like. Next, a pixel electrode pattern is formed by selectively etching, and Si 3 N 4 is etched again before the resist is peeled off. As a result, the Si 3 N 4 film 5 about 1 μm smaller is formed on the pixel electrode.
Is formed. Next, the non-linear resistance film 6 (for example, Si rich
SiNx) and the driving electrode 3 (for example, Cr) are successively deposited in this order, and are continuously etched by one mask process.
At this time, the Si 3 N 4 film 5 on the pixel electrode 2 is etched simultaneously with the etching of the non-linear resistance film 6 except under the driving electrode 3. The shape of the Si 3 N 4 film 5 is determined by the second etching time, and the area of the two-terminal element can be freely changed.
第２図は、絶縁膜にポリイミドを用いた場合で、この
例でも非線形抵抗膜６と画素電極４と一部分Ｂで接触し
ている構造となっており、印刷法などによって成膜する
以外はSi3N4の場合と同様である。ポリイミド４は非線
形抵抗膜４のエッチング時にエッチングされずに画素電
極２上に残り、液晶の配向膜とすることも可能である。FIG. 2 shows a case in which polyimide is used for the insulating film. In this example, the non-linear resistance film 6 and the pixel electrode 4 are partially in contact with each other at B. for 3 N 4 is the same as. The polyimide 4 remains on the pixel electrode 2 without being etched when the non-linear resistance film 4 is etched, and can be used as a liquid crystal alignment film.
以上説明したように本発明によれば、パターニング精
度を向上させることなく二端子素子の面積を1/5程度に
小さくすることができる。As described above, according to the present invention, the area of the two-terminal element can be reduced to about 1/5 without improving the patterning accuracy.
これにより、70μｍ×70μｍ程度の画素をつくること
ができる。Thereby, a pixel of about 70 μm × 70 μm can be formed.
第１図と第２図の（ａ）、（ｂ）はそれぞれ本発明の二
端子素子を示す平面、断面図、第３図（ａ）、（ｂ）は
従来の二端子素子を示す平面、断面図、第４図は非線形
抵抗素子を用いた二端子アクティブマトリクス液晶表示
装置のＸ−Ｙマトリクスパネル回路図である。 1,21……基板 2,22……画素電極 3,23……駆動用電極 ４……ポリイミド ５……Si3N4 6,26……非線形抵抗膜 31……行液晶駆動用電極 32……列液晶駆動用電極 33……液晶 34……非線形抵抗素子1 (a) and 2 (b) are a plan view and a sectional view, respectively, showing a two-terminal element of the present invention, and FIGS. 3 (a), (b) are plan views showing a conventional two-terminal element, FIG. 4 is a cross-sectional view, and FIG. 4 is an XY matrix panel circuit diagram of a two-terminal active matrix liquid crystal display device using a nonlinear resistance element. 1,21 ...... substrate 2, 22 ...... pixel electrodes 3, 23 ...... driving electrode 4 ...... polyimide 5 ...... Si 3 N 4 6,26 ...... nonlinear resistive film 31 ...... line liquid crystal driving electrodes 32 ... … Column liquid crystal drive electrode 33… liquid crystal 34… non-linear resistance element
Claims (1)
形抵抗膜、駆動用電極などからなる二端子素子におい
て、前記画素電極と非線形抵抗膜の重なる部分のうち、
一部分で画素電極と非線形抵抗膜とを抵触させ、残りの
部分には絶縁膜を介在させたことを特徴とする二端子素
子。In a two-terminal element having a plurality of pixel electrodes on a transparent substrate and including a non-linear resistance film, a driving electrode, etc., in a portion where the pixel electrode and the non-linear resistance film overlap,
A two-terminal element characterized in that a pixel electrode and a non-linear resistance film are in contact with each other in one part and an insulating film is interposed in the remaining part.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22184090A JP2995335B2 (en) | 1990-08-23 | 1990-08-23 | Two-terminal element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22184090A JP2995335B2 (en) | 1990-08-23 | 1990-08-23 | Two-terminal element |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH04104129A JPH04104129A (en) | 1992-04-06 |
| JP2995335B2 true JP2995335B2 (en) | 1999-12-27 |
Family
ID=16773016
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP22184090A Expired - Fee Related JP2995335B2 (en) | 1990-08-23 | 1990-08-23 | Two-terminal element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2995335B2 (en) |
-
1990
- 1990-08-23 JP JP22184090A patent/JP2995335B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH04104129A (en) | 1992-04-06 |
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