JP2987549B2 - Power semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a large-capacity power semiconductor device.

[0002]

2. Description of the Related Art Conventionally, a large-capacity power semiconductor device such as a thyristor or a diode has a plurality of square chips 12 such as four or two square chips as shown in FIG. The wafer is diced linearly to obtain each square chip, and the square chip is mounted on a metal plate such as a copper plate or molybdenum or a metal plate soldered or fused to ceramics, and further packaged. To form a semiconductor device.

[0003]

As shown in FIG. 3, in order to form a square chip having a capacity 1.5 times larger than the capacity when four square chips are formed from the wafer 1, as shown in FIG. As described above, it is necessary to set the removal rate of wafers of the same size to two chips. In this case, the capacity is doubled, and the capacity is too large, and the utilization rate of the wafer is deteriorated. Therefore, as shown in FIG. 5, the size of the wafer is increased by one rank, and the take-up rate is set to 4 chips. For example, when the initially designed wafer size is 4 inches, if the wafer is 5 inches, a capacity of about 1.5 can be obtained.
There are problems such as the necessity of installing a large apparatus for the exposure machine and the like.

[0004]

In order to solve the above-mentioned problems, the present invention divides a wafer into two, four, and six equal parts to form chips in a fan shape, and die-sinks the wafer. Formed with chips.

[0005]

[Action] The wafer is divided into two equal parts, four equal parts, and six equal parts,
When the fan-shaped chip is formed, the area of the fan-shaped chip becomes about 1.5 times the area of the square chip.

[0006]

FIG. 1 shows an embodiment of a semiconductor device according to the present invention.
And FIG. In FIG. 1, reference numeral 1 denotes a wafer having a size of 3 to 6 inches. The wafer 1 is divided linearly and equally, and four large-capacity chips 2 such as thyristors, diodes, and transistors are formed in a fan shape. The wafer is linearly diced along each chip 2, each chip is mounted on a base, wiring is performed, and further packaging is performed to form a semiconductor device. Note that chip 2
Each corner is rounded so that a high voltage is not applied or a high current is not applied.

As a result, when the wafer is divided into four parts as shown in FIG. 1 and the diameter of the wafer is L, the area S1 of each chip 2 is given by Formula 1.

[0008]

(Equation 1)

On the other hand, as shown in FIG. 3, the area S2 of each chip 12 in the case of the conventional four-division is expressed by Equation 2.

[0010]

(Equation 2)

That is, when the wafer is divided into four parts as shown in FIG. 1, it is π / 2, that is, 1.57 times that when divided into four parts as shown in FIG. 3 with the same wafer size.

FIG. 2 shows a half-circle divided into two parts. Also in this case, the same wafer size is used to obtain π / 2, that is, 1.57%, from a chip divided into two as shown in FIG.
Double.

In addition to the above embodiment, the present invention can be applied to a case where a wafer is equally divided into six in a fan shape. Also in this case, the area of the fan-shaped divided into six is π / 2 of the square chip, that is, 1.
It becomes 57 times. However, if the division is made into eight or more, the division at the center of the wafer becomes too sharp, and it becomes difficult to use the chip practically.

In the above embodiment, the dicing apparatus cuts the wafer in a straight line. However, the dicing apparatus using a laser divides the wafer into three parts.
It is also possible to divide.

[0015]

As described above, according to the present invention, when a chip is formed in a fan shape, the area of the fan-shaped chip is 1.
5 times, and it is not necessary to increase the wafer size by one rank. Therefore, it is not necessary to provide a large apparatus such as a diffusion furnace and an exposure machine. In addition, since there is no portion to discard the wafer, resources are saved.

[Brief description of the drawings]

FIG. 1 is a plan view of one embodiment of a power semiconductor device of the present invention.

FIG. 2 is a plan view of another embodiment of the power semiconductor device of the present invention.

FIG. 3 is a plan view of a conventional power semiconductor device.

FIG. 4 is a plan view of a conventional power semiconductor device.

FIG. 5 is a plan view of a conventional power semiconductor device.

[Explanation of symbols]

 1 wafer 2 chip 3 corner

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Claims (1)

(57) [Claims] 1. A power semiconductor device formed by dividing a wafer into two, four, or six equal parts to form fan-shaped chips, and dicing the fan-shaped chips.