JP2975614B2 - Planar type semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application] The present invention is based on a PN junction between a semiconductor layer of a first conductivity type and a region of a second conductivity type selectively formed on a surface portion thereof. The present invention relates to a planar semiconductor device, such as a diode, a bipolar transistor, an insulated gate transistor, or an insulated gate bipolar transistor, provided with a field plate provided to extend a depletion layer close to the surface.

[Conventional technology]

FIG. 2 shows a conventional field plate structure. N ^- layer 2 and the N ⁺ of N-type silicon substrate comprising a layer 1 N ^- layer side principal surface 11
The P ⁻ region 4 is formed by selective diffusion using the insulating film 31 made of SiO ₂ as a mask. When a reverse bias is applied to the PN junction between the N ⁻ layer 2 and the P ⁻ region 4 between the main surface 11 and the opposite main surface 12, the depletion layer extends vertically from the P ⁻ region 4. In this case, since the edge side surface 13 of the silicon substrate has many defects and has low resistance, it has the same potential as the main surface 12, so that the depletion layer extends in the direction toward the edge portion 13. If the depletion layer extends too much, the breakdown voltage will be insufficient, and if it does not extend, the depletion layer will not be smooth, so breakdown will occur at that point. Therefore, it is necessary to take measures to make the depletion layer easily extend to some extent in the structure up to the edge. For that, PSG
Alternatively, a field plate 5 is provided which is in contact with the P ⁻ region 4 through an insulating film 32 made of SiN and extends in the edge direction in parallel with the main surface 11. Field plate 5 is made of a low-resistance material such as polycrystalline silicon or aluminum, and therefore has the same potential as P ⁻ region 4 within the plate width. Due to the capacitor formed by the field plate 5 and the silicon substrate 1, the silicon substrate under the plate has a certain potential, and a depletion layer indicated by a dotted line 6 has a substantially constant thickness under the plate 5 under reverse bias. It will be. On the vicinity of the edge of the main surface 11, a field plate 7 having substantially the same potential as the edge side surface 13, that is, the main surface 12 is formed of low-resistance polycrystalline silicon or the like. To reach the edge.

[Problems to be solved by the invention]

Since the thickness of the depletion layer under the field plate is almost constant, it works to extend the depletion layer to some extent. However, if one field plate is too long, the depletion layer does not extend smoothly. Therefore, when a high reverse bias is applied to a high withstand voltage semiconductor device, a region of a conductivity type different from that of the substrate is further provided at the end of one field plate structure, and a field plate structure in contact with the region is formed again. Had a way to repeat it.

It is an object of the present invention to provide a planar type semiconductor device in which a depletion layer under one field plate structure is extended more smoothly toward the edge of the substrate to withstand a high reverse bias.

[Means for solving the problem]

In order to achieve the above object, the present invention provides a semiconductor substrate, wherein a first conductivity type region is selectively provided on a surface portion of a first conductivity type layer, and the first conductivity type layer and the second conductivity type region are selectively provided. A field plate made of a low-resistance material is provided to extend a depletion layer formed by a PN junction between the semiconductor region and the surface of the semiconductor substrate. Extending through a first insulating layer made of SiO ₂ and a _second insulating layer made of PSG or SiN thereover between the base plate and the substrate, the field plate and the first and second insulating layers The first to third insulating layers are overlapped with a third insulating layer made of polyimide interposed therebetween at a portion on the edge side of the semiconductor substrate, and the first and third insulating layers are closer to the first and second conductive type regions. A second insulating layer and a field plate; Is composed of the first to third insulating layers and the field plate.

[Action]

In the portion where the field plate is connected to the semiconductor substrate via the thin insulating layer, a large-capacity capacitor is formed, and the thickness of the depletion layer generated in the semiconductor substrate below is large.
On the other hand, a capacitor having a small capacitance is formed in the portion where the thick insulating layer made of polyimide is located closer to the edge of the semiconductor substrate, and the thickness of the depletion layer generated in the semiconductor substrate thereunder is small. Therefore, the thickness of the depletion layer becomes thinner as it approaches the edge of the semiconductor substrate from the region of the second conductivity type, so that the depletion layer smoothly extends toward the edge.

〔Example〕

FIG. 1 shows an embodiment of the present invention, and portions common to FIG. 2 are denoted by the same reference numerals. The difference from FIG. 2 is that the field plate 5 made of polycrystalline silicon, Al, or the like is close to the P ⁻ region 4 on the main surface 11.
Although provided on the insulating film 32 made of PSG or SiN, at a position far from the P ⁻ region 4, that is, near the edge side surface 13 of the silicon substrate, the insulating film 33 further laminated on the insulating film 32 is formed. Provided above. The material of the insulating film 33 includes
Organic PSG such as polyimide so that the lower insulating films 31 and 32 are not damaged by acid or plasma during its formation.
Alternatively, an insulating film of SiN or the like can be formed only at a thickness of about 1.5 μm at a time, but polyimide can easily be formed at a thickness of about 20 μm. Therefore, when the thickness of the insulating film under the field plate 5 is increased to reduce the length of the field plate, for example, to obtain an insulating film having a thickness of 7 μm by PSG, the film must be formed five times. If it is polyimide, it only needs to be formed once. In addition, an organic insulating material has a small dielectric constant and is suitable for forming a capacitor having a small capacitance between itself and a substrate.
By forming a capacitor having a small capacitance, the depletion layer region 6 extends smoothly from beneath the portion where only the insulating film 32 exists without being sharply curved. In addition, organic insulating materials
It can be easily formed thick and can be easily processed by etching. If a photosensitive organic material is used, patterning is further simplified.

FIG. 3 shows an embodiment of an insulated gate transistor in which a plurality of P ⁻ channel regions 41 are formed in an N ⁻ layer 2 of a silicon substrate, and an N ⁺ source region 8 is formed on the surface of the channel region 41. Is formed. N channel region 41 ^-
In order to form an N-channel in a region sandwiched between the layer 2 and the N ⁺ source region 8, a gate 9 made of polycrystalline silicon is provided via a gate oxide film (not shown). Source electrode in contact with each channel region 41 and source region 8
The end of 50 extends toward the edge side 13 of the substrate
Field plate 5 on insulating film 33 and then on insulating film 33
To form The source electrode 50 and the field plate 5 are covered with a surface protective film 10 made of an inorganic material.

In the embodiment shown in FIG. 4, in an insulated gate transistor, an insulating film 33 is laminated on an insulating film 32 near an edge of a substrate to form a double insulating film.
In this embodiment, the depletion layer is more easily extended by forming a triple insulating film between the insulating films 32 and 33.

FIG. 5 is an embodiment in which a field plate 5 so as to obtain a high breakdown voltage several times through the guard ring 4, Figure 6 is a field plate 5 P ^- without contacting the region 4, the potential This is an embodiment in which is described. In the embodiment shown in FIG. 7, the insulating film 33 made of polyimide or the like is used.
Into an insulating film 32 made of PSG or the like and an insulating film 31 made of SiO ₂
It is interposed between.

〔The invention's effect〕

According to the present invention, the thickness of the insulating layer under the field plate from the region of the other conductivity type of the semiconductor substrate to the substrate edge is reduced at a portion close to the edge without damaging the lower insulating film at the time of formation. Since the capacitance of the capacitor formed under the field plate becomes smaller as approaching the edge by increasing the thickness with polyimide having a small dielectric constant, the depletion layer generated at the time of reverse bias to the PN junction becomes thinner as approaching the edge. Decrease and become smoother towards the edges. As a result, a planar type semiconductor device having a short edge structure and a field plate corresponding to a high withstand voltage can be easily obtained.

[Brief description of the drawings]

FIG. 1 is a partial sectional view of a planar type semiconductor device according to one embodiment of the present invention, FIG. 2 is a partial sectional view of a conventional planar type semiconductor device provided with a field plate, FIGS.
FIGS. 5, 6, and 7 are partial cross-sectional views of an insulated gate transistor showing different embodiments of the present invention. 1: Silicon substrate N ⁺ layer, 2: Silicon substrate N ^- layer, 31, 32, 33, 3
4: insulating film, 4:41: P ^- region, 5: field plate, 13: side surface of substrate edge.

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H01L 29/44 H01L 29/66 H01L 29/78

Claims (1)

(57) [Claims] 1. A semiconductor device according to claim 1, wherein a second conductivity type region is selectively provided on a surface portion of the first conductivity type layer of the semiconductor substrate, and a PN between the first conductivity type layer and the second conductivity type region is provided. A field plate made of a low-resistance material, which is provided to extend a depletion layer formed by the junction close to the surface of the semiconductor substrate, has a SiO 2 film between the substrate of the second conductivity type and the substrate toward the edge of the semiconductor substrate. First insulating layer consisting of ₂ and PSG or SiN on it
A third insulating layer made of polyimide is interposed between the field plate and the first and second insulating layers at a portion on the edge side of the semiconductor substrate between the field plate and the first and second insulating layers. The first to third insulating layers are stacked,
A side near the region of the second conductivity type includes first and second insulating layers and a field plate, and a side near the base edge includes first to third insulating layers and a field plate. Planar type semiconductor device.