JP2964478B2 - Surface mount type chip fuse resistor and method of manufacturing the same - Google Patents

Surface mount type chip fuse resistor and method of manufacturing the same

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Publication number
JP2964478B2
JP2964478B2 JP63194236A JP19423688A JP2964478B2 JP 2964478 B2 JP2964478 B2 JP 2964478B2 JP 63194236 A JP63194236 A JP 63194236A JP 19423688 A JP19423688 A JP 19423688A JP 2964478 B2 JP2964478 B2 JP 2964478B2
Authority
JP
Japan
Prior art keywords
chip
electrode
film
resistive film
electrodes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP63194236A
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Japanese (ja)
Other versions
JPH0243701A (en
Inventor
俊秀 鳴沢
正志 五味
嗣郎 太田
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KOOA KK
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KOOA KK
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Priority to JP63194236A priority Critical patent/JP2964478B2/en
Publication of JPH0243701A publication Critical patent/JPH0243701A/en
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Expired - Lifetime legal-status Critical Current

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  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Thermistors And Varistors (AREA)
  • Fuses (AREA)

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、表面実装型チップ状ヒューズ抵抗器とその
製造方法に関する。
The present invention relates to a surface-mounted chip-type fuse resistor and a method of manufacturing the same.

(従来の技術) 従来の表面実装型チップ状ヒューズ抵抗器は、特開昭
62−55832号公報に記載されているように、チップ状の
絶縁基板上の電極間に抵抗皮膜が形成され、この抵抗皮
膜にトリミングにより溶断部を形成し、この溶断部と絶
縁基板との間にガラスよりなる断熱層を介在させ、トリ
ミングによる負荷集中とガラスの断熱性とによって過電
流発生時の抵抗皮膜の溶断時間を短縮させた構造が知ら
れている。
(Prior art) Conventional surface mount chip type fuse resistors are disclosed in
As described in JP-A-62-55832, a resistive film is formed between electrodes on a chip-shaped insulating substrate, a fusing portion is formed on the resistive film by trimming, and a gap between the fusing portion and the insulating substrate is formed. There has been known a structure in which a heat insulating layer made of glass is interposed in the substrate, and the fusing time of the resistive film when an overcurrent occurs is shortened by the concentration of load by trimming and the heat insulating property of the glass.

また、チップ状ヒューズ抵抗器の製造方法としては、
上記特開昭62−55832号公報に記載されているように、 分割溝を有する絶縁基板上の各単位片毎に間隔を介し
て一対の電極を形成し、次に、この電極の中間部にガラ
ス断熱層を形成し、このガラス断熱層を含む抵抗皮膜形
成部分以外の全面に耐メッキ塗料によってマスクを施
し、次に、無電解ニッケルメッキを施して抵抗皮膜を形
成してマスクを剥離し、エージング後抵抗皮膜にトリミ
ングを施して抵抗値の調整と過電流発生時に溶断し易い
部分を形成する。
Also, as a method of manufacturing a chip-shaped fuse resistor,
As described in the above-mentioned JP-A-62-55832, a pair of electrodes is formed at intervals on each unit piece on an insulating substrate having a dividing groove, and then a pair of electrodes is formed at an intermediate portion of the electrodes. A glass heat insulating layer is formed, a mask is applied to the entire surface other than the resistance film forming portion including the glass heat insulating layer with a plating resistant paint, then, an electroless nickel plating is performed to form a resistance film, and the mask is peeled off, After aging, the resistance film is trimmed to adjust the resistance value and to form a portion that is easily blown when an overcurrent occurs.

そして、順次表面保護膜を形成した後、絶縁基板を短
冊状の細長板に分割し、この細長板の長さ方向に端面電
極を形成して、細長板をチップ状に分割する方法が採ら
れている。
Then, after sequentially forming the surface protective film, a method is adopted in which the insulating substrate is divided into strip-shaped elongated plates, end electrodes are formed in the length direction of the elongated plates, and the elongated plates are divided into chips. ing.

(発明が解決しようとする課題) しかしながら、上記特開昭62−55832号公報に記載の
構造のチップ状ヒューズ抵抗器では、トリミングによる
負荷集中とガラスの断熱性とによって抵抗皮膜の溶断速
度を短縮することはできるが、溶断部と絶縁基板との間
にガラスよりなる断熱層を介在させているため、溶断後
の抵抗皮膜の再接触を防ぐことは困難である。
(Problems to be Solved by the Invention) However, in the chip-shaped fuse resistor having the structure described in JP-A-62-55832, the fusing speed of the resistive film is reduced due to the load concentration by trimming and the heat insulating property of the glass. However, since a heat insulating layer made of glass is interposed between the fusing portion and the insulating substrate, it is difficult to prevent the resistance film from re-contacting after fusing.

さらに、上記特開昭62−55832号公報に記載のチップ
状ヒューズ抵抗器の製造方法によるときは、絶縁基板に
先ず多数の電極を形成し、次に電極間にガラス断熱層を
形成し、さらに抵抗皮膜を形成しているために断熱層や
電極と抵抗皮膜の接続部に段差ができて抵抗皮膜が均一
になりにくいという問題がある。
Further, according to the method for manufacturing a chip-shaped fuse resistor described in JP-A-62-55832, a large number of electrodes are first formed on an insulating substrate, and then a glass heat insulating layer is formed between the electrodes. Since the resistance film is formed, there is a problem that a step is formed in a heat insulating layer or a connection portion between the electrode and the resistance film, and it is difficult to make the resistance film uniform.

本発明は、上記問題点に鑑み、過電流発生時に抵抗皮
膜が溶断したときの再接触を防止するとともに、均一な
抵抗皮膜を容易に形成することのできる表面実装型チッ
プ状ヒューズ抵抗器とその製造方法を提供するものであ
る。
The present invention has been made in view of the above problems, and a surface-mounted chip-type fuse resistor capable of easily forming a uniform resistance film while preventing re-contact when the resistance film is blown when an overcurrent occurs, and a device therefor. It is intended to provide a manufacturing method.

(課題を解決するための手段) 請求項1記載の発明の表面実装型チップ状ヒューズ抵
抗器は、アルミナ角形絶縁チップ片と、このチップ片上
に形成されたパラジウムを主成分とした活性化処理膜層
と、この活性化処理膜層の上面に無電解メッキにより形
成されたニッケルを成分として含む抵抗皮膜と、前記チ
ップ片上の前記抵抗皮膜の上面両端に相対してそれぞれ
離間形成された一対の上面電極と、これら上面電極間の
前記抵抗皮膜にレーザートリミングにて形成された切溝
による負荷集中部と、この負荷集中部上に被覆形成され
炭化しない樹脂からなる低融点物質の絶縁断熱性の溶融
材と、前記チップ片の両端面からそれぞれ前記上面電極
の上面とこのチップ片の裏面まで連続して形成された端
面電極と、この端面電極を被覆するハンダ電極と、前記
チップ片の上面電極間の抵抗皮膜の上面に形成された耐
熱性エポキシ樹脂からなる保護コートとを具備したもの
である。
According to a first aspect of the present invention, there is provided a surface-mounted chip-type fuse resistor, comprising an alumina square insulating chip piece, and an activation treatment film containing palladium as a main component formed on the chip piece. Layer, a resistive film containing nickel as a component formed by electroless plating on the upper surface of the activation treatment film layer, and a pair of upper surfaces formed separately from each other on both ends of the upper surface of the resistive film on the chip piece. An electrode, a load concentrating portion formed by a kerf formed by laser trimming on the resistive film between the upper electrodes, and an insulating and heat-insulating material of a low melting point material made of a non-carbonized resin coated on the load concentrating portion. Material, an end face electrode formed continuously from both end faces of the chip piece to the upper face of the upper face electrode and the back face of the chip piece, and a solder electrode covering the end face electrode. And a protective coat made of a heat-resistant epoxy resin formed on the upper surface of the resistive film between the upper electrodes of the chip pieces.

請求項2記載の発明の表面実装型チップ状ヒューズ抵
抗器の製造方法は、アルミナ絶縁基板の表面にチップ片
単位に分割する分割溝を縦横に形成し、この分割溝が形
成された絶縁基板の前記分割溝と同一面のチップ片単位
に分割される両端抵抗皮膜形成位置に活性化ペーストを
印刷して焼成しパラジウムを主成分とした活性化処理膜
層を形成し、この活性化処理膜層上に無電解メッキによ
りニッケルを成分として含む抵抗皮膜を形成し、前記各
チップ片単位毎に前記抵抗皮膜上にそれぞれ相対して離
間した各一対の上面電極を形成し、前記各チップ片単位
毎に前記抵抗皮膜にレーザートリミングによって切溝に
よる負荷集中部を形成し、この負荷集中部上を炭化しな
い樹脂からなる塗料を印刷して形成される低融点物質の
絶縁断熱性の溶融材で被覆し、前記抵抗皮膜上を耐熱性
エポキシ樹脂塗料を塗布して熱硬化させて形成した保護
コートで被覆し、この保護コートを被覆した前記絶縁基
板を前記縦方向の分割溝から分割して短冊状の細長板を
形成し、この細長板の端面からそれぞれ前記上面電極の
上面とこの細長板の裏面までに連続して端面電極を形成
し、この端面電極が形成された細長板を横方向の分割溝
で角形チップ状に分割し、この端面電極を被覆するハン
ダ電極を形成するものである。
According to a second aspect of the present invention, there is provided a method of manufacturing a surface-mounted chip-type fuse resistor, wherein a dividing groove for dividing into chip pieces is formed vertically and horizontally on a surface of an alumina insulating substrate. Activating paste is printed and baked at both ends of the resistive film forming position divided into chip pieces on the same surface as the dividing groove to form an activated treatment film layer containing palladium as a main component. A resistive film containing nickel as a component is formed on the resistive film by electroless plating, and a pair of upper electrodes which are spaced apart from each other are formed on the resistive film for each chip piece unit, and each chip piece unit is formed. Forming a load concentrating portion by kerf on the resistance film by laser trimming, and printing a coating made of a resin that does not carbonize on the load concentrating portion; The resistive film is coated with a heat-resistant epoxy resin paint and coated with a protective coat formed by heat curing, and the insulating substrate coated with the protective coat is divided into strips by dividing the vertical dividing grooves. An elongated plate having a shape of a circle is formed, and an end surface electrode is continuously formed from an end surface of the elongated plate to an upper surface of the upper surface electrode and a back surface of the elongated plate. It is divided into square chips by the dividing grooves to form solder electrodes covering the end face electrodes.

(作用) 請求項1記載の発明の表面実装型チップ状ヒューズ抵
抗器は、アルミナ絶縁チップ片上に形成されたパラジウ
ムを主成分とした活性化処理膜層により、この活性化処
理膜層のパラジウムは核を形成し無電解メッキにより形
成されるニッケルを成分として含む抵抗皮膜がアルミナ
絶縁チップ片に強固に結合され、抵抗皮膜と上面電極と
は面接触となり、接触抵抗が小さく抵抗皮膜と上面電極
との間で接触不良によるジュール熱の発生がなく、上面
電極間の抵抗皮膜にレーザートリミングにて形成された
切溝による負荷集中部は熱が集中し易くなり、溶融する
絶縁断熱性の溶融材は炭化しない樹脂からなる低融点物
質のために溶融温度が低く、過電流発生時の抵抗皮膜の
溶断時間を短縮でき、溶解後に炭素が残留されず炭化の
原因が生じることなく抵抗皮膜が溶断しても内部粒子の
間隙に炭素が侵入することによる電気的導通がなく、熱
集中により溶融材によって溶断する抵抗皮膜が再接触す
ることがなく、また、端面電極はチップ片の両端面から
それぞれ上面電極の上面にまで連続して形成され、抵抗
被膜と端面電極とは接触抵抗が少なく、このチップ片の
裏面まで連続する端面電極により表面実装された状態で
裏面に連続した端面電極とチップ片の上面電極間の抵抗
皮膜との接続が確実となり、さらに、耐熱性エポキシ樹
脂からなる保護コートにより抵抗皮膜が確実に保護され
る。
(Function) In the surface-mounted chip-type fuse resistor according to the first aspect of the present invention, the palladium of the activation treatment film layer is formed by the activation treatment film layer mainly composed of palladium formed on the alumina insulating chip piece. A resistive film that forms a nucleus and contains nickel as a component formed by electroless plating is firmly bonded to the alumina insulating chip piece, and the resistive film and the top electrode come into surface contact, resulting in low contact resistance and a small contact resistance between the resistive film and the top electrode. There is no generation of Joule heat due to poor contact between the parts, and the load concentrated part due to the kerf formed by laser trimming on the resistive film between the upper electrodes becomes easier for heat to concentrate, and the molten insulating material that melts Low melting temperature due to low melting point material made of non-carbonized resin, shortening the fusing time of resistive film when overcurrent occurs, no carbon remains after melting, causing carbonization Even if the resistance film is blown out, there is no electrical conduction due to the penetration of carbon into the gaps of the internal particles, the resistance film blown out by the molten material due to heat concentration does not re-contact, and the end face electrode is It is formed continuously from both end surfaces of the chip piece to the upper surface of the upper surface electrode, and the resistance coating and the end surface electrode have low contact resistance. The connection between the continuous end face electrode and the resistive film between the upper electrodes of the chip piece is ensured, and the resistive film is surely protected by a protective coat made of a heat-resistant epoxy resin.

請求項2記載の表面実装型チップ状ヒューズ抵抗器の
製造方法は、アルミナ絶縁基板のチップ片単位に分割す
る分割溝を縦横に形成した表面と同一面のチップ片単位
の両端抵抗皮膜形成位置に活性化ペーストを印刷して焼
成することによりパラジウムを主成分とした活性化処理
膜層を容易に形成でき、この活性化処理膜層に形成され
るパラジウムの核に無電解メッキによりニッケルを成分
として含む抵抗皮膜が絶縁基板に強固に接合され、均一
な抵抗皮膜が容易に形成され、各チップ片単位毎の抵抗
皮膜と各一対の上面電極との間で接触不良によるジュー
ル熱の発生がなく、上面電極間の抵抗皮膜にレーザート
リミングにて形成された切溝による負荷集中部に熱が集
中し易くなり、過電流発生時に負荷集中部に熱集中し抵
抗皮膜の溶断時間を短縮でき、熱集中により溶融する絶
縁断熱性を有した溶融材は炭化しない樹脂からなる低融
点物質のために溶融温度が低くなり、溶解後に炭素が残
留されず炭化の原因が生じることなく抵抗皮膜が溶断し
ても内部粒子の間隙に炭素が侵入することによる電気的
導通がなく、熱集中により溶融材によって溶断する抵抗
皮膜が再接触することがなく、溶融材によって溶断する
抵抗皮膜が再接触することがなく、抵抗皮膜は保護コー
トで確実に保護できるとともにこの保護コートは耐熱性
エポキシ樹脂塗料を塗布して熱硬化させて形成するた
め、保護コートの形成が容易で、この保護コートを被覆
した絶縁基板を縦方向の分割溝から分割して短冊状とし
た細長板端面からそれぞれ上面電極の上面とこの細長板
の裏面までに連続して端面電極を形成するため、複数の
チップ片の端面電極が同時に効率よく形成でき、端面電
極はチップ片の両端面からそれぞれ上面電極の上面にま
で連続して形成され、抵抗被膜と端面電極とは接触抵抗
が少なく、このチップ片の裏面まで連続する端面電極に
より表面実装された状態で裏面に連続した端面電極とチ
ップ片の上面電極間の抵抗皮膜との接続が確実となり、
この端面電極が形成された細長板を横方向の分割溝でチ
ップ状に分割することによりチップ片の形成が容易とな
る。さらに、分割溝、活性化処理膜、抵抗皮膜、上面電
極および保護コートは同一面に形成したため製造が容易
となる。
A method for manufacturing a surface-mounted chip-type fuse resistor according to claim 2, wherein the dividing grooves for dividing the alumina insulating substrate into chip units are formed at both end resistance film forming positions on the same surface as the chip surface on which the dividing grooves are formed vertically and horizontally. By printing and firing the activation paste, an activation treatment film layer containing palladium as a main component can be easily formed, and nickel is used as a component by electroless plating on the palladium nucleus formed in the activation treatment film layer. The resistive film containing is firmly bonded to the insulating substrate, a uniform resistive film is easily formed, and there is no generation of Joule heat due to poor contact between the resistive film for each chip piece and each pair of upper electrodes. Heat easily concentrates on the load concentrated part due to the kerf formed by laser trimming on the resistive film between the upper electrodes, and when overcurrent occurs, heat concentrates on the load concentrated part and shortens the fusing time of the resistive film. The melting material that can be shrunk and melted by heat concentration has a low melting point made of a resin that does not carbonize. Even if it is blown, there is no electrical conduction due to the penetration of carbon into the gaps between the internal particles, and the resistance film that is blown by the molten material due to heat concentration does not re-contact, and the resistance film that is blown by the molten material re-contacts The protective film protects the resistance film with a protective coat, and since this protective coat is formed by applying a heat-resistant epoxy resin paint and curing by heat, it is easy to form a protective coat and coat this protective coat. The insulated substrate is divided from the vertical dividing grooves to form end-face electrodes continuously from the end face of the strip-shaped strip to the upper surface of the upper electrode and the back face of the strip. Therefore, the end face electrodes of a plurality of chip pieces can be formed efficiently at the same time, the end face electrodes are continuously formed from both end faces of the chip piece to the upper surface of the upper face electrode respectively, and the contact resistance between the resistive film and the end face electrode is small, In the state where the end surface electrode is continuous to the back surface of the chip piece, the connection between the end surface electrode continuous on the back surface and the resistive film between the top electrode of the chip piece in a state of being surface-mounted is ensured,
By dividing the elongated plate on which the end face electrodes are formed into chips by dividing grooves in the horizontal direction, the chip pieces can be easily formed. Further, since the dividing groove, the activation treatment film, the resistance film, the upper surface electrode, and the protective coat are formed on the same surface, the production becomes easy.

(実施例) 以下、本発明の表面実装型チップ状ヒューズ抵抗器の
一実施例の構成を第1図および第2図を参照して説明す
る。
(Embodiment) Hereinafter, a configuration of an embodiment of a surface-mounted chip-type fuse resistor of the present invention will be described with reference to FIGS. 1 and 2. FIG.

1は例えばアルミナ絶縁基板を分割したチップ片で、
このチップ片1上にパラジウム(Pd)を主成分とした活
性化処理膜層2が形成され、この活性化処理膜層2上に
ニッケル−リン(Ni−P)系、ニッケル−ボロン(Ni−
B)系、銅(Cu)系、ニッケル−タングステン(Ni−
W)系などのニッケルを成分として含む抵抗皮膜3が無
電解メッキにより形成される。さらに、この抵抗皮膜3
の上面両端には、銀(Ag)−樹脂ペーストの焼付け、ま
たは、スパッタ法にて形成されたニッケル−クロム(Ni
−Cr)、銅(Cu)系などの上面電極4,4がそれぞれ形成
されている。
Reference numeral 1 denotes a chip piece obtained by dividing an alumina insulating substrate, for example.
An activation treatment film layer 2 containing palladium (Pd) as a main component is formed on the chip piece 1, and a nickel-phosphorus (Ni-P) -based, nickel-boron (Ni-
B), copper (Cu), nickel-tungsten (Ni-
The resistive film 3 containing nickel as a component such as W) is formed by electroless plating. Furthermore, this resistance film 3
Silver (Ag) -resin paste is baked or nickel-chromium (Ni
-Cr), copper (Cu) based upper surface electrodes 4,4 are formed respectively.

また、これら上面電極4,4間の抵抗皮膜3には、レー
ザートリミングによりダブルリバースカットした切溝5
よりなる負荷集中部6が形成され、この負荷集中部6上
を絶縁断熱性を有した低融点物質である炭化しない樹
脂、例えばセルロース樹脂などの溶融材7が被覆形成さ
れている。さらに、必要に応じて抵抗皮膜3にはレーザ
ートリミングによって抵抗値調整用の切溝8が形成され
ている。また、前記溶融材7を含む抵抗皮膜3上には、
耐熱エポキシ樹脂よりなる保護コート9が形成されてい
る。
Further, the resistance film 3 between the upper electrodes 4, 4 is provided with a kerf 5 double-reverse cut by laser trimming.
A load concentrating portion 6 is formed, and a molten material 7 such as a non-carbonized resin, for example, a cellulose resin, which is a low melting point material having insulation and heat insulating properties, is formed on the load concentrating portion 6. Further, if necessary, a kerf 8 for adjusting a resistance value is formed in the resistance film 3 by laser trimming. Further, on the resistance film 3 including the molten material 7,
A protective coat 9 made of a heat-resistant epoxy resin is formed.

そして、チップ片1の両端面と裏面の一部および保護
コート9で被覆されない上面電極4,4の上面にかけて連
続してこの上面電極4,4と同様な材料よりなる端面電極1
0,10が形成され、さらに、この端面電極10,10を被覆す
るようにハンダ電極11,11が形成されて、チップ状ヒュ
ーズ抵抗器が形成されている。
Then, the end surface electrode 1 made of the same material as the upper surface electrodes 4, 4 continuously extends over both end surfaces and a part of the back surface of the chip piece 1 and the upper surfaces of the upper surface electrodes 4, 4 not covered with the protective coat 9.
0, 10 are formed, and further, solder electrodes 11, 11 are formed so as to cover the end face electrodes 10, 10, so that a chip-shaped fuse resistor is formed.

次に、上記チップ状ヒューズ抵抗器の製造方法を第3
図ないし第18図を参照して説明する。
Next, the manufacturing method of the chip-shaped fuse resistor is described in a third method.
This will be described with reference to FIGS.

(1)第3図において、12はアルミナ製の絶縁基板で、
この絶縁基板12には、表面に各チップ片単位1a毎に分割
溝13,14が縦横に形成されている。
(1) In FIG. 3, reference numeral 12 denotes an insulating substrate made of alumina.
On the surface of the insulating substrate 12, dividing grooves 13, 14 are formed vertically and horizontally for each chip piece unit 1a.

そして、第3図および第4図に示すように、絶縁基板
12の表面に各チップ片単位1aの長さ方向の縦方向に連続
して帯状に活性化ペーストの印刷を施し、500℃〜600℃
で焼成して各チップ片単位1aの表面長さ方向に活性化処
理膜層2を形成する。この活性化処理膜層2の活性化ペ
ーストはパラジウム(Pd)を主成分とした有機物バイン
ダーのペースト、または、パラジウム(Pd)を主成分と
したガラスバインダーペーストが用いられる。
Then, as shown in FIG. 3 and FIG.
The activation paste is printed on the surface of 12 in a strip shape continuously in the longitudinal direction of the length direction of each chip piece unit 1a, 500 to 600 ° C
To form the activation film layer 2 in the surface length direction of each chip piece unit 1a. As the activation paste for the activation treatment film layer 2, an organic binder paste containing palladium (Pd) as a main component or a glass binder paste containing palladium (Pd) as a main component is used.

(2)次に、第5図および第6図に示すように、絶縁基
板12の活性化処理膜層2上に無電解メッキを施して抵抗
皮膜3を形成する。この抵抗皮膜3は、ニッケル−リン
(Ni−P)系、ニッケル−ボロン(Ni−B)系、銅(C
u)系、ニッケル−タングステン(Ni−W)系等のニッ
ケルを成分として含む無電解メッキ液の何れかに絶縁基
板12を浸漬することにより、活性化処理膜層2に形成さ
れているパラジウムの核に無電解メッキによりニッケル
を成分として含む被膜が強固に結合され、活性化処理膜
層2が形成されていない部分のメッキ液は洗い流され
る。そして、エージングを施して各チップ片単位1aの活
性化処理膜層2上に抵抗皮膜3が形成される。
(2) Next, as shown in FIGS. 5 and 6, the activation film layer 2 of the insulating substrate 12 is subjected to electroless plating to form a resistance film 3. The resistance film 3 is made of nickel-phosphorus (Ni-P), nickel-boron (Ni-B), copper (C
u) -based or nickel-tungsten (Ni-W) -based electroless plating solution containing nickel as a component so that the insulating substrate 12 is immersed in the electroless plating solution. The coating containing nickel as a component is firmly bonded to the nucleus by electroless plating, and the plating solution in the portion where the activation treatment film layer 2 is not formed is washed away. Then, aging is performed to form the resistive film 3 on the activation processing film layer 2 of each chip piece unit 1a.

(3)さらに、第7図および第8図に示すように、抵抗
皮膜3が形成されたチップ片単位1aの上面の抵抗皮膜3
を含む両端に一対の上面電極4,4を形成する。この上面
電極4,4の形成は、銀(Ag)−樹脂ペーストを電極形成
部分に印刷して150℃〜200℃によって焼付けを施すか、
または、電極形成部分の他を金属マスクまたはレジスト
によってマスキングし、電極形成部分にニッケル−クロ
ム(Ni−Cr)、銅(Cu)系などをスパッタすることによ
り形成される。
(3) Further, as shown in FIGS. 7 and 8, the resistance film 3 on the upper surface of the chip piece unit 1a on which the resistance film 3 is formed.
A pair of upper surface electrodes 4, 4 are formed at both ends including. The upper electrodes 4 are formed by printing silver (Ag) -resin paste on the electrode forming portion and baking at 150 to 200 ° C.
Alternatively, it is formed by masking the other part of the electrode forming portion with a metal mask or a resist, and sputtering nickel-chromium (Ni-Cr), copper (Cu), or the like on the electrode forming portion.

(4)次いで、第9図および第10図に示すように、抵抗
皮膜3にレーザーによりダブルリバースカットの切溝5
を形成するレーザートリミングを施し、この切溝5によ
る負荷集中部6を形成するとともに抵抗値調整用の切溝
8をレーザートリーミングにより形成する。
(4) Next, as shown in FIG. 9 and FIG.
Is formed by laser trimming to form a load concentrating portion 6 by the cut groove 5 and a cut groove 8 for resistance value adjustment by laser trimming.

(5)次に、第11図および第12図に示すように、切溝5
による負荷集中部6上に、絶縁断熱性の低融点物の炭化
しない樹脂よりなる塗料を印刷し溶融材7を形成する。
(5) Next, as shown in FIG. 11 and FIG.
A coating made of a non-carbonized resin of a low melting point material having insulating and heat insulating properties is printed on the load concentrating portion 6 to form a molten material 7.

(6)次いで、第13図および第14図に示すように、溶融
材7を含む抵抗皮膜3上を絶縁基板12上で帯状に連続さ
せて耐熱エポキシ樹脂塗料で被覆して150℃〜200℃で硬
化させ、保護コート9を形成する。
(6) Next, as shown in FIGS. 13 and 14, the resistive film 3 including the molten material 7 is continuously formed in a strip shape on the insulating substrate 12 and covered with a heat-resistant epoxy resin paint. To form a protective coat 9.

(7)次に、第15図に示すように、絶縁基板12をチップ
片単位1aの長さ方向となる縦方向の分割溝13で分割して
チップ片単位1aが巾方向に連続した短冊形の細長板であ
る細長分割板1bを形成する。
(7) Next, as shown in FIG. 15, the insulating substrate 12 is divided by a vertical dividing groove 13 which is the longitudinal direction of the chip unit 1a, and the chip unit 1a is continuous in the width direction. The elongated divided plate 1b, which is the elongated plate of the above, is formed.

(8)さらに、第16図に示すように、細長板である細長
分割板1bの両側面全長とこの両側面に連続する上面電極
4の上面と下面の一部とに、銀(Ag)−樹脂塗料を塗布
して焼付けるか、または、スパッタによりニッケル−ク
ロム(Ni−Cu)、銅(Cu)系などの金属膜を形成して上
面電極4,4に接続する端面電極10,10を形成する。
(8) Further, as shown in FIG. 16, silver (Ag)-is added to the entire length of both sides of the elongated divided plate 1b, which is an elongated plate, and a part of the upper surface and the lower surface of the upper electrode 4 continuous on both sides. A resin paint is applied and baked, or a nickel-chromium (Ni-Cu) or copper (Cu) -based metal film is formed by sputtering, and the end face electrodes 10 and 10 connected to the top electrodes 4 and 4 are formed. Form.

(9)そして、細長分割板1bをチップ片単位1aの巾方向
となる横方向の分割溝14で分割して、第17図および第18
図に示すチップ片1を形成する。
(9) Then, the elongated dividing plate 1b is divided by the lateral dividing grooves 14 in the width direction of the chip unit 1a.
The chip piece 1 shown in the figure is formed.

(10)次に、チップ片1の端面電極10,10にニッケル(N
i)、ハンダ材料錫/鉛(Sn/Pb)をメッキしてハンダ電
極11,11を形成し、第1図および第2図に示す表面実装
型チップ状ヒューズ抵抗器の製品を得る。
(10) Next, nickel (N
i), tin / lead (Sn / Pb) solder material is plated to form solder electrodes 11, 11 to obtain a product of the surface-mounted chip-type fuse resistor shown in FIGS. 1 and 2.

次に、上記実施例の表面実装型チップ状ヒューズ抵抗
器の作用を示す。
Next, the operation of the surface mounted chip type fuse resistor of the above embodiment will be described.

上述の一実施例のチップ状ヒューズ抵抗器をトランジ
スタ、IC等の電子部品回路に表面実装して用いたとき、
各チップ片1の抵抗皮膜3と各一対の上面電極4との間
で接触不良によるジュール熱の発生がなく、上面電極間
の抵抗皮膜3の切溝5による負荷集中部6に熱が集中し
易くなり、過電流が発生すると、抵抗皮膜3の負荷集中
部6が過熱されるとともに、各チップ片1の抵抗皮膜3
と各一対の上面電極4との間で接触不良によるジュール
熱の発生がなく、上面電極4間の抵抗皮膜3に、過電流
発生時に溶融材7の断熱効果により熱を集中させ、負荷
集中部6に熱集中して溶融材7が速やかに溶融して抵抗
皮膜3の溶断時間を短縮でき、熱集中により溶融する絶
縁断熱性を有した溶融材7は炭化しない樹脂からなる低
融点物質のために、溶融材7によって溶断する抵抗皮膜
3は再接触することがなく、溶解後に炭素が残留されず
炭化の原因が生じることなく抵抗皮膜3が溶断しても内
部粒子の間隙に炭素が侵入することによる電気的導通が
なく、熱集中により溶断した抵抗皮膜3の再接触を防止
できる。
When the chip-shaped fuse resistor of the above-described embodiment is used by surface-mounting it on an electronic component circuit such as a transistor or an IC,
There is no generation of Joule heat due to poor contact between the resistive film 3 of each chip piece 1 and each pair of upper electrodes 4, and heat concentrates on the load concentrating portions 6 by the cut grooves 5 of the resistive film 3 between the upper electrodes. When an overcurrent occurs, the load concentrating portion 6 of the resistance film 3 is overheated and the resistance film 3
No Joule heat is generated due to poor contact between the upper electrode 4 and each pair of upper electrodes 4, and the heat is concentrated on the resistive film 3 between the upper electrodes 4 due to the heat insulating effect of the molten material 7 when an overcurrent occurs. 6, the molten material 7 is quickly melted by the heat concentration, and the melting time of the resistance film 3 can be shortened. In addition, even if the resistance film 3 melted by the molten material 7 does not come into contact again, no carbon remains after melting and the cause of carbonization does not occur, and the resistance film 3 melts, the carbon penetrates into the gap between the internal particles. As a result, there is no electrical continuity, and re-contact of the resistive film 3 blown by heat concentration can be prevented.

また、絶縁基板12に活性化処理膜層2を下地とする無
電解メッキによって抵抗皮膜3を形成することにより、
次にこの抵抗皮膜3上に上面電極4,4を形成したため、
抵抗皮膜3の上面電極4との接触部は面接触となり、均
一な抵抗皮膜3を容易に形成できる。
Further, by forming the resistance film 3 on the insulating substrate 12 by electroless plating with the activation treatment film layer 2 as a base,
Next, since the upper electrodes 4, 4 were formed on the resistance film 3,
The contact portion of the resistance film 3 with the upper surface electrode 4 is in surface contact, and a uniform resistance film 3 can be easily formed.

さらに、活性化処理膜層2は活性化ペーストを印刷し
て焼成することにより容易に形成でき、このパラジウム
を主成分とした活性化処理膜層2に形成されるパラジウ
ムの核に無電解メッキによりニッケルを成分として含む
抵抗皮膜3が絶縁基板に強固に接合され、均一な抵抗皮
膜3が容易に形成される。
Further, the activation treatment film layer 2 can be easily formed by printing and baking an activation paste, and the palladium nuclei formed in the activation treatment film layer 2 containing palladium as a main component are formed by electroless plating. The resistance film 3 containing nickel as a component is firmly bonded to the insulating substrate, and a uniform resistance film 3 is easily formed.

また、活性化処理膜層2を下地とする無電解メッキに
より抵抗皮膜3を形成するため、抵抗皮膜3の形成時に
絶縁基板12にマスキングを施すなどの必要がなく製造を
簡易化できる。
Further, since the resistance film 3 is formed by electroless plating with the activation treatment film layer 2 as a base, there is no need to mask the insulating substrate 12 when the resistance film 3 is formed, so that the production can be simplified.

また、絶縁基板12には分割溝13,14を形成した表面に
活性化処理膜層2、抵抗皮膜3および上面電極4、保護
コート9を形成するため、チップ片1を分割する際、分
割溝13,14と活性化処理膜層2、抵抗皮膜3および上面
電極4とを反対面に設けたものに比べてチップ片単位1a
毎に製造が容易で、略均一に容易にチップ状に分割で
き、製品間の特性をほぼ一定で歩留まりを向上できる。
Further, the activation substrate 2, the resistive film 3, the upper electrode 4, and the protective coat 9 are formed on the surface of the insulating substrate 12 where the dividing grooves 13 and 14 are formed. 13a and 14a and a chip piece unit 1a as compared with the case where the activation treatment film layer 2, the resistance film 3 and the upper surface electrode 4 are provided on the opposite surfaces.
Each of them is easy to manufacture, can be easily and substantially uniformly divided into chips, and the characteristics between products can be almost constant to improve the yield.

(発明の効果) 請求項1記載の発明によれば、アルミナ絶縁チップ片
上の活性化処理膜層にニッケルを成分として含む抵抗皮
膜が強固に結合され、抵抗皮膜と上面電極とは面接触と
なり、接触抵抗が小さく抵抗皮膜と上面電極との間で接
触不良によるジュール熱の発生がなく、上面電極間の抵
抗皮膜にレーザートリミングにて形成された切溝による
負荷集中部に熱が集中され易くなるとともに溶融材は炭
化しない樹脂からなる低融点物質のために溶融温度が低
くなり、この負荷集中部により過電流発生時の抵抗皮膜
の溶断時間を短縮でき、溶融材は炭化しない樹脂からな
る低融点物質のために、溶解後に炭素が残留されず炭化
の原因が生じることなく抵抗皮膜が溶断しても内部粒子
の間隙に炭素が侵入することによる電気的導通がないた
め、溶融材によって溶断する抵抗皮膜の再接触すること
がなく、端面電極はチップ片の両端面からそれぞれ上面
電極の上面にまで連続して形成され、抵抗被膜と端面電
極とは接触抵抗が少なく、このチップ片の裏面まで連続
する端面電極により表面実装された状態で裏面に連続し
た端面電極とチップ片の上面電極間の抵抗皮膜との接続
が確実となり、さらに、耐熱性エポキシ樹脂からなる保
護コートにより抵抗皮膜が確実に保護される。
(Effects of the Invention) According to the first aspect of the present invention, a resistance film containing nickel as a component is firmly bonded to an activation treatment film layer on an alumina insulating chip piece, and the resistance film and the upper surface electrode come into surface contact, Low contact resistance and no Joule heat due to poor contact between the resistive film and the upper electrode. Heat is more likely to be concentrated on the load concentrated part due to the kerf formed by laser trimming on the resistive film between the upper electrode. In addition, the molten material has a low melting point due to the low melting point material made of non-carbonized resin, and the load concentration part can reduce the fusing time of the resistance film when overcurrent occurs. Due to the substance, carbon does not remain after dissolution, and there is no electrical conduction due to the penetration of carbon into the gaps of the internal particles even if the resistance film is blown without causing the cause of carbonization, The end face electrode is formed continuously from both end faces of the chip piece to the upper surface of the upper face electrode, respectively, without the re-contact of the resistance film melted by the molten material, and the contact resistance between the resistance film and the end face electrode is small. With the surface mounted by the end face electrode that continues to the back side of the chip piece, the connection between the end face electrode that is continuous on the back side and the resistive film between the top electrode of the chip piece is ensured, and furthermore, with the protective coat made of heat resistant epoxy resin The resistive film is reliably protected.

請求項2記載の発明によれば、表面にチップ片単位に
分割する分割溝を縦横に形成したアルミナ絶縁基板のチ
ップ片単位に分割される両端抵抗皮膜形成位置に活性化
処理膜層を容易に形成でき、抵抗皮膜が絶縁基盤に強固
に接合され、均一な抵抗皮膜が容易に形成され、各チッ
プ片単位毎の抵抗皮膜と各一対の上面電極との間で接触
不良によるジュール熱の発生がなく、上面電極間の抵抗
皮膜にレーザートリミングにて形成された切溝による負
荷集中部に熱が集中され易くなり、熱集中により過電流
発生時の抵抗皮膜の溶断時間を短縮でき、溶融材は炭化
しない樹脂からなる低融点物質のために溶解後に炭素が
残留されず炭化の原因が生じることなく抵抗皮膜が溶断
しても内部粒子の間隙に炭素が侵入することによる電気
的導通がないため、溶融材によって溶断する抵抗被膜の
再接触することがなく、抵抗皮膜は保護コートで確実に
保護できるとともに保護コートの形成が容易で、複数の
チップ片の端面電極が同時に効率よく形成でき、端面電
極はチップ片の両端面からそれぞれ上面電極の上面にま
で連続して形成され、抵抗皮膜と端面電極とは接触抵抗
が少なく、このチップ片の裏面まで連続する端面電極に
より表面実装された状態で裏面に連続した端面電極とチ
ップ片の上面電極間の抵抗皮膜との接続が確実となり、
この端面電極が形成された細長板を分割溝でチップ状に
分割することによりチップ片が容易となる。さらに、分
割溝、活性化処理膜、抵抗皮膜、上面電極および保護コ
ートは同一面に形成したために製造を簡易化でき、製造
が容易となる。また、分割溝、活性化処理膜、抵抗皮
膜、上面電極および保護コートを同一面に形成したた
め、略均一に容易にチップ状に分割でき、安定した特性
が得られる。
According to the second aspect of the present invention, the activation treatment film layer can be easily formed at the position where both ends of the alumina insulating substrate are divided into chip pieces on the surface where the dividing grooves for dividing the chip pieces are formed vertically and horizontally. The resistive film is firmly bonded to the insulating base, and a uniform resistive film is easily formed. Joule heat is generated due to poor contact between the resistive film of each chip piece and each pair of upper electrodes. In addition, heat is easily concentrated at the load concentrated part due to the kerf formed by laser trimming on the resistive film between the upper electrodes, and the heat concentration can reduce the fusing time of the resistive film when overcurrent occurs. Because there is no electrical conduction due to the penetration of carbon into the gaps of the internal particles even if the resistance film is blown off without causing carbonization after melting due to the low melting point substance made of resin that does not carbonize, The resistive film that is melted by the molten material does not re-contact, the resistive film can be reliably protected by the protective coat and the protective coat can be easily formed, and the end electrodes of a plurality of chip pieces can be formed simultaneously and efficiently. Are formed continuously from both end surfaces of the chip piece to the upper surface of the top electrode, respectively.The contact resistance between the resistive film and the end electrode is low. The connection between the end face electrode and the resistive film between the top electrodes of the chip piece is
By dividing the elongated plate on which the end surface electrodes are formed into chips by dividing grooves, chip pieces can be easily formed. Further, since the dividing groove, the activation treatment film, the resistance film, the upper surface electrode and the protective coat are formed on the same surface, the production can be simplified and the production becomes easy. In addition, since the dividing groove, the activation film, the resistive film, the upper electrode, and the protective coat are formed on the same surface, they can be divided into chips uniformly and easily, and stable characteristics can be obtained.

【図面の簡単な説明】[Brief description of the drawings]

第1図は本発明の表面実装型チップ状ヒューズ抵抗器の
縦断正面図、第2図は同上平面図、第3図ないし第18図
は同上製造工程説明図で、第3図は活性化処理膜層を形
成した絶縁基板の一部の平面図、第4図は同上A−A線
断面図、第5図は抵抗皮膜を形成した絶縁基板の一部の
平面図、第6図は同上A−A線断面図、第7図は上面電
極を形成した絶縁基板の一部の平面図、第8図は同上B
−B線断面図、第9図、第10図は抵抗皮膜にトリミング
を施した絶縁基板の一部の平面図、第11図は溶融材を形
成した絶縁基板の一部の平面図、第12図は同上B−B線
断面図、第13図は保護コートを施した絶縁基板の一部の
平面図、第14図は同上A−A線断面図、第15図は細長分
割板の一部の平面図、第16図は端面電極を形成した細長
分割板の平面図、第17図は分割されたチップ片の平面
図、第18図は同上縦断正面図である。 1……チップ片、1a……チップ片単位、1b……細長板で
ある細長分割板、2……活性化処理膜層、3……抵抗皮
膜、4……上面電極、5……切溝、6……負荷集中部、
7……溶融材、9……保護コート、10……端面電極、11
……ハンダ電極、12……絶縁基板、13,14……分割溝。
FIG. 1 is a vertical sectional front view of a surface mount type chip-type fuse resistor of the present invention, FIG. 2 is a plan view of the same, FIG. 3 to FIG. FIG. 4 is a cross-sectional view taken along the line AA in FIG. 4, FIG. 5 is a plan view of a part of the insulating substrate on which a resistive film is formed, and FIG. 7 is a plan view of a part of the insulating substrate on which the upper electrode is formed, and FIG.
9 and 10 are plan views of a part of the insulating substrate obtained by trimming the resistive film, FIG. 11 is a plan view of a part of the insulating substrate formed with a molten material, and FIG. FIG. 13 is a cross-sectional view taken along the line BB in FIG. 13, FIG. 13 is a plan view of a part of the insulating substrate provided with a protective coating, FIG. 14 is a cross-sectional view taken in the line AA in FIG. 16, FIG. 16 is a plan view of an elongated divided plate on which an end face electrode is formed, FIG. 17 is a plan view of a divided chip piece, and FIG. 18 is a vertical sectional front view of the same. DESCRIPTION OF SYMBOLS 1 ... Chip piece, 1a ... Chip piece unit, 1b ... Slender divided plate which is an elongated plate, 2 ... Activation treatment film layer, 3 ... Resistive film, 4 ... Top electrode, 5 ... Cut groove , 6 ... Load concentration part,
7 ... molten material, 9 ... protective coat, 10 ... end face electrode, 11
…… Solder electrode, 12 …… Insulating substrate, 13,14 …… Division groove.

フロントページの続き (72)発明者 太田 嗣郎 長野県伊那市大字伊那3672番地 コーア 株式会社内 (56)参考文献 特開 昭52−48045(JP,A) 特開 昭55−157207(JP,A) 特開 昭63−14402(JP,A) 実開 昭53−64237(JP,U)Continuation of the front page (72) Inventor Shiro Ota 3672 Ina, Ina-shi, Nagano Koa Co., Ltd. (56) References JP-A-52-48045 (JP, A) JP-A-55-157207 (JP, A) JP-A-63-14402 (JP, A) JP-A-53-64237 (JP, U)

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】アルミナ絶縁角形チップ片と、 このチップ片上に形成されたパラジウムを主成分とした
活性化処理膜層と、 この活性化処理膜層の上面に無電解メッキにより形成さ
れたニッケルを成分として含む抵抗皮膜と、 前記チップ片上の前記抵抗皮膜の上面両端に相対してそ
れぞれ離間形成された一対の上面電極と、 これら上面電極間の前記抵抗皮膜にレーザートリミング
にて形成された切溝による負荷集中部と、 この負荷集中部上に被覆形成され炭化しない樹脂からな
る低融点物質の絶縁断熱性の溶融材と、 前記チップ片の両端面からそれぞれ前記上面電極の上面
とこのチップ片の裏面まで連続して形成された端面電極
と、 この端面電極を被覆するハンダ電極と、 前記チップ片の上面電極間の抵抗皮膜の上面に形成され
た耐熱性エポキシ樹脂からなる保護コートと を具備したことを特徴とする表面実装型チップ状ヒュー
ズ抵抗器。
1. An alumina-insulated square chip, an activation film layer mainly composed of palladium formed on the chip chip, and nickel formed by electroless plating on the upper surface of the activation film layer. A resistive film containing as a component, a pair of upper surface electrodes formed to be spaced apart from both ends of the upper surface of the resistive film on the chip piece, and a kerf formed by laser trimming in the resistive film between these upper surface electrodes A load concentrating portion, a heat insulating insulating material of a low melting point material made of a resin that is formed on the load concentrating portion and is not carbonized, and an upper surface of the upper surface electrode and an upper surface of the chip piece from both end surfaces of the chip piece, respectively. An end surface electrode formed continuously to the back surface; a solder electrode covering the end surface electrode; and a heat resistant electrode formed on the upper surface of the resistive film between the upper surface electrodes of the chip piece. Surface mount chip-like fuse resistors, characterized by comprising a protective coating consisting of carboxymethyl resin.
【請求項2】アルミナ絶縁基板の表面にチップ片単位に
分割する分割溝を縦横に形成し、 この分割溝が形成された絶縁基板の前記分割溝と同一面
のチップ片単位に分割される両端抵抗皮膜形成位置に活
性化ペーストを印刷して焼成しパラジウムを主成分とし
た活性化処理膜層を形成し、 この活性化処理膜層上に無電解メッキによりニッケルを
成分として含む抵抗皮膜を形成し、 前記各チップ片単位毎に前記抵抗皮膜上にそれぞれ相対
して離間した各一対の上面電極を形成し、 前記各チップ片単位毎に前記抵抗皮膜にレーザートリミ
ングによって切溝による負荷集中部を形成し、 この負荷集中部上を炭化しない樹脂からなる塗料を印刷
して形成される低融点物質の絶縁断熱性の溶融材で被覆
し、 前記抵抗皮膜上を耐熱性エポキシ樹脂塗料を塗布して熱
硬化させて形成した保護コートで被覆し、 この保護コートを被覆した前記絶縁基板を前記縦方向の
分割溝から分割して短冊状の細長板を形成し、 この細長板の端面からそれぞれ前記上面電極の上面とこ
の細長板の裏面までに連続して端面電極を形成し、 この端面電極が形成された細長板を前記横方向の分割溝
で角形チップ状に分割し、この端面電極を被覆するハン
ダ電極を形成する ことを特徴とする表面実装型チップ状ヒューズ抵抗器の
製造方法。
2. A split groove for dividing into chip units is formed vertically and horizontally on the surface of an alumina insulating substrate, and both ends of the insulating substrate formed with the split grooves are divided into chip units on the same plane as the split grooves. An activation paste is printed and baked at the resistive film forming position to form an activation-treated film layer containing palladium as a main component, and a resistive film containing nickel as a component is formed on the activated treatment film layer by electroless plating. Forming a pair of upper electrodes spaced apart from each other on the resistance film for each of the chip pieces; and forming a load concentration portion by a kerf on the resistance film for each of the chip pieces by laser trimming. A coating made of a non-carbonized resin is formed on the load concentrating portion, and coated with a low-melting-point insulating and heat-insulating molten material formed on the load concentration portion, and a heat-resistant epoxy resin coating is formed on the resistance film. The insulating substrate coated with the protective coat is divided from the vertical dividing groove to form a strip-shaped strip, and the end face of the strip is formed from the end face of the strip. An end electrode is formed continuously from the upper surface of the upper electrode to the back surface of the elongated plate. The elongated plate on which the end electrode is formed is divided into square chips by the lateral dividing grooves. A method for manufacturing a surface-mounted chip-type fuse resistor, comprising: forming a solder electrode for covering a chip.
JP63194236A 1988-08-03 1988-08-03 Surface mount type chip fuse resistor and method of manufacturing the same Expired - Lifetime JP2964478B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63194236A JP2964478B2 (en) 1988-08-03 1988-08-03 Surface mount type chip fuse resistor and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63194236A JP2964478B2 (en) 1988-08-03 1988-08-03 Surface mount type chip fuse resistor and method of manufacturing the same

Publications (2)

Publication Number Publication Date
JPH0243701A JPH0243701A (en) 1990-02-14
JP2964478B2 true JP2964478B2 (en) 1999-10-18

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0433230A (en) * 1990-05-29 1992-02-04 Mitsubishi Materials Corp Chip type fuse
JPH0611304U (en) * 1992-07-15 1994-02-10 コーア株式会社 Overcurrent protection parts
US5974661A (en) * 1994-05-27 1999-11-02 Littelfuse, Inc. Method of manufacturing a surface-mountable device for protection against electrostatic damage to electronic components
US5552757A (en) * 1994-05-27 1996-09-03 Littelfuse, Inc. Surface-mounted fuse device
TW541556B (en) * 2000-12-27 2003-07-11 Matsushita Electric Ind Co Ltd Circuit protector
JP4569152B2 (en) * 2004-04-14 2010-10-27 パナソニック株式会社 Method for manufacturing circuit protection element
JP4487963B2 (en) * 2006-03-27 2010-06-23 Tdk株式会社 Varistor and light emitting device
JP6650572B2 (en) * 2015-02-19 2020-02-19 パナソニックIpマネジメント株式会社 Manufacturing method of circuit protection element
CN106847447B (en) * 2017-01-03 2018-09-21 常州安斯电子有限公司 A kind of chip resistance value safety resistor and its production technology
CN110622260B8 (en) * 2017-06-29 2021-11-26 李尚祐 Anti-surge winding low-temperature fusing resistor and manufacturing method thereof

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5248045A (en) * 1975-10-15 1977-04-16 Ozawa Jiyuichirou Thinnfilm fuse resistor
JPS5550965Y2 (en) * 1976-11-04 1980-11-27
JPS55157207A (en) * 1979-05-26 1980-12-06 Matsushita Electric Ind Co Ltd Fusion type chip resistor
JPS6314402A (en) * 1986-07-04 1988-01-21 多摩電気工業株式会社 Manufacture of chip resistor

Also Published As

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JPH0243701A (en) 1990-02-14

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