JP2927803B2 - Constant voltage generator - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a constant voltage generating circuit, and more particularly to a constant voltage generating circuit called a △ _VT type.

[Conventional technology]

Conventionally, this type of constant voltage generating circuit has a structure in which a substrate and a source are commonly connected and an output voltage terminal is connected to a gate, as shown in FIG.
N-channel first MOS transistor Q connected to T _O
1 and a second N-channel with a substrate and connected MOS transistors Q ₁ and different threshold voltages in common connected gates to a ground potential terminal which is a first power supply voltage terminal to the substrate and the source of the MOS transistor Q ₁ source the MOS transistor Q _2, MO P-channel as a load of the MOS transistors Q _1, Q ₂
A _third N-channel transistor connected between the sources of the S transistors Q ₃ and Q ₄ and the sources of the MOS transistors Q ₁ and Q ₂ and the ground potential terminal.
Output and the differential input section 1 _B in which a MOS transistor Q _5, the a source connected to a gate connected to the output terminal of the differential input section 1 _B in the second supply voltage terminal (power supply voltage V _DD) drain P-channel fourth MOS transistor Q ₆ connected to voltage terminal T _O
Fifth MOS transistor Q ₇ of the N-channel connected to the output voltage terminal T _O were connected to the ground potential terminal drain source and
An amplifier 2 having a preparative connects the first 6 MOS transistor Q ₈ and the source of the P-channel connecting a gate and a source connected to the second power supply voltage terminal to the ground potential terminal to the ground potential terminal drain and gate the the N-channel that is commonly connected to the drain of the MOS transistor Q ₈ 7 of the MOS transistor Q ₉
Preparative comprising the MOS transistors MOS transistors Q ₅ the gate of Q _9, MOS transistors Q ₅ form a current mirror circuit together with these and connected to the gate of Q _7, Q ₇ to the constant current generator to supply a predetermined current And a section 3.

The substrates of the P-channel MOS transistors Q ₃ , Q ₄ , Q ₆ , and Q ₈ are all connected to the second power supply voltage terminal, and the N-channel
The substrates of the MOS transistors Q ₅ , Q ₇ and Q ₉ are all connected to the ground potential terminal.

Why the potential of the MOS transistors Q _1, Q ₂ of the substrate of the differential input section 1 _B had become the source potential of the MOS transistors Q _1, Q ₂ itself, each of the MOS transistors Q ₁ due to a temperature change or the like, Q ₂
Even if the operating conditions change, the threshold voltage does not change due to the dependency of the threshold voltage on the substrate-source voltage because the substrate-source voltage does not change. This is because it can be done.

[Problems to be solved by the invention]

The above-described conventional constant voltage generation circuit uses the MOS transistor Q
_1, since the substrate Q ₂ 'is in the configuration that is commonly connected to its own source, that the temperature change rate of those of the output voltage V _O' that can reduce the circuit characteristic variation factors of circuit design is large There are drawbacks.

 Next, the reason will be described.

In this type of circuit, the MOS transistor is designed to operate in the saturation region, so the drain current _ID of the MOS transistor is It can be considered that it is represented by Where μ is mobility and C _i
Is the gate capacitance per unit area, L and W are the channel length and channel width, respectively, V _GS is the gate-source voltage, V
_T is a threshold voltage.

Now, μ, L, W, I _D , V _GS , V
The _T, denoted by like subscripts and suffixes of respective transistors symbols (i.e., for example, mu ₁ shows the mobility of the MOS transistor Q ₁₎ intended to be.

From the equation (1), the drain currents of the MOS transistors Q ₁ and Q ₂ are respectively It is expressed as Solving these equations (2) and (3) for V _GS Therefore, if V _GS changes by ΔV _GS when the temperature changes by ΔT, Because represented as 'change of △ V _O' output voltage V _O is Becomes

The W / L ratio of the MOS transistors Q ₃ and Q ₄ is p: q, and the W / L ratio of the MOS transistors Q ₉ and Q ₅ is 1: α, that is, Since I _D1 = I _D3 , I _D2 = I _D4 , I _D1 + I _D2 = I _D5 , Becomes At this time Therefore, the change of the output voltage V _O ′ in the equation (8), △ V _O ′
Is the input stage MOS transistors Q ₁ and Q ₂ and the current source MOS
It said to depend temperature variation of the threshold voltage and mobility of the transistor Q _9.

Now, one example is selected from among MOS transistors used in a constant voltage generating circuit which is usually commercially available, and the value is substituted into equation (8) to calculate the change △ V _O ′ of the output voltage V _O ′. , Becomes

Therefore, by optimally designing the W / L ratio of the MOS transistor, ideally a 'change △ V _O' of the output voltage V _O 0
Can be

However, a problem arises here. That is, as understood from the above calculation results, the adjustment based on the W / L ratio of the MOS transistor is based on the difference between the first and second terms in the equation (16), that is, the input stage MOS transistors Q ₁ and Q ₂ . Difference in temperature fluctuation of threshold voltage −1.2 × 10 ⁻³ −
(−0.9 × 10 ⁻³ ), the difference is on the order of 0.1 × 10 ⁻³ , and if there is an error of about ± 10% in the temperature fluctuation of the threshold voltage of the MOS transistors Q ₁ and Q ₂ , As a result ± 0.1 × 1
0 output variation of the order of ^-3 occurs.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a constant voltage generating circuit that can reduce a temperature fluctuation rate of an output voltage.

[Means for solving the problem]

A constant voltage generating circuit according to the present invention comprises a first conductivity type first circuit having a substrate connected to a specific fixed potential terminal and a gate connected to an output voltage terminal.
A MOS transistor, a substrate and a gate connected to the specific fixed potential end, a source commonly connected to a source of the first MOS transistor, and a second one-conductivity type having a threshold voltage different from that of the first MOS transistor. A MOS transistor, and a third one-conductivity-type third transistor connected between the sources of the first and second MOS transistors and a first power supply voltage terminal.
A differential input unit having a MOS transistor, a fourth MOS transistor of a conductive type having a gate connected to the output terminal of the differential input unit and a drain connected to the output voltage terminal, and a source connected to the first power supply; An amplifying unit having a fifth MOS transistor connected to a voltage terminal and having a drain connected to the output voltage terminal; a sixth MOS transistor of opposite conductivity type and a seventh MOS transistor of one conductivity type; A constant current generator that forms a current mirror circuit together with the third and fifth MOS transistors and allows a predetermined current to flow through the third and fifth MOS transistors; The channel of the first and second MOS transistors is controlled so as to suppress the temperature change of the output voltage, including the cause of the threshold voltage change depending on the substrate-source voltage of the first and second MOS transistors. And a defines the channel width.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

 FIG. 1 is a circuit diagram showing a first embodiment of the present invention.

This embodiment differs from the conventional constant voltage generating circuit shown in FIG. 3 in that the MOS transistors Q ₁ , Q ₂
The connection points of the substrates of the MOS transistors Q ₁ and Q ₂
The point that the source itself is changed to a specific fixed potential terminal, that is, a ground potential terminal in this embodiment.

Next, the reason why the temperature fluctuation rate of the output voltage V _O is reduced by this embodiment will be described.

Now, assuming that the substrate-source voltage dependence coefficients of the threshold voltages of the MOS transistors Q ₁ and Q ₂ are K ₁ and K ₂ respectively, (6),
From equation (7) Because it can represent a change △ V _O of the output voltage V _O is Therefore, the transistor W / L may be designed so that ΔV _O / ΔT becomes zero.

Therefore, in this embodiment, the difference in the rate of change of the threshold voltage of the MOS transistors Q ₁ and Q ₂ due to the temperature differs from that of the conventional example.
1 / (1 + K ₁ ), 1 / related to substrate-source voltage dependency coefficient
Each term becomes smaller by (1 + K ₂ ). In the transistor used as an example in the section of [Prior Art], K ₁ = 0.3 (20) K ₂ = 0.15 (21) Therefore, this is substituted into the equation (19) to obtain the equation (8) And the numerical example (16), the value in the right side [] is
The difference between the first term and the second term is that the second term having the smaller value is (1+
K ₁ ) / (1 + K ₂ ), so it becomes smaller,
The difference between the term and the fourth term can be reduced because the fourth term having the smaller coefficient similarly increases, and can be reduced as a whole. That is, the first and second terms and the third and fourth terms
The terms and act to cancel each other. And on the whole right side
Since 1 / (1 + K ₁ ) is multiplied, the temperature change rate ΔV _O / ΔT of the output voltage V _O can be made smaller than in the conventional example.

FIG. 2 is a circuit diagram showing a second embodiment of the present invention.
In this embodiment, the first and second MOS transistors are realized by the P-channel type.
Although the conductivity type of the transistor and its connection are different from those of the first embodiment, the basic operation is the same as that of the first embodiment.

〔The invention's effect〕

As described above, according to the present invention, by setting the substrate potential of the first and second MOS transistors to a specific fixed potential, the substrate-source voltage dependency of the threshold voltage caused by the substrate-source voltage change due to the temperature change Changes in the threshold voltage due to the temperature change cancel the change in the threshold voltage due to the temperature change, so that there is an effect that the temperature fluctuation rate of the output voltage can be reduced.

[Brief description of the drawings]

1 and 2 are circuit diagrams showing first and second embodiments of the present invention, respectively, and FIG. 3 is a circuit diagram showing an example of a conventional constant voltage generating circuit. 1,1 _A , 1 _B … Differential input section, 2,2 _A … Amplification section, 3,3 _A … Constant current generation section, Q _{1 to} Q ₈ , Q _{11 to} Q ₁₈ … MOS transistor.

Claims (1)

(57) [Claims] 1. A first MOS transistor of one conductivity type having a substrate connected to a specific fixed potential terminal and a gate connected to an output voltage terminal, a substrate and a gate connected to the specific fixed potential terminal, and a source connected to the first fixed potential terminal. A second MOS transistor of one conductivity type commonly connected to the source of the first MOS transistor and having a threshold voltage different from that of the first MOS transistor; a source of the first and second MOS transistors and a first power supply voltage terminal And a differential input unit having a third MOS transistor of one conductivity type connected between the differential input unit and a reverse conductive transistor having a gate connected to the output terminal of the differential input unit and a drain connected to the output voltage terminal. An amplifying unit comprising a fourth MOS transistor of a negative type, a fifth MOS transistor having a source connected to the first power supply voltage terminal and a drain connected to the output voltage terminal, and a sixth MOS transistor of the opposite conductivity type. Conducted with transistor And a constant current generating section that forms a current mirror circuit together with the third and fifth MOS transistors and allows a predetermined current to flow through the third and fifth MOS transistors. The first and second MOS transistors include a change factor of a threshold voltage depending on a substrate-source voltage of the first and second MOS transistors in a change factor of the output voltage, and the first voltage change of the output voltage is suppressed so as to suppress the temperature change of the output voltage. And a channel length and a channel width of the second MOS transistor are determined.