JPH0612856B2 - Amplifier circuit - Google Patents

Description

Description: TECHNICAL FIELD OF THE INVENTION The present invention relates to an amplifier circuit used in, for example, a single power supply microphone amplifier, a magnetic head amplifier, or the like.

[Technical Background of the Invention and Problems Thereof] A microphone amplifier or the like is required to have low noise because it amplifies an extremely low level signal output from a microphone or the like.

FIG. 9 shows an example of such a conventional amplifier circuit, which is composed of a single power source inverting amplifier circuit using an operational amplifier A ₄ . In FIG. 9, reference numeral R ₁₁ is an input resistance, R ₁₂ is a feedback resistance, and a microphone MIC is connected to the input resistance R ₁₁ via an input capacitor C. R ₁₃ , R ₁₄
Is a resistor for setting the bias voltage, which is normally the power supply voltage Vdd
1/2 of the voltage is set as the bias voltage at the bias voltage point a.

The voltage gain of this amplifier circuit is (R ₁₁ + R ₁₂ ) / R ₁₁ .

However, in this amplifier circuit, when noise is added to the power supply voltage Vdd, noise of about 1/2 level is input to the operational amplifier A ₄ from the bias voltage point a, and this is (R ₁₁ + R
₁₂ ) / R ₁₁ times and output. Therefore, the power supply voltage Vd
There is a problem that the S / N is deteriorated depending on the noise on d. In order to prevent this, it is necessary to take measures such as using a high-quality stabilized power supply as the power supply, which increases the cost of the device.

On the other hand, as shown in FIG. 10, some reference potentials of signal sources such as the microphone MIC are also connected to the bias voltage point a. In this amplifier circuit, even if noise is added to the power supply voltage Vdd, the output of the operational amplifier A ₄ includes only the 1/2 level noise appearing at the bias voltage point a and the same level noise. The S / N does not deteriorate as shown in FIG.

However, in the above-mentioned one, since there is a potential difference equal to the bias voltage between the ground line (point a) of the microphone MIC and the GND potential, the casing of the amplifier circuit, which is normally the GND potential, and the ground line of the microphone MIC. However, there is a problem that a short circuit will occur when the two touch. Also Mike M
Since an IC is often grasped by a person and used by hand, if the impedance at the bias point a is high, a large inductive noise is generated at the bias voltage point a, which is input to the operational amplifier A ₄ and then the above-mentioned one is used. Similar to the above, there was a problem that the S / N deteriorated.

The amplifier circuit shown in FIG. 11 is the S /
This is a further improvement of the point where N deteriorates. A voltage follower composed of another operational amplifier A ₅ is connected between the bias voltage generating point by the bias resistors R ₁₃ and R ₁₄ and the bias voltage point a. The bias voltage point a has a low impedance.

However, also in this case, a potential difference equal to the bias voltage is generated between the ground line of the microphone MIC and the GND potential as in the case shown in FIG. 10, so that the ground line of the microphone MIC and the casing of the amplifier circuit. There is the same problem as described above that a voltage short circuit with the body may occur. The operational amplifier A ₅ for low impedance, since it is necessary to set a large driving force with a large current, with power consumption is increased, there is a drawback that the size of the IC chip becomes large.

[Object of the Invention] The present invention has been made based on the above-mentioned circumstances, and there is no deterioration in S / N due to power supply noise, and voltage short circuit occurs even if the casing of an amplifier circuit and the ground wire of a signal source such as a microphone come into contact with each other. It is an object of the present invention to provide an amplifier circuit which does not cause an accident such as the above and which does not require an operational amplifier with relatively large power consumption for lowering the impedance of a bias voltage point.

SUMMARY OF THE INVENTION In order to achieve the above object, the present invention includes a first current source circuit whose current value is controlled by an input voltage and a feedback input terminal, and the current value is controlled by the potential of the feedback input. Second
An input stage differential circuit is configured by the current source circuit of
To the current source circuit, the feedback voltage obtained by attenuating the output voltage by the feedback circuit is fed back to vary the value of the second current of the second current source circuit according to the output voltage. By controlling the first current of the current source circuit to be equal to the second current by a control means such as a current mirror, the voltage gain depends on only the characteristics of the feedback circuit and is influenced by the power supply voltage. It was designed so that it would not exist.

EFFECTS OF THE INVENTION According to the present invention, a first current source circuit whose current value is controlled by an input voltage and a second current source whose current value is variable by a feedback voltage obtained by attenuating an output voltage to a required value. And a circuit arranged in the input stage, and the control means controls the first current of the first current source circuit so that it is always equal to the second current of the variable second current source circuit. Since the voltage gain is not influenced by the voltage such as the power supply voltage, the S / N is not deteriorated even if noise is added to the voltage such as the power supply voltage, and the ground wire of the signal source such as the microphone is Since there is no need to float to the potential such as the bias potential on the amplification circuit side, even if the case of the amplification circuit and the ground wire of the signal source such as a microphone come into contact with each other, there will be no accident such as a voltage short circuit. Is the power consumption for lowering the impedance of the bias voltage point. There is an advantage that a relatively large operational amplifier is unnecessary.

[First Embodiment] An embodiment of the present invention will be described below with reference to FIGS.
A description will be given based on (B). This embodiment is applied to a microphone amplifier.

First, the configuration will be described. In FIG. 1, reference numeral 1 is a first current source circuit, which is a depletion type nMOS transistor Q _1.
Is provided. A microphone MIC is connected to the gate of the MOS transistor Q ₁ via a signal input terminal 3,
The source is connected to the first reference potential Vss. First
In the current source circuit 1, the value of the first current I ₁ is controlled by the MOS transistor Q ₁ according to the difference voltage between the potential of the input signal Vi input from the input terminal 3 and the first reference potential Vss. It

On the other hand, reference numeral 2 is a second current source circuit, which is provided with a depletion type nMOS transistor Q ₂ . MOS
A feedback input terminal 4 is provided at the gate of the transistor Q ₂ , and an input terminal 5 of the second reference potential Vref is connected at the source. The second current source circuit 2 uses the MOS transistor Q ₂ to input the potential of the feedback input input via the feedback circuit 9 described later and the second reference potential Vre.
The value of the second current I ₂ is controlled according to the voltage difference with f.

The first current source circuit 1 and the second current source circuit 2 constitute an input stage operation circuit. The pair transistors Q ₁ and Q ₂ which are constituent elements of the differential circuit are W /
Those having the same L (W is a gate width and L is a gate length) and the same characteristics are used.

Further, as an active load of the differential circuit, a current mirror circuit 6 composed of a pair of pMOS transistors Q ₃ and Q ₄ is connected. With this current mirror circuit 6, the second
The control means is configured to control so that the current I ₂ and the first current I ₁ are equal to each other.

The first current source circuit 1 is provided with an output terminal 1a for a drive signal according to the difference current between the first current I ₁ and the second current I _2, and this output terminal 1a serves as the output means 7. PM to configure
It is connected to the gate of the OS transistor Q ₅ . The output means 7 includes the pMOS transistor Q ₅ and the nMOS.
The source-grounded inverting amplifier includes a transistor Q ₆ and a constant current source formed of a constant voltage source Vb.

Reference numeral 8a is an output terminal of the source-grounded output means 7, and the other output terminal 8b is held at the second reference potential Vref.

The output terminal 8a is connected to the feedback input terminal 4 of the second current source circuit 2 via the feedback circuit 9.
The feedback circuit 9 is composed of two resistors R ₁ and R ₂ , its intermediate connection point is connected to the feedback input terminal 4, and the other end of the resistor R ₁ is connected to the input terminal 5 of the second reference potential Vref. It is connected. The difference voltage between the potential of the output terminal V ₀ and the second reference potential Vref is attenuated by the feedback circuit 9 to the ratio of R ₁ / (R ₁ + R ₂ ), and this attenuated voltage is used as the feedback voltage in the MOS transistor Q ₂ Returned to the gate.

Next, the operation will be described.

The second current I ₂ is inverted to the side of the first current source circuit 1 by the action of the current mirror circuit 6. This current is I ₂ ′
When the gate of the MOS transistor Q ₅ in the source grounded output unit 7, a signal corresponding to the difference current between the current I _{2 'which} is inverted first current I ₁ and a first current I ₁ Stated Kaere It is driven by a signal according to the difference current from the second current I ₂ .

On the other hand, if the gain of the source-grounded output means 7 is set to be sufficiently large, the MOS transistor Q ₅
Has a substantially constant gate potential of Vdd-Vth (Vth is a threshold voltage of Q ₅ ).

Then, when the voltage of the output Vi from the microphone MIC is input to the input terminal 3, the first current I ₁ increases to a current value according to the level of the input voltage due to the mutual conductance gm of the MOS transistor Q ₁ . When the first current I ₁ increases, the signal corresponding to the difference current between the first current I ₁ and the second current I ₂ also increases, and the gate potential of the MOS transistor Q ₅ in the output means 7 decreases, As a result, the current of the source-grounded output means 7 increases, and the potential of the output voltage V ₀ rises.

When the output voltage V ₀ rises, the difference voltage between the potential of the output voltage V ₀ and the second reference potential Vref becomes a predetermined ratio R ₁ /
It is attenuated to (R ₁ + R ₂ ), and this attenuated voltage is fed back to the gate of the MOS transistor Q ₂ as a feedback voltage.

The MOS transistor Q ₂ is driven by this feedback voltage, and the second current I ₂ increases to a current level corresponding to the amount of feedback, that is, the increase amount of the output voltage V ₀ .

When the second current I ₂ increases, this current I ₂ is converted to the side of the first current source circuit 1 by the action of the current mirror circuit 6, and the feedback system changes the first current I ₁ and the second current I 2. It stabilizes in a state where I ₂ has the same value, that is, a state where I ₁ = I ₂ .

In this stable state, as described above, both current source circuits 1, 2
The gate-source voltage VgS of both MOS transistors Q ₁ and Q ₂ in FIG.

Therefore, the potential of the gate of the MOS transistor Q ₂
The potential difference from the second reference potential Vref is the input voltage V
It becomes equal to the value of i.

Therefore, the output voltage V ₀ appearing between the output terminals 8a and 8b is
And the input voltage Vi are as follows: Vi = V ₀ · R ₁ / (R ₁ + R ₂ ) ... (1), and the voltage gain G is G = V ₀ / Vi = (R ₁ + R ₂ ) / R ₁ … (2).

In this way, the voltage gain G of the amplifier circuit according to the present invention is determined only by the characteristics of the feedback circuit 9.

Therefore, the first reference potential Vss and the power supply voltage Vdd,
Alternatively, even if noise is generated between the second reference potential Vref and the like, these expressions do not include these voltage values in the expression of the voltage gain G in the expression (2), and thus the output voltage V ₀ is not included in the expression. ,
The effect of noise does not appear.

However, when noise is added to the second reference potential Vref, the output voltage V ₀ is based on the second reference voltage Vref. Therefore, noise is included in the output voltage V ₀ when the voltage gain is 1. become. However, with respect to the input voltage Vi from the microphone or the like, this is amplified with a large voltage gain and appears in the output, so that a sufficiently good S / N can be obtained and the influence of noise can be ignored.

Therefore, the amplifiers at the second and subsequent stages connected to the subsequent stage of the microphone amplifier according to the present embodiment are sufficiently high if they are amplified with the second reference potential Vref as the reference potential as shown in FIG. It can be S / N.

When applied as a microphone amplifier as in this embodiment, the GND terminal of the microphone can be directly connected to the potential point of the second reference potential Vss. Therefore, the first
The short-circuit accident between the casing of the amplifier circuit and the microphone MIC as described in the conventional example of FIGS. 0 and 11 does not occur.

2A and 2B show the second reference potential V, respectively.
An example of a ref generation circuit is shown. In the same figure (A), the voltage Vdd- between the power supply voltage Vdd and the first reference potential Vss is shown.
Vss is divided by two resistors R ₃ and R ₄ , and a simple circuit configuration can be obtained.

On the other hand, FIG. 2B shows the resistance-divided reference potential generating circuit further connected to a voltage follower circuit using an operational amplifier A ₁ to reduce the output impedance of the reference potential generating circuit. Is. The operational amplifier is sufficient as long as it has a driving force for fixing the second reference potential Vref in the IC or the like. Therefore, even if the reference potential generating circuit as shown in FIG. The area of a semiconductor chip incorporating a circuit and the degree of increase in power consumption are very small.

[Second Embodiment] FIG. 3 shows a second embodiment of the present invention. In FIG. 3 and later-described FIGS. 4 to 7, the same or equivalent elements as the circuit elements and the like in FIG. 1 are designated by the same reference numerals as those described above, and a duplicate description will be omitted.

In this embodiment, load resistors R ₅ and R ₆ are connected to the first current source circuit 1 and the second current source circuit 2, respectively, and the output points 1a and 2a in the circuits 1 and 2 are connected to the operational amplifier A. _The output voltage V ₀ is output from the operational amplifier A ₂ by connecting to each of the two input terminals.

Load resistors R ₅ and R ₆ having the same resistance value are used.

The first current I ₁ and the second current I ₂ are controlled to have the same value based on the principle of imaginary short circuit between both input terminals of the operational amplifier A ₂ .

Therefore, in this embodiment, the operational amplifier A ₂ constitutes the control means for controlling the first current I ₁ and the second current I ₂ to the same value, and the output means, thereby simplifying the circuit configuration.

The operation such that the voltage gain G of the amplifier circuit is determined only by the characteristics of the feedback circuit 9 and the output voltage V ₀ is not affected by noise is almost the same as that of the first embodiment.

[Third Embodiment] FIG. 4 shows a third embodiment of the present invention.

In this embodiment, the first and second current source circuits 1 and 2 are the first
Of the differential circuit D ₁ is newly provided, and a third current source circuit 11 newly provided with the MOS transistor Q ₇ and a fourth current source circuit 12 provided with the MOS transistor Q ₈ are provided.
A second differential circuit D ₂ is configured by the third and fourth current source circuits 11 and 12. The current mirror circuit 6 is
It is a common active load for both the first and second differential circuits D ₁ and D ₂ . Four MOS transistors Q ₁ , Q
₂ , Q ₇ and Q ₈ have the same W / L and have the same characteristics. The MOS transistors Q ₉ and Q ₁₀ are
Each of them constitutes a constant current source together with the constant voltage source Vd.

The first and second currents I ₁ and I ₁ in the first differential circuit D _1
2 is controlled by the difference voltage between the potential of the input voltage Vi and the first reference potential Vss, and the third and fourth currents I ₃ and I ₄ in the _second differential circuit D ₂ are fed back to the feedback circuit 9
Potential of the feedback voltage input via the second reference potential V
It is controlled by the voltage difference with ref.

The MOS transistor _{Q 5} in the source grounded output means 7 gate, a first differential circuit _D first current _{I 1} in _1, the second differential circuit _{D 2} of the third current _{I 3}
And the second current I ₂ in the _first differential circuit D ₁ and the second differential circuit D ₁ as the first sum current (I ₁ + I ₃ ).
₂ and the fourth current I ₄ at the second sum current (I ₂
+ I ₄ ), it is driven by a signal corresponding to the difference current between the first sum current (I ₁ + I ₃ ) and the second sum current (I ₂ + I ₄ ). When the equilibrium state is reached by the current reversal action of the current mirror circuit 6 and the output feedback action of the feedback circuit 9, the first to fourth currents I _{1 to} I
₄ is I ₁ = I ₂ = I ₃ = I ₄ , and the first sum current,
With the second sum current, I ₁ + I ₃ = I ₂ + I ₄ (8) holds.

Further, the potential difference between the gates of both MOS transistors Q ₁ and Q ₂ in the first and second current source circuits ₁ and ₂ is 0 V, and accordingly, the third and fourth current source circuits 11 and 1
The potential difference between the gates of both MOS transistors Q ₇ and Q ₈ in 2 is also 0V.

When a certain level of voltage Vi is input to the input terminal 3, the first current I ₁ and the second current I ₂ in the first differential circuit D ₁ become unbalanced, and when one increases, the other Is reduced by an equal amount.

Then, as the first and second currents I ₁ and I ₂ change, the relationship of the above equation (3) is satisfied again by the action of the current mirror circuit and the feedback circuit 9 and so on.
The third and fourth currents I ₃ and I ₄ in the _second differential circuit D ₂ change by an amount equal to the amount of change in the second currents I ₁ and I ₂ . That is, when the first current I ₁ increases by ΔI, the third current I ₃ decreases by ΔI.

The change in the gate voltage of each MOS transistor Q ₁ , Q ₂ , Q ₇ , and Q ₈ means that the gate voltage of Q ₂ is ΔV with respect to the gate voltage of the MOS transistor Q ₁ in the first differential circuit D ₁ . When it becomes higher, also in the second differential circuit D ₂ , the gate voltage of Q ₃ becomes higher than that of the MOS transistor Q ₄ by ΔV.

In this way, assuming that the input voltage Vi is a positive voltage now, the MOS transistor Q ₁ is driven by this, the first current I ₁ decreases, and the second current I ₂ increases.

When the first current I ₁ decreases, the drain current of the MOS transistor Q ₅ in the source-grounded output means 7 decreases and the potential of the output voltage V ₀ increases accordingly.

When the output voltage V ₀ increases, the feedback voltage corresponding to the output voltage V ₀ is fed back to the gate of the MOS transistor Q ₈ in the fourth current source circuit via the feedback circuit, and the fourth current I ₄ decreases and the third current I ₄ decreases. Results in an increase in I ₃ . When the decrease amount of the first current I _{1 and} the increase amount of the third current I ₃ become equal, and when the increase amount of the second current I ₂ becomes equal to the decrease amount of the fourth current I _4. The relationship of the equation (3) is satisfied, and the state is stable. At this time, as described above, the potential difference between the gates of the MOS transistors Q ₁ and Q ₂ in the first differential circuit D ₁ is equal to the second differential circuit D ₂
Is equal to the potential difference between the gates of both MOS transistors Q ₇ and Q ₈ .

Thus, also in this embodiment, in the first embodiment
Both equations (1) and (2) hold.

Therefore, even if noise is added to the power supply voltage Vdd or the like, the output voltage V ₀ is not affected by noise, and the same effect as in the first embodiment can be obtained in this embodiment.

[Fourth Embodiment] FIG. 5 shows a fourth embodiment of the present invention. In this embodiment, the current mirror 6 and the source grounded output means 7 in the third embodiment have exactly the same relationship as the relationship between the first embodiment (FIG. 1) and the second embodiment (FIG. 3). Instead, an operational amplifier A ₂ having both functions is arranged.

The operation and effect are almost the same as those in the third embodiment.

[Fifth Embodiment] FIG. 6 shows a fifth embodiment of the present invention. This embodiment differs from the third embodiment (FIG. 4) in that the MOS transistor connecting the input terminal 3 is replaced with the gate of the MOS transistor Q ₁ in the first differential circuit D ₁ and a pair transistor is used. Is connected to the gate of another MOS transistor Q ₂ constituting the above. The other structure is the same as that of the third embodiment.

Only the result will be described. In this embodiment, the equation (2) representing the voltage gain G is expressed as follows, differing only in its sign.

G = V ₀ / Vi = − (R ₁ + R ₂ ) / R ₁ (4) From the equation (4), even in this embodiment, even if the power supply voltage Vdd or the like is noisy, the output voltage V ₀ is noisy. The same effects as those of the third embodiment, such as not being affected by the above, can be obtained.

[Sixth Embodiment] FIG. 7 shows a sixth embodiment of the present invention.

In this embodiment, the current source circuits 1, 2 of the first and second differential circuits D ₁ and D ₂ in the third embodiment (FIG. 4) are
A constant current source composed of a constant voltage source Vb ₁ and MOS transistors Q ₁₁ and Q ₁₂ is arranged between 11 and 12 and the first reference potential Vss, and a MOS is provided on each line of the current mirror 6.
A gate grounding circuit for the transistors Q ₁₃ and Q ₁₄ is provided,
The accuracy of establishment of the above equation (3) is further enhanced.

The two MOS transistors Q ₁₁ and Q ₁₂ have the same W / L and the same threshold voltage Vth.

In the stable state, the following equation holds between each current.

I ₁ + I ₃ + I ₇ = I ₅ I ₂ + I ₄ + I ₈ = I ₆ (4) I ₇ = I ₈ (5) I ₅ = I ₆ (6) Therefore, the above (4), (5), From the expression (6), the above expression (3) is established, and further the above (2) is established, and also in this embodiment,
Even if noise is added to the power supply voltage Vdd, etc., the output voltage V
_{When 0} is set, the same effect as that of the third embodiment can be obtained such that it is not affected by noise.

Although each element is shown as a MOS transistor (MOSFET) in each of the above-described embodiments, other elements such as a JFET and a bipolar transistor may be used.
The feedback circuit is composed of two resistors,
It can also be composed of other elements including C, R, L and the like.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a first embodiment of an amplifier circuit according to the present invention, FIG. 2 is a circuit diagram showing an example of a second reference potential generating circuit applied to the above embodiment, and FIG. 2 is a circuit diagram showing a second embodiment of the present invention, FIG. 4 is a circuit diagram showing a third embodiment of the present invention, and FIG. 5 is a circuit diagram showing a fourth embodiment of the present invention.
FIG. 6 is a circuit diagram showing a fifth embodiment of the present invention, FIG. 7 is a circuit diagram showing a sixth embodiment of the present invention, and FIG. 8 is a circuit diagram of an amplifier circuit connected to the latter stage of the amplifier circuit according to the present invention. FIG. 9 is a circuit diagram showing an example, and FIG. 9 is a circuit diagram showing a conventional amplifier circuit.
FIG. 11 and FIG. 11 are road diagrams showing other conventional examples. 1: first current source circuit, 2: second current source circuit, 3: input terminal, 4: feedback input terminal, 5: second reference potential input terminal, 6: current mirror circuit (control means), 7: output means, 8a, 8b: output terminal, 9: feedback circuit.

Claims (4)

[Claims] 1. A first current source circuit in which a first current is controlled by a voltage difference between an input signal potential and a first reference potential; and a feedback input terminal provided with a feedback input potential and a second current source circuit. A second current source circuit in which a second current is controlled by a difference voltage from a reference potential, and a second current source circuit driven by a signal according to the difference current between the first current and the second current, and according to the difference current Output means for outputting an output voltage; a feedback circuit for feeding back a feedback voltage according to the output voltage to the feedback input terminal to vary the second current according to the output voltage; And a control means for controlling the current to be equal to 2. 2. An output point of the first current source circuit and an output point of the second current source circuit are respectively connected to both input terminals of an operational amplifier, the output voltage is output from the operational amplifier, and the operational amplifier outputs the output voltage. The amplifier circuit according to claim 1, further comprising a control means for controlling the current of 1 to be equal to the second current, and an output means. 3. A first differential circuit whose current is controlled by a difference voltage between an input signal potential and a first reference potential; a feedback input terminal; and a feedback input potential and a second reference potential. A second differential circuit whose current is controlled by the differential voltage of the first differential circuit, and a first sum current that is the sum of one current of the first differential circuit and one current of the second differential circuit. , The first
Driven by a signal corresponding to a difference current between the other current of the differential circuit and the other current of the second differential circuit, and an output voltage corresponding to the difference current is generated. Output means for outputting, a feedback circuit for feeding back a feedback voltage according to the output voltage to the feedback input terminal, and varying the first and second sum currents according to the output voltage, the first sum current And a control means for controlling so as to be equal to the second sum current. 4. An output point of the first sum current and an output point of the second sum current are respectively connected to both input terminals of an operational amplifier, an output voltage is output from the operational amplifier, and the operational amplifier outputs the first voltage. 4. The amplifier circuit according to claim 3, further comprising a control means for controlling the sum current to be equal to the second sum current, and an output means.