JP2013066055A - Reception circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a reception circuit that can amplify a received signal including a signal on a negative signal level by means of an operational amplifier operated (acted) by a single positive power supply.SOLUTION: A reception circuit 100 includes: a signal section 10 having a reference terminal 11 and a signal terminal 12 for outputting a received signal based on a voltage at the reference terminal 11; an operational amplifier 20 having a positive input terminal 21, a negative input terminal 22 and an output terminal 23, and operating on a voltage applied from a single positive power supply E2; a first load section 30 connected between the output terminal 23 and the negative input terminal 22; a second load section 40 connected between the signal terminal 12 and the negative input terminal 22; and a reference voltage section 50 including a diode 52 grounded on a cathode side and connected on an anode side to the reference terminal 11 and the positive input terminal 21.

Description

  Some embodiments according to the present invention relate to a receiving circuit that receives an ultrasonic wave and outputs a voltage signal, for example.

  2. Description of the Related Art Conventionally, in an ultrasonic transmission / reception apparatus having an ultrasonic transducer, a transmission circuit, and a reception circuit, the transmission circuit, the reception circuit, and the ultrasonic transducer are circuit-coupled by a transformer having three independent windings. Therefore, a low noise and high output is known (for example, see Patent Document 1).

Japanese Unexamined Patent Publication No. 7-75198

  By the way, in the receiving circuit, when a received signal is amplified by an operational amplifier and output, if an operational amplifier that operates (operates) with a single positive power supply is used, the operational amplifier cannot output a negative voltage signal. . Therefore, when the received signal includes a signal having a negative signal level, there is a problem that the receiving circuit cannot faithfully amplify the received signal.

  Some aspects of the present invention have been made in view of the above-described problems, and amplifying a received signal including a negative signal level signal using an operational amplifier that operates (operates) with a single positive power supply. A receiver circuit that can be used is one of the objects.

  The receiving circuit according to the present invention has a signal unit having a reference terminal and a signal terminal that outputs a reception signal based on the voltage of the reference terminal, a positive input terminal, a negative input terminal, and an output terminal, An operational amplifier circuit that operates by applying a voltage from a single positive power source, a first load connected between the output terminal and the negative input terminal, and a connection between the signal terminal and the negative input terminal And a reference voltage unit including a diode whose cathode side is grounded and whose anode side is connected to the reference terminal and the positive input terminal.

  According to this configuration, the reference voltage unit includes a diode whose cathode is grounded (connected to ground (GND)) and whose anode is connected to the reference terminal and the positive input terminal. Thereby, when the voltage (potential) of the ground (GND) is set to 0 (zero) [V], the voltages of the reference terminal 11 and the positive input terminal are increased by the voltage corresponding to the voltage drop in the forward direction of the diode. Here, in the received signal output from the signal terminal, a signal having a level lower than the voltage at the reference terminal is set to 0 (zero) [V] by setting the voltage corresponding to the voltage drop in the forward direction of the diode sufficiently high. Get higher. Therefore, the reference voltage unit includes a diode whose cathode is grounded (connected to the ground (GND)) and whose anode is connected to the reference terminal and the positive input terminal, so that the received signal is 0 (zero) [V ] A signal including only a higher level signal (positive voltage signal) can be obtained.

  Preferably, the signal unit is driven by the single power source described above.

  According to this configuration, the signal unit is driven by a single power source that applies a voltage to the operational amplifier. Thereby, the signal unit and the operational amplifier are driven by the same single power source. Thus, the receiving circuit can operate (operate) with a single power source.

  Preferably, the reference voltage unit further includes a resistor.

  According to this configuration, the reference voltage unit further includes a resistor. As a result, the voltage of the reference terminal and the positive input terminal is made higher than the voltage (potential) of the ground (GND), and the ground (GND) is passed through the diode as compared with the case where the reference voltage unit does not include a resistor. The current flowing through can be reduced. Thereby, the power consumption of a receiving circuit can be reduced and energy saving can be achieved.

  Preferably, the aforementioned resistor is a variable resistor.

  According to this configuration, the resistor included in the reference voltage unit is a variable resistor. Thus, by setting the resistance value of the variable resistor to an appropriate value, the current flowing through the diode to the ground (GND) can be further reduced. Thereby, the power consumption of the receiving circuit can be further reduced, and energy saving can be achieved.

  According to the receiving circuit of the present invention, the reference voltage unit includes a diode whose cathode is grounded (connected to ground (GND)) and whose anode is connected to the reference terminal and the positive input terminal, thereby receiving the received signal. , 0 (zero) [V] can be a signal including only a signal (a signal having a positive voltage) of a higher level. As a result, the received signal can be amplified using an operational amplifier that operates with a single positive power source, and the amplified signal output from the output terminal of the operational amplifier does not lack the signal (information) of the received signal (faithfully ) Amplified signal.

It is a block diagram explaining the receiving circuit in 1st Embodiment. It is a block diagram explaining an example of a virtual receiving circuit. 3 is a graph showing an example of a time change of a reception signal and an amplification signal of the reception circuit shown in FIG. 3 is a graph illustrating an example of a time change of a reception signal and an amplification signal of the reception circuit illustrated in FIG. 1. It is a block diagram explaining the modification of the receiving circuit shown in FIG. It is a block diagram explaining the receiving circuit in 2nd Embodiment. It is a block diagram explaining the receiving circuit in 3rd Embodiment. FIG. 8 is a block diagram illustrating a modified example of the receiving circuit illustrated in FIG. 7.

  Embodiments of the present invention will be described below. In the following description of the drawings, the same or similar parts are denoted by the same or similar reference numerals. However, the drawings are schematic. Therefore, specific dimensions and the like should be determined in light of the following description. Moreover, it is a matter of course that portions having different dimensional relationships and ratios are included between the drawings. In the following description, the upper side of the drawing is referred to as “upper”, the lower side as “lower”, the left side as “left”, and the right side as “right”.

<First Embodiment>
1 to 5 show a first embodiment of a receiving circuit according to the present invention. FIG. 1 is a block diagram illustrating a receiving circuit 100 according to the first embodiment. As illustrated in FIG. 1, the reception circuit 100 includes a signal unit 10, an operational amplifier (operational amplifier) 20, a first load unit 30, a second loader 40, and a reference voltage unit 50.

  The signal unit 10 is, for example, a microphone that receives ultrasonic waves. The signal unit 10 includes a reference terminal 11 and a signal terminal 12. The signal unit 10 includes a power supply terminal 13 and is connected to the power supply E1 that is a positive voltage source. The signal unit 10 can operate at a voltage applied from the power source E1, for example, a voltage in the range of about 2.7 to 6.0 [V]. That is, the signal unit 10 receives an ultrasonic wave, and converts the received ultrasonic wave into a reception signal (voltage signal) S1 based on the voltage of the reference terminal 11 based on the voltage applied from the power supply E2. The reception signal S1 is output from the signal terminal 13.

  The operational amplifier 20 includes a positive input terminal 21, a negative input terminal 22, and an output terminal 23. The operational amplifier 20 includes a pair of power supply terminals 24 and 25. One power supply terminal 24 is grounded (connected to ground (GND)), and the other power supply terminal 25 is connected to a power supply E2 that is a positive voltage source. Is done. The operational amplifier 20 can operate with a voltage applied from the power source E1, for example, a voltage in the range of about 1.5 to 3.6 [V]. That is, the operational amplifier 20 amplifies signals input from the positive input terminal 21 and the negative input terminal 22 using the voltage applied from the power supply E2, and outputs the amplified signal S2 from the output terminal 23. Thus, the operational amplifier 20 operates (operates) with a single positive power source.

  The first load unit 30 includes a resistor 31 and a capacitor (capacitor) 32. The first load unit 30 is connected between the output terminal 23 and the negative input terminal 22. Part of the amplified signal S2 output from the output terminal 23 consumes electrical energy (voltage is reduced) by the first load unit 30, and is negatively fed back (negative feedback) to the negative input terminal 22. The resistor 31 and the capacitor 32 are connected in parallel to each other, and function as a low-pass filter that removes relatively high frequency noise.

  The second load unit 40 includes a resistor 41, a capacitor (capacitor) 42, and a resistor 43. The second load unit 40 is connected between the signal terminal 12 and the negative input terminal 22. Part of the reception signal S1 output from the signal terminal 12 is consumed by the second load unit 40 (voltage is reduced) and input to the negative input terminal 22. The resistor 41 and the capacitor 42 are connected in series and function as a high-pass filter that removes relatively low frequency noise. The resistor 43 is connected between the signal terminal 12 and a connection terminal 51 of a reference voltage unit 50 described later. By appropriately setting the resistance values of the resistor 31 and the resistor 41 and the capacitances of the capacitor 32 and the capacitor 42, the resistor 31, the capacitor 32, the resistor 41, and the capacitor 42 are Functions as a pass filter.

  In the present embodiment, an example including a plurality of elements (devices) is shown as an example of the first load unit 30 and the second load unit 40, but the present invention is not limited to this. An inverting amplifier circuit may be formed by the operational amplifier 20, the first load unit 30, and the second load unit 40 so that the operational amplifier 20 has a predetermined gain (or amplification factor). For example, the first load unit At least one of 2020 and the second load unit 40 may be configured by one resistor. Moreover, the 1st load part 30 and the 2nd load part 40 are not limited to when comprising with a resistor and a capacitor | condenser (capacitor), You may include other elements (devices), such as a coil, a transistor, and a diode. .

  The reference voltage unit 50 includes a connection terminal 51 and a diode 52. The reference terminal 11 and the positive input terminal 21 are connected to the connection terminal 51. The diode 52 has a cathode grounded (connected to the ground (GND)) and an anode connected to the connection terminal 51. Accordingly, when the voltage (potential) of the ground (GND) is set to 0 (zero) [V], the voltage (potential) of the connection terminal 51, that is, the voltage of the reference terminal 11 and the positive input terminal 21 is reduced by the diode 52. Is increased by the voltage Vb [V] corresponding to the forward voltage drop.

  FIG. 2 is a block diagram for explaining an example of the virtual receiving circuit 200. In FIG. 2, components similar to those of the receiving circuit 100 are denoted by similar symbols, and detailed description thereof is omitted. As illustrated in FIG. 2, the reception circuit 200 includes a signal unit 110, an operational amplifier (operational amplifier) 120, a first load unit 130, a second load unit 140, and a reference voltage unit 150. The signal unit 110 is the signal unit 10 shown in FIG. 1, the operational amplifier 120 is the operational amplifier 20 shown in FIG. 1, the first load unit 130 is the first load unit 30 shown in FIG. 1, and the second load unit 140 is the same as FIG. It is the same as the 2nd load part 40 shown. The reference voltage unit 150 is different from the reference voltage unit 50 shown in FIG. That is, the connection terminal 151 is grounded (connected to the ground (GND)) as it is without a diode. Thereby, the voltage (potential) of the reference terminal 111 and the positive input terminal 121 becomes 0 (zero) [V].

  FIG. 3 is a graph illustrating an example of a time change of the reception signal S3 and the amplified signal S4 of the reception circuit 200 illustrated in FIG. In the graph of FIG. 3, the vertical axis represents voltage and the horizontal axis represents time t. Since the signal unit 110 outputs the reception signal S3 from the signal terminal 112 with reference to the voltage of the reference terminal 111, for example, when the signal unit 110 receives a predetermined ultrasonic wave, as shown in the upper part of FIG. The received signal S3 has a waveform with the amplitude at the voltage of the reference terminal 111, that is, 0 (zero) [V]. In this case, the received signal S3 includes both a signal having a level higher than 0 (zero) [V] (a positive voltage signal) and a signal having a level lower than 0 (zero) [V] (a negative voltage signal). It becomes a signal containing.

On the other hand, the operational amplifier 120, the first load unit 130, and the second load unit 140 form an inverting amplifier circuit. The operational amplifier 120 that operates with a single positive power supply can output a signal with a positive voltage higher than 0 (zero) [V], but a signal with a negative voltage lower than 0 (zero) [V]. Cannot be output. Therefore, as shown in FIG. 3, the amplified signal S4 output from the output terminal 123 is amplified by inverting the negative voltage signal in the received signal S3 into a positive voltage signal during the time t ₁ t ₂ , for example. However, for example, during the time t ₂ t ₃ , the positive voltage signal in the reception signal S ₃ becomes 0 (zero) [V] without being inverted to the negative voltage. Thus, in the reception circuit 200, a part of the signal (information) of the reception signal S3 is missing in the amplified signal S4.

  FIG. 4 is a graph showing an example of temporal changes in the reception signal S1 and the amplified signal S2 of the reception circuit 100 shown in FIG. In the graph of FIG. 4, the vertical axis represents voltage, and the horizontal axis represents time t. In contrast to the receiving circuit 200 shown in FIG. 2, in the receiving circuit 100 shown in FIG. 1, the signal unit 10 outputs the received signal S1 from the signal terminal 12 with the voltage at the reference terminal 11 as a reference. When the same ultrasonic wave as that of the unit 110 is received, as shown in the upper part of FIG. 4, the received signal S1 has a waveform centered on the voltage of the reference terminal 11, that is, Vb [V]. Thus, the reception signal S1 is shifted by the voltage Vb [V] of the reference terminal 11. In this case, the reception signal S1 includes both a signal having a level higher than the voltage Vb [V] of the reference terminal 11 and a signal having a level lower than the voltage Vb [V] of the reference terminal 11. Here, in the reception signal S1 output from the signal terminal 12, a signal having a level lower than the voltage Vb [V] of the reference terminal 11 sufficiently increases the voltage Vb [V] corresponding to the voltage drop in the forward direction of the diode 52. By setting, it becomes higher than 0 (zero) [V]. Therefore, the reference voltage unit 50 includes the diode 52 whose cathode is grounded (connected to the ground (GND)) and whose anode is connected to the connection terminal 51, so that the reception signal S1 is obtained from 0 (zero) [V]. A signal including only a high level signal (positive voltage signal) can be obtained.

On the other hand, the operational amplifier 20, the first load unit 30, and the second load unit 40 form an inverting amplifier circuit. The operational amplifier 20 that operates with a single positive power supply can output a signal having a positive voltage higher than 0 (zero) [V]. Therefore, as shown in FIG. 4, for example, during time t ₁ t ₂ , the amplified signal S2 is a signal having a level lower than the voltage Vb [V] in the received signal S1 becomes a signal having a level higher than the voltage Vb [V]. For example, during time t ₂ t ₃ , a signal having a level lower than the voltage Vb [V] in the reception signal S1 is inverted and amplified to a signal having a level higher than the voltage Vb [V].

(Modification)
In the following modifications, the same components as those of the above-described embodiment are denoted by the same reference numerals, and the description thereof is omitted. In addition, components similar to those of the above-described embodiment are represented by similar symbols, and detailed description thereof is omitted. Further, the components not shown are the same as those in the above-described embodiment.

  FIG. 5 is a block diagram for explaining a modification of the receiving circuit 100 shown in FIG. As shown in FIG. 5, the receiving circuit 100 in the modification is different from the receiving circuit 100 shown in FIG. 1 in that the reference voltage unit 50 further includes another diode 53 in addition to the diode 52.

  The diode 52 and the diode 53 are the same or substantially the same diode, and are connected in series. The anode of the diode 53 is connected to the cathode of the diode 52, and the cathode of the diode 53 is grounded (connected to the ground (GND)). The forward voltage drop voltage of the diode 53 is Vb [V]. As a result, the voltage at the reference terminal 11 and the positive input terminal 21 is increased by a voltage corresponding to the voltage drop in the forward direction of the diode 52 and the diode 53, that is, twice (2 × Vb) Vb [V]. Therefore, the voltage of the reference terminal 11 and the positive input terminal 21 can be easily increased.

  In the present modification, the reference voltage unit 50 includes two diodes 52 and 53. However, the present invention is not limited to this, and the reference voltage unit 50 may include three or more diodes.

  Thus, according to the receiving circuit 100 in the present embodiment, the reference voltage unit 50 has the cathode connected to the ground (connected to the ground (GND)) and the anode connected to the reference terminal 11 and the positive input terminal 21. A diode 52 is included. Accordingly, when the voltage (potential) of the ground (GND) is set to 0 (zero) [V], the voltage (potential) of the connection terminal 51, that is, the voltage of the reference terminal 11 and the positive input terminal 21 is reduced by the diode 52. Is increased by the voltage Vb [V] corresponding to the forward voltage drop. Here, as shown in FIG. 4, in the received signal S <b> 1 output from the signal terminal 12, a signal having a level lower than the voltage Vb [V] of the reference terminal 11 is a voltage Vb corresponding to a forward voltage drop of the diode 52. By setting [V] sufficiently high, it becomes higher than 0 (zero) [V]. Therefore, the reference voltage unit 50 includes a diode 52 whose cathode is grounded (connected to ground (GND)) and whose anode is connected to the reference terminal 11 and the positive input terminal 21, so that the received signal S 1 can be reduced to 0. (Zero) A signal including only a signal (positive voltage signal) higher than [V] can be obtained. As a result, the received signal S1 can be amplified using the operational amplifier 10 that operates with a positive single power source. The amplified signal S2 output from the output terminal 23 of the operational amplifier 20 is the signal (information) of the received signal S1. The signal is amplified (faithfully) without loss.

Second Embodiment
FIG. 6 shows a second embodiment of the receiving circuit according to the present invention. Unless otherwise specified, the same components as those in the first embodiment described above are denoted by the same reference numerals, and description thereof is omitted. In addition, components similar to those of the first embodiment described above are denoted by similar symbols, and detailed description thereof is omitted. Further, the components not shown are the same as those in the first embodiment described above.

  FIG. 6 is a block diagram illustrating the receiving circuit 100A according to the second embodiment. The receiving circuit 100A is different from the receiving circuit 100 of the first embodiment in that a power source E3 is provided instead of the power source E1 and the power source E2.

  The power supply E3 is a positive voltage source, for example, and is connected to the other power supply terminal 25 of the operational amplifier 20. The operational amplifier 20 is operated (operated) by the voltage applied from the power supply E3. The power supply E3 is connected to the power supply terminal 13 of the signal unit 10. The signal unit 10 is driven by a voltage applied from the power source E3. Thus, the power supply E3 supplies a voltage capable of driving both the signal unit 10 and the operational amplifier 20, for example, a voltage in the range of about 2.7 to 3.6 [V]. As a result, the signal unit 10 and the operational amplifier 20 are driven by the same power supply E3.

  Thus, according to the receiving circuit 100 </ b> A in the present embodiment, the signal unit 10 is driven by the power supply E <b> 3 that applies a voltage to the operational amplifier 20. As a result, the signal unit 10 and the operational amplifier 20 are driven by the same power supply E3. Thereby, the receiving circuit 100A can operate (operate) with a single power source.

<Third Embodiment>
7 and 8 are for illustrating a third embodiment of the receiving circuit according to the present invention. Unless otherwise specified, the same components as those in the first embodiment or the second embodiment described above are denoted by the same reference numerals, and the description thereof is omitted. Further, components similar to those in the first embodiment or the second embodiment described above are denoted by similar reference numerals, and detailed description thereof is omitted. Further, the components not shown are the same as those in the first embodiment or the second embodiment described above.

  FIG. 7 is a block diagram illustrating a receiving circuit 100B according to the third embodiment. As shown in FIG. 7, the receiving circuit 100B is different from the receiving circuit 100 of the first embodiment and the receiving circuit 100A of the second embodiment in that the reference voltage unit 50B further includes a resistor 54 in addition to the diode 52. .

  The diode 52 and the resistor 54 are connected in series. One end of the resistor 54 is connected to the cathode of the diode 52, and the other end of the resistor 54 is grounded (connected to the ground (GND)). As a result, the cathode side of the diode 52 is grounded via the resistor 54. As described above, the reference voltage unit 50B further includes the resistor 54, so that the voltage of the reference terminal 11 and the positive input terminal 21 is higher than the voltage (potential) of the ground (GND), and the reference voltage unit 50 is a resistor. As compared with the case of the receiving circuit 100 of the first embodiment and the receiving circuit 100A of the second embodiment that do not include a device, the current flowing from the connection terminal 51 to the ground (GND) can be reduced.

  In the present embodiment, an example in which the cathode side of the diode 52 is grounded via the resistor 54 is shown. However, the present invention is not limited to this, and the anode side of the diode 52 is connected to the reference terminal 11 and the positive input terminal via the resistor 54. 21 may be connected. Moreover, although the example in which the diode 52 and the resistor 54 are connected in series is shown, the present invention is not limited to this, and the diode 52 and the resistor 54 may be connected in parallel to each other.

(Modification)
In the following modifications, the same components as those of the above-described embodiment are denoted by the same reference numerals, and the description thereof is omitted. In addition, components similar to those of the above-described embodiment are represented by similar symbols, and detailed description thereof is omitted. Further, the components not shown are the same as those in the above-described embodiment.

  FIG. 8 is a block diagram illustrating a modification of the receiving circuit 100B illustrated in FIG. As shown in FIG. 8, the receiving circuit 100B in the modification is different from the receiving circuit 100B shown in FIG. 7 in that the reference voltage unit 50B includes a variable resistor 55 instead of the resistor 54.

  The variable resistor 55 is a resistor whose resistance value can be changed to an arbitrary value within a predetermined range. The diode 52 and the variable resistor 55 are connected in series. One end of the variable resistor 55 is connected to the cathode of the diode 52, and the other end of the variable resistor 55 is grounded (connected to the ground (GND)). As a result, the cathode side of the diode 52 is grounded via the variable resistor 55. As described above, since the resistor included in the reference voltage unit 50B is the variable resistor 55, by setting the resistance value of the variable resistor 55 to an appropriate value, the connection terminal 51 passes through the ground (GND). It is possible to further reduce the current flowing through the.

  In this modification, an example in which the cathode side of the diode 52 is grounded via the variable resistor 55 is shown, but the present invention is not limited to this, and the anode side of the diode 52 is positive with the reference terminal 11 via the variable resistor 55. It may be connected to the input terminal 21. In addition, although the diode 52 and the variable resistor 55 are illustrated as being connected in series, the present invention is not limited thereto, and the diode 52 and the variable resistor 55 may be connected in parallel to each other.

  Thus, according to the receiving circuit 100B in the present embodiment, the reference voltage unit 50B further includes the resistor 54. Thus, the reference circuit 11 and the second embodiment of the first embodiment in which the reference voltage unit 50 does not include a resistor while the voltage of the reference terminal 11 and the positive input terminal 21 is higher than the voltage (potential) of the ground (GND). Compared with the case of the receiving circuit 100A of the embodiment, the current flowing through the diode 52 to the ground (GND) can be reduced. Thereby, the power consumption of the receiving circuit 100B can be reduced and energy saving can be achieved.

  Further, according to the receiving circuit 100B in the present embodiment, the resistor included in the reference voltage unit 50B is the variable resistor 55. Thereby, the current flowing through the diode 52 to the ground (GND) can be further reduced by setting the resistance value of the variable resistor 55 to an appropriate value. Thereby, the power consumption of the receiving circuit 100B can be further reduced, and energy saving can be achieved.

  Note that the configurations of the above-described embodiments may be combined, or some components may be replaced. The configuration of the present invention is not limited to the above-described embodiments, and various modifications may be made without departing from the scope of the present invention.

DESCRIPTION OF SYMBOLS 10 ... Signal part 11 ... Reference terminal 12 ... Signal terminal 20 ... Operational amplifier (operational amplifier)
DESCRIPTION OF SYMBOLS 21 ... Positive input terminal 22 ... Negative input terminal 23 ... Output terminal 30 ... 1st load part 40 ... 2nd load part 50, 50B ... Reference voltage part 51 ... Connection terminal 52, 53 ... Diode 54 ... Resistor 55 ... Variable resistor 100, 100A, 100B ... Receiving circuit E1, E2, E3 ... Power supply

Claims (4)

A signal unit having a reference terminal and a signal terminal for outputting a reception signal based on the voltage of the reference terminal;
An operational amplifier circuit having a positive input terminal, a negative input terminal, and an output terminal, and operated by applying a voltage from a single positive power source;
A first load connected between the output terminal and the negative input terminal;
A second load connected between the signal terminal and the negative input terminal;
A receiving circuit comprising: a reference voltage unit including a diode whose cathode side is grounded and whose anode side is connected to the reference terminal and the positive input terminal. The receiving circuit according to claim 1, wherein the signal unit is driven by the single power source. The receiving circuit according to claim 1, wherein the reference voltage unit further includes a resistor. The receiving circuit according to claim 3, wherein the resistor is a variable resistor.

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