JP2926819B2 - Case for mounting semiconductor elements - Google Patents
Case for mounting semiconductor elementsInfo
- Publication number
- JP2926819B2 JP2926819B2 JP1344523A JP34452389A JP2926819B2 JP 2926819 B2 JP2926819 B2 JP 2926819B2 JP 1344523 A JP1344523 A JP 1344523A JP 34452389 A JP34452389 A JP 34452389A JP 2926819 B2 JP2926819 B2 JP 2926819B2
- Authority
- JP
- Japan
- Prior art keywords
- case
- semiconductor element
- ceramic
- expansion
- metal material
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
Landscapes
- Ceramic Products (AREA)
Description
【発明の詳細な説明】 〈産業上の利用分野〉 この発明は高密度実装電子部品に用いられる半導体素
子搭載用ケースの改良に関するものである。DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to an improvement in a semiconductor element mounting case used for high-density electronic components.
〈従来の技術とその課題〉 従来から半導体素子搭載用ケースとしては、セラミッ
ク単体で構成される、いわゆるセラミックパッケージや
セラミックをガラスで封止したサーデイップパッケージ
等が用いられている。<Conventional Technology and its Problems> Conventionally, as a semiconductor element mounting case, a so-called ceramic package formed of a single ceramic, a sardip package in which ceramic is sealed with glass, and the like have been used.
これらのパッケージは高い気密性と剛性を有し、半導
体素子を外部環境から保護するには適したものである。These packages have high airtightness and rigidity, and are suitable for protecting a semiconductor element from an external environment.
一方、最近の電子部品の実装密度向上の要求は強いも
のがあり、ICそのものの集積度は年々向上しつつあり、
またこれと併行して半導体素子搭載用ケースの小型薄型
化の要求も高まっている。On the other hand, there is a strong demand for a recent increase in the mounting density of electronic components, and the degree of integration of the IC itself is increasing year by year.
At the same time, the demand for a smaller and thinner semiconductor device mounting case has been increasing.
前記のセラミック主体で構成されたパッケージは、そ
の主体であるセラミック自体が脆いものであるため、ケ
ースの薄型化は困難であった。In the package mainly composed of the ceramic, it is difficult to reduce the thickness of the case because the ceramic itself, which is the main component, is fragile.
即ち、ケースとしての強度（主として衝撃強度）を保
持しようとすると、セラミック部の厚みの最小値を0.7m
m以下とする必要があり、それ以下では機械的強度の極
めて弱いものとなってしまい、さらに気密性にも問題を
生じるのである。In other words, in order to maintain the strength of the case (mainly the impact strength), the minimum value of the thickness of the ceramic part is set to 0.7 m.
m or less, the mechanical strength becomes extremely weak below that, and there is a problem in airtightness.
これらのケースを薄型化する方法として、セラミック
よりなる中空枠の底面に金属板を鑞付けして用いる方法
が提案されている。そしてこの底板用金属板としては銅
合金や鉄−ニッケル合金を用いることが提案されてい
る。As a method for reducing the thickness of these cases, a method has been proposed in which a metal plate is brazed to the bottom surface of a hollow frame made of ceramic. It has been proposed to use a copper alloy or an iron-nickel alloy as the metal plate for the bottom plate.
本発明者らは枠に使用するセラミックとして電子部品
で使用実績の多いアルミナを選び、種々の金属材料を底
板として鑞付けして薄型ケースの試作検討を行なった結
果、構成素材を薄型化していくに伴ない、セラミック枠
と底板の熱膨張差による歪みが顕在化し、従来より提案
されている銅合金や鉄−ニッケル合金を底板としたので
は実用化が困難であった。The present inventors have selected alumina, which has a high track record of use in electronic components, as the ceramic used for the frame, brazed various metal materials as the bottom plate, and studied the trial production of a thin case. As a result, distortion due to the difference in thermal expansion between the ceramic frame and the bottom plate has become apparent, and it has been difficult to use copper alloys or iron-nickel alloys conventionally proposed as the bottom plate.
即ち、セラミック枠の板厚を0.5mmt、金属底板の板厚
を0.2mmt以下とした場合、この金属底板として銅合金を
用いると、セラミック枠との鑞付け時に熱歪によるソリ
や変形を生じる。That is, when the thickness of the ceramic frame is set to 0.5 mmt and the thickness of the metal bottom plate is set to 0.2 mmt or less, when a copper alloy is used as the metal bottom plate, warping or deformation due to thermal strain occurs during brazing to the ceramic frame.
次に従来からセラミックとの接合に多用されている鉄
−ニッケル系合金（Fe-40〜50重量％Ni、Fe-29重量％Ni
-17重量％Co合金など）を金属底板として用いる検討を
行なった。Next, iron-nickel alloys (Fe-40 to 50% by weight Ni, Fe-29% by weight Ni
-17 wt% Co alloy) was used as the metal bottom plate.
これらの鉄−ニッケル系合金は、本来真空管等に用い
られるガラス封着合金として開発されたものであり、そ
の膨張特性は変曲点を有し、500℃以下の温度では低膨
張特性を示すが、500℃以上の温度における膨張係数は
セラミックのそれより大きな値を示すのである。These iron-nickel alloys were originally developed as glass sealing alloys used for vacuum tubes and the like, and their expansion characteristics have an inflection point, and exhibit low expansion characteristics at a temperature of 500 ° C. or less. The coefficient of expansion at temperatures above 500 ° C. is greater than that of ceramics.
従って、500℃以下で鑞付けを実施すれば、この温度
領域でAl2O3と近似した膨張特性をもつ43〜48％Ni-Fe合
金にとっては所要のケースを作ることができた。Therefore, if the brazing is performed at a temperature of 500 ° C. or less, a required case can be made for a 43 to 48% Ni—Fe alloy having an expansion characteristic close to that of Al 2 O 3 in this temperature range.
この時用い得る鑞材としては、いわゆる半田や金鑞が
ある。しかしながら、金鑞は極めて高価な材料であり、
経済的な面で不適当である。また半田は安価なことはよ
いが、半導体を実装する過程での熱履歴（約400℃）に
耐えられない欠点がある。このほか、安価であり、しか
も電子部品にも使用実績の多い銀鑞で鑞付けしようとす
ると、700℃以上の鑞付温度が必要である。鉄−ニッケ
ル合金は固い材料であるため、銀鑞付けを行なうと，ソ
リが生じたり、セラミックに割れを生ずる。As the brazing material usable at this time, there are so-called solder and gold solder. However, gold solder is a very expensive material,
Not economically appropriate. Solder should be inexpensive, but has a drawback that it cannot withstand the heat history (about 400 ° C.) in the process of mounting the semiconductor. In addition, when brazing with silver brazing, which is inexpensive and has been used for electronic components, a brazing temperature of 700 ° C. or higher is required. Since the iron-nickel alloy is a hard material, silver brazing causes warping and cracking of the ceramic.
即ち、前述のように、Fe-Ni系合金はその膨張に変曲
点を有するために500℃以下の膨張をAl2O3に合わせよう
とすると、鑞付け温度である700℃までの膨張が合わ
ず、ソリが発生し、逆に700℃以上で膨張を合わせよう
とすると、低温側（約400℃前後）で大きな膨張差が生
じ、半導体素子搭載の工程での熱処理時に大きな熱歪を
生じてセラミックに割れを生じることが多く、信頼性の
点で不十分である。That is, as described above, since the Fe-Ni-based alloy has an inflection point in its expansion, if the expansion of 500 ° C or less is adjusted to Al 2 O 3 , the expansion up to the brazing temperature of 700 ° C will occur. If it does not fit, warp will occur, and conversely if you try to match the expansion at 700 ° C or higher, a large expansion difference will occur on the low temperature side (about 400 ° C), causing large thermal strain during heat treatment in the semiconductor element mounting process In many cases, cracks occur in the ceramic, which is insufficient in reliability.
さらに、アルミナと膨張係数を整合させたヒートシン
クとして用いられているCu-W複合材を用いて試作を行な
ったところ、良好な性能は得られたが、Cu-W合金は粉末
治金で製造される焼結体であり、目的とする薄板の製造
が困難であると同時に高価につくため、経済的な理由か
らも量産化が困難であった。Furthermore, a prototype was produced using a Cu-W composite material used as a heat sink with an expansion coefficient matched to that of alumina, and good performance was obtained, but the Cu-W alloy was manufactured by powder metallurgy. It is difficult to manufacture a target thin plate at the same time as it is expensive, so mass production is difficult for economic reasons.
〈課題を解決するための手段〉 本発明者らは上記に鑑みて、セラミック枠と金属板を
鑞付け接合した半導体素子搭載用ケースを製造するに当
たり、 （１）鑞付けが安価でかつ信頼性の高い銀鑞付けができ
ること。<Means for Solving the Problems> In view of the above, the present inventors have found that, when manufacturing a semiconductor element mounting case in which a ceramic frame and a metal plate are brazed and joined, (1) brazing is inexpensive and reliable. High silver brazing ability.
（２）ケースの底板として容易に圧延で薄板の作れる金
属材料であること。(2) A metal material that can be easily rolled into a thin plate as the bottom plate of the case.
の条件を満足する材料の組合わせについて検討した結
果、この発明に至ったのである。As a result of studying a combination of materials satisfying the above conditions, the present invention was achieved.
即ち、この発明はCuを上、下の層とし、Moを中間層と
せる三層構造の複合金属材料の周囲にアルミナセラミッ
ク枠を接合してなる半導体素子搭載用ケースを提供する
ものである。」を「即ち、この発明は、Cuを上下の層と
し、Moを中間層とする三層を熱膨張係数が20〜700℃の
範囲で６〜８×10-6／℃となる割合で複合した板状の複
合金属材料と、アルミナセラミック枠を接合した部品
を、半導体素子用ケースのベース又はキャップ、あるい
はその双方に用い、低融点ガラスで封止されていること
を特徴とする、ケースの総厚が1.4mm以下である半導体
素子搭載用ケースを提供するものである。That is, the present invention provides a semiconductor element mounting case in which an alumina ceramic frame is joined around a three-layered composite metal material in which Cu is an upper and lower layer and Mo is an intermediate layer. In other words, the present invention is based on the concept that the three layers having Cu as the upper and lower layers and Mo as the intermediate layer are compounded at a rate of 6 to 8 × 10 −6 / ° C. in the range of 20 to 700 ° C. The component obtained by joining the plate-shaped composite metal material and the alumina ceramic frame is used as a base or a cap of a semiconductor element case, or both, and is sealed with a low-melting glass. A case for mounting a semiconductor element having a total thickness of 1.4 mm or less is provided.
〈作用〉 以下、この発明を添付図面により説明する。<Operation> Hereinafter, the present invention will be described with reference to the accompanying drawings.
第１図はこの発明になる半導体素子搭載用ケースの斜
視図であって、１はCu2を上、下の層とし、Moを中間層
３とした三層構造の複合金属材料層であり、該複合金属
材料層１の上面周囲に銀鑞材４にてアルミナセラミック
枠５を接合してなるものである。FIG. 1 is a perspective view of a semiconductor element mounting case according to the present invention, wherein 1 is a three-layer composite metal material layer in which Cu2 is an upper and lower layer and Mo is an intermediate layer 3; An alumina ceramic frame 5 is bonded to the periphery of the upper surface of the composite metal material layer 1 with silver solder 4.
本発明者らは半導体素子搭載用ケースにおける底板用
金属材層として室温から700℃までの該材料層の膨張係
数を極力セラミック枠の材質であるAl2O3のそれに近づ
けるための設計としてCuとMoの板厚の比をCu1に対してM
o 0.95〜3.5の割合とし、上述の三層構造の複合金属材
料層とするものである。このような組み合わせにより、
複合金属材料層１は熱膨張係数が20〜700℃の範囲で６
〜８×10-6／℃となる。The present inventors have designed Cu as a design to make the expansion coefficient of the material layer from room temperature to 700 ° C. as close as possible to that of Al 2 O 3 , which is the material of the ceramic frame, as a metal layer for the bottom plate in the semiconductor element mounting case. The ratio of Mo thickness to Cu1 is M
o The ratio is 0.95 to 3.5, and the composite metal material layer having the three-layer structure described above is formed. With such a combination,
The composite metal material layer 1 has a thermal expansion coefficient of 20 to 700 ° C.
８8 × 10 −6 / ° C.
そしてこのような複合金属材料層１を0.5mmt以下のア
ルミナセラミック枠５と銀鑞材４で接合してケースとす
ることによってこのケースに半導体素子を実装する工程
で想定される熱履歴（室温〜450℃の繰返し加熱）を負
荷しても、ソリや剥れなどの生じないケースが得られる
のである。Then, such a composite metal material layer 1 is joined to an alumina ceramic frame 5 of 0.5 mmt or less with a silver brazing material 4 to form a case, and a heat history (from room temperature to room temperature) assumed in a process of mounting a semiconductor element in this case. Even if a load of 450 ° C. is repeatedly applied, a case where warping or peeling does not occur can be obtained.
第２図は上記で得た第１図に示すケースを用いたIC用
パッケージの一例を示す断面図であって、ケースの凹部
６に半導体素子７が搭載され、アルミナセラミック枠５
の上部に低融点封止ガラス９でリードフレーム８を接合
したものであり、十分に実用可能であった。FIG. 2 is a sectional view showing an example of an IC package using the case shown in FIG. 1 obtained above, in which a semiconductor element 7 is mounted in a concave portion 6 of the case, and an alumina ceramic frame 5 is provided.
And the lead frame 8 was joined to the upper portion with a low-melting-point sealing glass 9 and was sufficiently practical.
またこれによってトータル厚を1.4mm以下0.9mmまで薄
型化することができた。This also allowed the total thickness to be reduced to 1.4 mm or less and 0.9 mm.
第３図は加熱温度と熱膨張による単位長あたりの歪量
との関係、従来材料と比較し示したものである。FIG. 3 shows the relationship between the heating temperature and the amount of strain per unit length due to thermal expansion, in comparison with a conventional material.
Ni45〜50重量％を含有するFe合金を上、下の層とし、
Moを中間層とする三層構造の複合金属材料を用いて、ア
ルミナと膨張係数を整合させた場合を用いて、アルミナ
と膨張係数を整合させた場合においても、その膨張特性
は変曲点を無くすことができず、アルミナに対しても十
分に膨張係数を一致させる事ができなかった。Fe alloy containing 45-50% by weight of Ni as upper and lower layers,
When the expansion coefficient is matched with alumina using a composite metal material with a three-layer structure with Mo as the intermediate layer, and the expansion coefficient is matched with alumina, the expansion characteristic shows an inflection point. It could not be eliminated, and the expansion coefficient could not be sufficiently matched with alumina.
Al2O3に対して全温度領域で熱膨張特性を整合させる
には、Cuのような変曲点を全く有しない材料が望まし
い。In order to match the thermal expansion characteristics of Al 2 O 3 over the entire temperature range, a material having no inflection point, such as Cu, is desirable.
〈発明の効果〉 以上説明したように、この発明によれば、薄いアルミ
ナセラミックと複合金属材料を歪ませることなく接合さ
せることができるので、ICカードやメモリーカードなど
薄く、しかも気密性の高いパッケージが要求される分野
においても使用すると、特に効果的である。<Effects of the Invention> As described above, according to the present invention, a thin alumina ceramic and a composite metal material can be joined without distortion, so that a thin and highly airtight package such as an IC card or a memory card is provided. Is particularly effective when used in fields where is required.
第１図はこの発明で得た半導体素子搭載用ケースの斜視
図、第２図は該ケースを応用した一例を示すパッケージ
の断面図である。第３図は本発明材料と従来材料との比
較を示す特性例である。 １……複合金属材料層、２……Cu板、３……Mo板、４…
…銀鑞材、５……アルミナセラミック枠、６……凹部、
７……半導体素子、８……リードフレーム、９……低融
点封止ガラス、10……キャップFIG. 1 is a perspective view of a case for mounting a semiconductor element obtained by the present invention, and FIG. 2 is a sectional view of a package showing an example in which the case is applied. FIG. 3 is a characteristic example showing a comparison between the material of the present invention and the conventional material. 1 ... composite metal material layer, 2 ... Cu plate, 3 ... Mo plate, 4 ...
... Silver solder material, 5 ... Alumina ceramic frame, 6 ... Recess,
7: Semiconductor element, 8: Lead frame, 9: Low melting point sealing glass, 10: Cap
フロントページの続き (58)調査した分野(Int.Cl.6，ＤＢ名) H01L 23/02,23/06 H01L 23/12,23/14 Continued on the front page (58) Fields surveyed (Int.Cl. 6 , DB name) H01L 23 / 02,23 / 06 H01L 23 / 12,23 / 14
Claims (1)
を熱膨張係数が20〜700℃の範囲で６〜８×10-6／℃と
なる割合で複合した板状の複合金属材料と、アルミナセ
ラミック枠を銀蝋にて接合した部品を、半導体素子ケー
スのベース又はキャップ、あるいはその双方に用い、低
融点ガラスで封止されていることを特徴とする、ケース
の総厚が0.9mm以上、1.4mm以下である半導体素子搭載用
ケース。1. A plate-like composite in which Cu is used as an upper and lower layer and Mo is used as an intermediate layer in a ratio of 6 to 8 × 10 −6 / ° C. in a thermal expansion coefficient range of 20 to 700 ° C. A composite metal material and a component obtained by joining an alumina ceramic frame with silver wax are used for a base and / or a cap of a semiconductor element case, and are sealed with a low melting point glass. A semiconductor element mounting case with a thickness of 0.9mm or more and 1.4mm or less.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1344523A JP2926819B2 (en) | 1989-12-27 | 1989-12-27 | Case for mounting semiconductor elements |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1344523A JP2926819B2 (en) | 1989-12-27 | 1989-12-27 | Case for mounting semiconductor elements |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03200353A JPH03200353A (en) | 1991-09-02 |
| JP2926819B2 true JP2926819B2 (en) | 1999-07-28 |
Family
ID=18369935
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1344523A Expired - Fee Related JP2926819B2 (en) | 1989-12-27 | 1989-12-27 | Case for mounting semiconductor elements |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2926819B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2015186320A1 (en) * | 2014-06-04 | 2015-12-10 | パナソニックＩｐマネジメント株式会社 | Semiconductor package and method for manufacturing same |
-
1989
- 1989-12-27 JP JP1344523A patent/JP2926819B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH03200353A (en) | 1991-09-02 |
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