JP2906682B2 - Semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device, and more particularly to a source type output circuit using an N-channel field effect transistor as an output element.

[0002]

2. Description of the Related Art A conventional source-type output circuit using an N-channel field-effect transistor as an output element, as shown in FIG. -The gate drive circuit 4 is driving in accordance with the OFF signal.
The output waveform of the gate drive circuit 4 is, as shown in FIG. 4, a GND potential (0 V) when it is off, and V when it is on.
It is the DD potential (waveform a) or the VDD + V1 potential (waveform b).

[0005] A waveform a shows a case where driving is performed with a voltage between VDD and GND. Waveform b shows the threshold of output transistor 1 because the output is a source follower.
To eliminate the power loss of the voltage VT partial state, and are if a built-in charge pump circuit to the gate drive circuit 4, V
1 is a boosted voltage to VDD.

[0004]

In such a conventional output circuit, when the output transistor 1 is off, the gate voltage is at the GND potential (0 V). When a negative voltage is applied to the output 6 while the output is off, there is a disadvantage that the output transistor 1 is turned on.

An object of the present invention is to provide a semiconductor device which solves the above-mentioned drawback and prevents the output transistor from turning on even when a negative voltage is applied to the output.

[0006]

[MEANS FOR SOLVING THE PROBLEMS] A saw is provided between a power supply and an output.
Having a first conductive channel connected to a drain channel
An output transistor and a control signal are input and
Gate drive circuit that drives the gate of the output transistor
A semiconductor device having a path,
And an inverter operated by the power supply,
The source drain between the output transistor gate and the node
Connect the rain path and connect the gate to the output of the inverter
First transistor having a second conductive channel isolated
And a resistor connected between the node and the output; and
Source drain between the gate of the transistor and the output
A second conductor connected to an in-path and a gate connected to the node
A channel having a channel and
A threshold voltage smaller than the threshold voltage
And a second transistor having the same .

[0007]

FIG. 1 is an equivalent circuit diagram of a semiconductor device according to one embodiment of the present invention.

In FIG. 1, in this embodiment, the gate of an output transistor 1 is composed of a gate drive circuit 4, a source of a P-channel transistor 2 (hereinafter referred to as T2), and a source of a P-channel transistor 3 (hereinafter referred to as T3). Is connected, and the gate of T2 is controlled by T3 via the inverter 8 by a control signal.

When the control signal is "1", the output is on, and when the control signal is "0", the output is off.

When the control signal is "1", T3 turns on and short-circuits between the gate and source of T2.
T2 is off. Therefore, the circuit based on T2 and T3 does not affect the operation of the output circuit when the control signal is "1" (output on).

When the control signal is "0" (output off), T3 is turned off and T2 is short-circuited between the gate and the drain by the resistor 5, so that the potential of the output 6 becomes the gate potential of the output transistor 1 (= T2 From the source potential of the
When the potential becomes lower than the threshold voltage VT (T2) of T2, T2 turns on and the gate of the output transistor 1
The source-to-source voltage is substantially clamped to VT (T2). Threshold voltage VT (T1) of output transistor 1
Is in a relationship of VT (T1)> VT (T2), even if the output terminal becomes a negative potential, the output transistor 1
Never turns on.

The output circuit of this embodiment includes a gate drive circuit 4 for driving the gate of the output transistor 1 and a first P-channel transistor 3 for controlling the gate voltage when the output is off. Even when the output terminal goes to a negative potential when the output is turned off, the voltage between the gate and the source of the output transistor 1 acts to lower, so that the output transistor 1 is not turned on.

FIG. 2 is an equivalent circuit diagram of a semiconductor device according to another embodiment of the present invention.

In FIG. 2, this embodiment is obtained by adding a resistor 7 to the embodiment of FIG. 1, and the other parts are the same as those of FIG.

The function of the resistor 7 will be described. When the output is off, the output of the gate drive circuit 4 is at the GND potential (0 V). If the output section of the gate drive circuit 4 has a parasitic characteristic with respect to GND, the gate potential of the output transistor 1 becomes Because it does not become negative, resistance 7
Has been put. The resistor 7 also protects the gate drive circuit 4 when a positive potential is applied to the output terminal when the output is off.

The present embodiment is characterized in that the gate of the transistor T1 and the output of the gate drive circuit 4 are connected via a resistor 7 or a diode.

[0017]

As described above, according to the present invention, by providing the gate drive circuit for the output transistor and the circuit for controlling the gate voltage when the output is off, the operation at the time of output on can be affected. Therefore, there is an effect that the output transistor is not turned on by the negative voltage of the output terminal when the output is turned off.

[Brief description of the drawings]

FIG. 1 is an equivalent circuit diagram of a semiconductor device according to one embodiment of the present invention.

FIG. 2 is an equivalent circuit diagram of another embodiment of the present invention.

FIG. 3 is an equivalent circuit diagram of a conventional output circuit.

FIG. 4 is a waveform diagram showing an output waveform of a gate drive circuit.

[Description of Signs] 1 Output transistor 2, 3 P-channel transistor 4 Gate drive circuit 5, 7 Resistance 8 Inverter

Claims (1)

(57) [Claims] 1. A source / drain path between a power supply and an output.
Output transistor having a first conductive channel connected to
And the output transistor
Having a gate drive circuit for driving the gate of the
In the conductor device, before the control signal is input,
An inverter operated by the power supply;
Connect the source / drain path between the gate and the node of the star
A second conductor having a gate connected to the output of the inverter.
A first transistor having a channel;
And a resistor connected between the output transistor and the output transistor.
Before connecting the source / drain path between the
Having a second conductive channel with a gate connected to the node
Together with the threshold voltage of the output transistor.
A second transistor having a threshold voltage of a smaller value.
Wherein a and a Njisuta.