JP3470488B2 - Semiconductor relay circuit - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor relay circuit in which an input and an output are insulated by using an optical coupling method.

[0002]

2. Description of the Related Art FIG. 6 shows a conventional semiconductor relay circuit. In this circuit, an optical signal generated by a light emitting element 1 such as an LED connected between input terminals I1 and I2 is received by a photovoltaic diode array 2 or 2'to generate a photovoltaic power. , This photovoltaic power output MOSFET3
It is applied between the gate and the source of a, 3b, 3c and 3d. The output MOSFETs 3a, 3b are N-channel depletion type MOSFETs, and 3c, 3
d is an N-channel enhancement type MOSFET
And each drain has output terminals O1, O2, O
3 and O4, respectively. In this way, by combining the circuit using the depletion type MOSFET and the circuit using the enhancement type MOSFET, a C contact relay circuit and two output MOSFETs 3a, 3b and 3c, 3d are provided at the output terminal O.
A common AC / DC relay circuit can be realized by connecting the sources in common in anti-series between O1, O2 and between O3, O4.

The photovoltaic power of the photovoltaic diode array 2 is output to the output MOSFETs 3a, 3 through the resistors 5, 5 '.
It is applied between the gate and source of b, 3c and 3d. The gates of the output MOSFETs 3a, 3b, 3c, 3d are
The drains of the control transistors 4 and 4 ′, which are depletion type MOSFETs (or JFETs or SITs), are also output MOSFETs 3 a, 3 b, and 3.
The sources of control transistors 4 and 4'are connected to the sources of c and 3d. The gates and sources of the control transistors 4 and 4'are connected to both ends of the bias resistors 5 and 5'as shown in the figure.

When an input signal is applied to the light emitting element 1 and a photovoltaic power is generated in the photovoltaic diode arrays 2 and 2 ', the drain and source of the control transistors 4 and 4'and the resistors 5 and 5'are turned on. A photocurrent flows therethrough and a voltage is generated across the resistors 5, 5 '. This voltage biases the control transistors 4 and 4'into a high impedance state, so that a photoelectromotive force is applied between the gates and sources of the output MOSFETs 3a, 3b, 3c, and 3d to output MO.
The SFETs 3a and 3b are turned off, and the SFETs 3c and 3d are turned on. The number of the photovoltaic diode arrays 2 and 2'in series is determined by the number of output MOSFETs 3a, 3b, 3c and 3d.
The number is selected to be sufficient to generate a voltage exceeding the threshold voltage of.

When the input signal to the light emitting element 1 is cut off,
Since the photovoltaic power of the photovoltaic diode arrays 2, 2'is lost and the voltage across the resistors 5, 5'is lost, the depletion type control transistors 4, 4'return to the low impedance state, and the output MOSFET 3a. , 3b, 3
By discharging the accumulated charge between the gate and source of c and 3d, the output MOSFETs 3a and 3b are turned on,
3c and 3d are turned off.

A constant voltage element is connected in parallel with the bias resistors 5 and 5'to prevent the potential difference across the resistors 5 and 5'from rising above a predetermined voltage. Here, enhancement-type MOSFETs 6 and 6 ′ in which the gate and the drain are commonly connected are used as the constant voltage element, and the potential difference generated at both ends of the resistor 5 is the MOSFET 6,
It is designed not to rise above the 6'threshold voltage.

[0007]

In the above-described conventional example, the relay circuit has the same circuit for each of the A contact and B contact circuits, and the timing of changing from ON to OFF is the same as that of the output side. If the MOSFETs have the same threshold voltage, both circuits may be on. Therefore, it is difficult to perform a so-called BBM (Break Before Make) operation in which one is turned off before the other is turned on.

The present invention has been made in view of the above circumstances, and an object thereof is to provide a semiconductor relay circuit capable of BBM operation in which one is turned off before the other is turned on. Especially.

[0009]

According to the present invention, in order to solve the above-mentioned problems, a resistor is inserted in a charge path of a gate-source capacitance of an output enhancement type MOSFET in an A contact circuit, and a B contact is provided. In the circuit, a resistor is inserted in the discharge path of the gate-source capacitance of the output depletion type MOSFET. In the present invention, by delaying the ON timing and not delaying the OFF timing in both the A-contact and B-contact circuits in this manner, the other is turned off before the other is turned on. The
This enables BBM operation.

[0010]

1 is a circuit diagram of an embodiment of claim 1 of the present invention. The operation will be described below. When an input signal is applied to the light emitting element 1, the depletion type MO
In the B contact circuit using the SFETs 3a and 3b, photovoltaic power is generated in the photovoltaic diode array 2, and a photocurrent flows between the drain and source of the control transistor 4 and through the resistor 5 to both ends of the resistor 5. Voltage is generated. This voltage biases the control transistor 4 in a high impedance state, so that the output MOSFETs 3a, 3b
Photovoltaic power is applied between the gate and source of the
The OSFETs 3a and 3b are turned off. At the same time, even in the A contact circuit using the enhancement type MOSFETs 3c and 3d, photovoltaic power is generated in the photovoltaic diode array 2 ', and light is generated between the drain and source of the control transistor 4'and the resistors 5'and 7b. A current flows and a voltage is generated across the resistor 5 '. This voltage biases the control transistor 4'into a high impedance state, so that a photoelectromotive force is applied between the gate and source of the output MOSFETs 3c and 3d, and the output MOSFET 3c.
c and 3d are turned on. However, since the resistor 7b is provided, the time required to charge the gate-source capacitances of the output MOSFETs 3c and 3d is the same as that of the output MOSFET 3 described above.
It takes longer than the time required to charge the gate-source capacitances of a and 3b, and the output MOSFETs 3c and 3d are turned on after the output MOSFETs 3a and 3b are turned off.

Next, when the input signal to the light emitting element 1 is cut off, the photovoltaic power of the photovoltaic diode arrays 2 and 2'is lost and the voltage across the resistors 5 and 5'is lost. Type control transistors 4, 4'return to the low impedance state, and output MOSFETs 3a, 3b,
By discharging the charge accumulated between the gate and the source of 3c and 3d, the output MOSFETs 3a and 3b are turned on, and the output MOSFETs 3c and 3d are turned off. But here again B
Since there is a resistor 7a in the discharge path in the contact circuit, the time required to discharge the charges charged in the gate-source capacitances of the output MOSFETs 3c and 3d is the gate-source capacitance of the output MOSFETs 3a and 3b. The output MOSFETs 3a and 3b are turned on after the output MOSFETs 3c and 3d are turned off.

2 and 3 are circuit diagrams of a second embodiment of the present invention. In the circuit of claim 1, resistors are inserted in the discharging path of the B contact circuit and the charging path of the A contact circuit. However, in this circuit, if only the optical voltage supply circuit excluding the output MOSFET is viewed, the A contact circuit, Resistors 8 and 8'are provided at the same position in both B contact circuits, and the directions of the diodes 9a and 9b connected in parallel to the resistors are changed. The direction of these diodes 9a, 9b is the discharge direction in the A contact circuit, and
By setting the contact circuit in the charging direction, the same operation as in claim 1 is possible.

4 and 5 are circuit diagrams of the third and fourth embodiments of the present invention. In the semiconductor relay circuit according to claim 2, when the output MOSFET is an enhancement type instead of the rectifying element in parallel with both ends of the resistor inserted in series in the charge / discharge path to the gate-source capacitance of the MOSFET, If the resistance is on the gate side, the enhancement type PMOS transistor 12 is connected, and the gate is connected to the sources of the output enhancement type MOSFETs 3c and 3d. If the resistance is on the source side, the enhancement type NMOS transistor 13 is connected. , Its gates are output enhancement type MOSFETs 3c, 3d
Connected to the gate. And output MOSFET
Is a depletion type, the depletion type PMOS transistor 11 if the position of the resistor is on the gate side.
And the gate is connected to the output depletion type MOS
Depletion type NMOS transistor 10 connected to the sources of the FETs 3a and 3b, and if the resistance position is on the source side.
And the gate is connected to the output depletion type MOS
It is connected to the gates of the FETs 3a and 3b. These M
The threshold voltages of the OS transistors 10, 11, 12, 13 are the output MOSFETs 3a, 3b, 3c, 3d.
It is set a little higher than the threshold voltage of. By setting in this way, it is slow until the output MOSFET exceeds the threshold voltage, but it is not a resistor but a MOS transistor 10 or 1 until it becomes a steady state after that.
Since current flows through 1, 12, and 13, it takes a long time to start turning on, but it takes only a short time to completely turn on.

[0014]

According to the present invention, a resistor is inserted in the charging path of the gate-source capacitance of the output enhancement type MOSFET in the A contact circuit, and the gate-source capacitance of the output depletion type MOSFET is used in the B contact circuit. By inserting a resistor in the discharge path of, the delay of the on timing and the delay of the off timing are delayed in both the A contact and B contact circuits, so that the other is turned off before the other is turned on. BBM operation can be enabled.

[Brief description of drawings]

FIG. 1 is a circuit diagram of an embodiment of claim 1 of the present invention.

FIG. 2 is a circuit diagram of an embodiment of claim 2 of the present invention.

FIG. 3 is a circuit diagram of another embodiment of claim 2 of the present invention.

FIG. 4 is a circuit diagram of an embodiment of claim 3 of the present invention.

FIG. 5 is a circuit diagram of an embodiment of claim 4 of the present invention.

FIG. 6 is a circuit diagram of a conventional example.

[Explanation of symbols]

1 Light emitting element 2,2 'photovoltaic diode array Depletion type MOSFET for 3a, 3b output 3c, 3d output enhancement type MOSFET 4,4 'Depletion type control transistor 5,5 'resistance 6,6 'enhancement type MOSFET 7a, 7b resistance 8a, 8b resistance 9a, 9b diode 10 Depletion type NMOS transistor 11 Depletion type PMOS transistor 12 Enhancement type PMOS transistor 13 Enhancement-type NMOS transistor

─────────────────────────────────────────────────── ─── Continuation of the front page (58) Fields surveyed (Int.Cl. ⁷ , DB name) H03K 17/78

Claims (4)

(57) [Claims] 1. A light emitting element that generates an optical signal in response to an input signal, a first photovoltaic diode array that receives the optical signal and generates photovoltaic power, and a first photovoltaic diode. Photovoltaic power generated by an array is applied between a gate and a source to control an output signal between the drain and the source, and an enhancement type MOSFET, which is connected in parallel between the gate and the source of the enhancement type MOSFET, A first control circuit, which is in a high impedance state when an electromotive force is generated, and is in a low impedance state when the photovoltaic power disappears, and a charging current from the first photovoltaic diode array to the gate-source capacitance of the enhancement type MOSFET. A first resistor that is serially inserted in a path through which a current flows, and a second resistor that receives an optical signal from the light emitting element and generates a photoelectromotive force. A photovoltaic diode array of
A depletion-type MOSFET that applies the photovoltaic power generated by the second photovoltaic diode array between the gate and the source to control the output signal between the drain and the source,
A second control circuit that is connected in parallel between the gate and the source of the depletion type MOSFET, is in a high impedance state when the photovoltaic power is generated, and is in a low impedance state when the photovoltaic power is lost, and the depletion type M
A semiconductor relay circuit, comprising: a second resistor that is serially inserted into a path through which a discharge current flows from the gate-source capacitance of the OSFET to the second control circuit. 2. A light emitting element that generates an optical signal in response to an input signal, a first photovoltaic diode array that receives the optical signal and generates photovoltaic power, and a first photovoltaic diode. Photovoltaic power generated by an array is applied between a gate and a source to control an output signal between the drain and the source, and an enhancement type MOSFET, which is connected in parallel between the gate and the source of the enhancement type MOSFET, A first control circuit that is in a high impedance state when an electromotive force is generated, and is in a low impedance state when the photovoltaic power is lost, and an enhancement-type MOSF.
A first resistor inserted in series in a charge / discharge path to the gate-source capacitance of ET, and a second photovoltaic diode array that receives an optical signal from the light emitting element to generate a photovoltaic force. And a photovoltaic power generated by the second photovoltaic diode array is applied between the gate and the source,
Depletion type MOS for controlling output signal between sources
A second control circuit, which is connected in parallel between the FET and the gate / source of the depletion type MOSFET, is in a high impedance state when the photovoltaic power is generated, and is in a low impedance state when the photovoltaic power is lost, and a depletion A second resistor inserted in series in a charge / discharge path to the gate-source capacitance of the MOSFET,
A rectifying element is connected in parallel to both ends of the resistor so as to be reverse to the charging current and forward to the discharging current. A semiconductor relay circuit in which rectifying elements that are in the opposite direction are connected in parallel. 3. The semiconductor relay circuit according to claim 2, wherein the first resistor is serially inserted on the gate side of the enhancement type MOSFET, and an enhancement type PMOS is provided in parallel with both ends of the first resistor instead of the rectifying element. The drain and source of the transistor are connected, the gate is connected to the source of the enhancement type MOSFET for output, and the second
Is inserted in series on the gate side of the depletion type MOSFET, the drain and source of the depletion type PMOS transistor are connected in parallel to the both ends of the second resistor instead of the rectifying element, and the gate is connected to the depletion type MOSFET for output. A semiconductor relay circuit characterized by being connected to the source of the. 4. The semiconductor relay circuit according to claim 2, wherein the first resistor is inserted in series on the source side of the enhancement type MOSFET, and an enhancement type NMOS is provided in parallel with both ends of the first resistor instead of the rectifying element. Connect the drain and source of the transistor, and connect the gate to the gate of the output enhancement type MOSFET.
Is inserted in series on the source side of the depletion type MOSFET, the drain and source of a depletion type NMOS transistor are connected in parallel to the both ends of the second resistor instead of the rectifying element, and its gate is connected to the output depletion type. A semiconductor relay circuit characterized by being connected to the gate of a MOSFET.