JP2888202B2 - Performance recording and playback device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [0001] The present invention relates to a key for an electronic musical instrument.
Records performance information input from boards, computers, etc.
Then, the stored performance information is reproduced and output to a sound source or the like.
The present invention relates to a performance recording / playback apparatus. [0002] 2. Description of the Related Art In a conventional performance recording / reproducing apparatus, a key
By operating the keyboard, key-on information,
Performance information consisting of key-off information indicating the silence of musical tones is generated.
Live. And these performance information they generate
It is recorded together with the timing information indicating the timing.
Also, the recorded key-on information and key-off information
By playing back based on the information and outputting to the sound source
I'm trying to perform automatically. In recent years, MI
DI (Musical Instrument Digi)
tal Interface) standard for keyboard and
Channel identification data is added to the sound source device and performance information.
Communication. [0003] The above-mentioned conventional performance recording
The playback device simply converts the input performance information as it is.
It is also stored and read out and output as it is at the time of later playback operation
I just did. For this reason, the sound source
Drive a sound source device that is set to a different channel from that of the device.
If you try to move, the keyboard used to record the performance information
Change and set the transmission channel of the external input device such as
Recording and reproduction again. Or use a new
Change the receiving channel of the sound source device you want to use
Can also drive this sound source device.
In the case of, the same channel as the sound source device that has been driven until now
Is set, and multiple devices with the same channel
It becomes difficult to distinguish thereafter. Further, a connection is made as a performance information input device.
More devices and receive performance information during playback
When the number of connected devices such as sound source devices increases, the input side,
If you want to change each channel on the output side,
Overlap with the currently set channel between
Set the input and output channels so that nothing is
It needs to be fixed. In addition, during the channel change
Cannot be changed or the number of channels that can be changed is limited.
Some devices are connected, and in some cases,
If you need to redo the method itself, it is very troublesome
Automatic performance of music, leading to recording errors and playback errors
There are problems such as difficulty in recording / reproducing information.
Was. The present invention solves the above-mentioned conventional problems.
In consideration of this, even if you do not change the settings of
The input / output relationship can be freely changed only by the performance recording / playback device itself.
The purpose is to be. [0006] Means for Solving the Problems To solve the above problems,
In the present invention, the timing information representing the performance timing
Input terminals for inputting performance information including at least information
And a record for recording performance information input from the input terminal.
Recording means having a plurality of recording tracks;
And a plurality of output terminals for outputting performance information.
The information is stored in the recording means as performance information of a plurality of recording tracks.
The recorded performance information is output from the output means.
A performance recording and reproducing apparatus,
Input terminal for inputting performance information to be recorded
First setting means for setting from among the plurality of input terminals;
An output from which performance information is output for each of the plurality of recording tracks.
A second setting for setting the output terminal from among the plurality of output terminals.
Setting means, and input performance information to the plurality of input terminals.
The information set by the first setting means corresponding to each
Writing means for writing to recording tracks, and each of the recording tracks
The performance information recorded in the
Reading means for reading from each recording track by means of
Corresponds to the plurality of recording tracks read by the step
Is set by the second setting means.
Output means for outputting to each output terminal.
And features. [0007] According to the present invention, at the time of recording, a plurality of input terminals
A plurality of performance information input from the
Recording is performed for multiple recording tracks, and during playback,
Plays recorded performance information corresponding to the number of recording tracks
Read each recording track in parallel as
At the same time, the read performance information is output to a predetermined output.
Output according to the input terminal. Thus, the first setting means and the second setting means
By changing the setting contents of the setting means, the performance of the present invention is achieved.
Set and connect each device connected to the recording / reproducing device.
Even if you do not change it, you can enter
Output relation can be changed. [0009] Embodiments of the present invention will be described below with reference to the drawings.
I do. FIG. 1 shows a multi-piece for an electronic musical instrument according to an embodiment of the present invention.
2 shows a hardware configuration of the heavy recording device. [Overview of Recording Apparatus in FIG. 1]
The device is a so-called event type
Key event data indicating keyboard key presses and key releases
The key event occurrence timing (time interval) data
And record the recorded key event data.
Playback and output at time intervals based on
You. Recorded performance information generated by keyboard, computer, etc.
Based on key event data input from
Played key event data is stored on a computer or sound source.
And so on. Also, combining input data and playback data
Also recorded on the original track from which the playback data was read
Overdubbing is also possible. Input and output terminals for key event data
Are provided, and each terminal has a MIDI
(Musical Instrument Digital Interface) Standard
(Hereinafter referred to as MIDI channel)
16) are set for each. In other words, this
Recording device has 8 × 16 = 128 input and output
With input channels and 128 input devices (e.g.
For example, a keyboard of an electronic musical instrument) and 128 output devices (for example,
(For example, an electronic musical instrument). [0012] 64 recording tracks are set.
Each track has one desired input channel.
And output channels can be assigned. Also,
Each track records data for 32 keys being pressed simultaneously
can do. Therefore, this recording device is equivalent to 1
28 instruments are connected at all times, and 6
You can select four instruments and record and play the performance
it can. Also, as long as the sound source connected to the output terminal allows.
As a result, 32 sounds are reproduced for each track,
Up to 32 × 64 = 2048 sounds can be generated simultaneously. [Description of Configuration of Recording Apparatus in FIG. 1] FIG.
The central processing unit (CPU) 10 controls the entire recording device.
This is for controlling the operation.
Program memory 14 and register via line 12
Group 16, sequencer memory 18, input device 20, output device
Device 22, switch group 24, and tempo generator 26
Has been continued. The program memory 14 has a read-only
A control for the CPU 10 constituted by a memory (ROM) or the like
The program is stored. The register group 16 includes the CP
Each of the items generated when U10 executes the control program
For temporarily storing various types of data.
For example, in a predetermined area in random access memory (RAM)
Provided. A register group prepared for this recording device
The registers that make up the 16 are shown in alphabetical order
It is as follows. In the following, each register is special
Unless otherwise noted, the contents (data, etc.) are shown. CSX: Registry that makes up the input / output information table (FIG. 6)
Cursor to specify the data TBL (0-63, 1-5)
X coordinate (corresponding to recording track No.) CSY: Cursor for specifying TBL (0-63, 1-5)
y coordinate (corresponding to input / output information) FLG: Sequence data processing distinction flag IN1 to IN3: Input data from the input device (key code
Buffer) IKCBUF (0 to 63, 0 to 31): Input terminal
Key press information buffer for each key (input side key code buffer) INCH: MIDI channel of input data (0 to 1)
5) INTRM: Input terminal information of input data (0 to 7) i: Control variable j: Control variable JOB: Performance mode (O: STOP, 1: PLAY,
2: RECRD) KC: Key code (7 bits) LEN: Event time interval LNEST: LEN remaining time to write LNSAM: Elapsed time since the previous key event occurred OKCBUF (0 to 63, 0 to 31): Output terminal
Key press information buffer for each key (output side key code buffer) OLDCNT: RECCNT (write time register)
Old data OUT1 to OUT3: output data buffer to output device OUTCH: MIDI channel of output data (0 to 1)
5) OUTTRM: output data transmission terminal information (0 to 7) PIRQMSK: Masking of playback interrupt signal PLAYIRQ
(1: Mask, 0: Interrupt enabled) RD1 to RD3: events read from internal memory
Data buffer RECCNT: counter timer for writing when performance information is input
The value of RECTIMER (Fig. 5) RPT: Sequence data read pointer (hereinafter referred to as read port)
Inter) SONGEND: Last address of sequence performance data SONGTOP: Start address of sequence performance data TBL (0-63, 0-31): Input / output status of each track
State setting register TCH: Touch information of input key data TRKIN: Track No. as input data TRKRD: Track No. as internal memory data TRKWT: Latest writing track No. WPT: Sequence data write pointer (hereinafter write port)
Inter) The sequencer memory 18 has, for example, a random
Access memory (RAM)
This is for recording performance information. This sequencer
The data recorded in the memory 18 is as shown in FIG.
"Key on", "key off" and "hour" of 3 bytes each
"Interval interval" data, 2-byte "track change" data
Data and an end mark of 1 byte length.
The first byte of each data indicates the type of the data.
This is an identification mark. The "key on" and "key off" data
X in the identification marks 9X and 8X is the MID of the data.
Shows the I channel. "Key on" and "Key off"
The second byte of the data is the "key code" and the third byte
Represents "touch" information. "End mark" is a parameter
Identification mark F2 without data term_H (Hexadecimal table
The following, ``_H "To indicate that it is a hexadecimal number
1) is only 1-byte data. "Time interval" data
The identification mark is F4_H And the second byte is time
Upper 7 bits of interval, 3rd byte is lower 7 of time interval
Represents a bit. "Track change" data is identified
Mark is FF_H In the second byte, the track data
Is two-byte data having FIG. 2 is an overview of an operation panel of the recording apparatus.
Is shown. The operation panel shown in FIG.
Specify force information setting register TBL (0-63, 1-5)
Cursor movement switches 30, 32, 34, 3
6. Register specified by cursor CSX and CSY
Ink for changing data in TBL (csx, csy)
Increment (INC) switch 38 and decrement
(DEC) switch 40, to set the performance mode of this recording device
Playback (PLAY) and recording (RECORD) to specify
D) and stop (STOP) switches 42, 44, 4
6, and other controls 48 such as a tempo setting switch
Is arranged. These switches 30 to 48 are shown in FIG.
Of the switch group 24 of FIG. The input device 20 shown in FIG. 1 is as shown in FIG.
And eight input terminals Ti1 to Ti8 and input terminals Ti1 to Ti8.
Temporarily stores performance information input via the CPU 10
FIFO type register that outputs in the order of input by these commands
Input buffers INBUF0 to INBUF7,
When performance information is input to any of the input terminals Ti1 to Ti8
To detect this and generate an input interrupt signal INPUTUTRQ.
OR gate 62 to be generated, input performance information is stored
Detect the number of input buffers INBUF0 to INBUF7
The input performance information is input by the encoder 64 and the number.
Input interrupt number register IN that is stored until read
Equipped with IRQNO. The output device 22 outputs data as shown in FIG.
Connected between the bus 12 and the eight output terminals To1 to To8.
Output buffers OUTBUF0 to OUTBUF7
ing. The tempo generator 26, as shown in FIG.
A clock that generates a clock φ with a frequency corresponding to the set tempo value
Lock setting device 70, 8 bits for counting clock φ
Increment counter 72, the counter 72 is 0 (0
0_H ) Is output every time the recording interrupt signal RECIRQ is output.
The NOR gate 74 and the counter 72 output the count output.
Write counter timer (hereinafter referred to as write timer).
U) RECTIMER, time from sequencer memory 18
When the interval data is read, the time interval value is set to the top 7
Bit and lower 7 bits
Registers PLYTMH and PLYTML, register PL
Preset the above time interval value by YTMH and PLYTML
Decimation to downcount clock φ after being set
Count counter 76, the count value output of the counter 76 becomes zero.
Output a playback interrupt signal PLAYIRQ when
Playback interrupt signal PLAYIR at stop 78, stop mode, etc.
Register 8 for setting "1" when masking Q
0, playback interrupt when register 1 is set to "1"
Inverter for inhibiting output of signal PLAYIRQ
82 and an AND gate 84. FIG. 6A shows the input / output state of the register group 16.
State setting register TBL (x, y) as a table
FIG. In the figure, track No. is a sequence
Recording track number set in the memory 18;
In processing, it is represented by the value of the cursor CSX. INPUT
Is the input channel of the data to be recorded on that track.
Input terminal number (CSY = 1 column) and its
MIDI channel (CSY = 2 column)
You. OUTPUT is the data read from that track
Of the output terminal number (CSY = 3)
Column) and its MIDI channel (CSY = 4 column)
Is specified by Track mode (CSY = 5 column)
Specify the processing content for the track. Each track mode
6 (b) and (c) show the processing contents in the mode.
You. In FIGS. 6B and 6C, the track model
Mode O (stop) reads and writes to the track
And does not output the input data to the track
Indicates that 1 (play) is the input for the track.
No performance data is written or output, but the performance mode is
If it is raw or recorded (JOB = 1 or 2),
The internal data (sequence performance data) for the
Indicates that the output is to be sent to the output terminal. 2 (rec) is a performance
Regardless of the playing mode
Output to the output terminal and record the performance mode (JOB
= 2), the input data is written and the
Performance mode plays the internal data for the rack
Or if recording (JOB = 1 or 2)
It indicates that it is sent. [Description of Operation of Recording Apparatus in FIG. 1] Next, FIG.
Recording device of FIG. 1 with reference to flowcharts of FIGS.
Will be described. [0026]1. Main processing Referring to FIG. 8, when power is supplied to this apparatus, CP
U10 is a control program stored in the program memory 12.
The operation is started according to the ram (step 100). Ma
First, in steps 101 and 102,
16 is initialized. That is, in step 101, the output side
Key code buffer OKCBUF (0 to 63, 0 to 3
1), input side key code buffer IKCBBUF (0 to 6)
3, 0-31) and the performance mode register JOB.
And the input / output state setting register TBL (0-63, 0-
31), playback interrupt masking registers PIRQMSK and
And the performance mode register JOB are set. In addition, this
These registers are read from ROM or external memory.
May be set to a predetermined preset value.
No. In step 102, the first number of the sequence performance data
External location SONGTOP and last address SONGEND
Set from memory etc. After the initialization, the INC / DEC switch
Processing (step 110), UP / DOWN switch processing
(Step 130) LEFT / RIGHT switch processing
(Step 140), the PLAY switch on process (step 140)
Step 150), REC switch on processing (step 1)
60) and STOP switch-on processing (step 17)
0) each subroutine is called and executed, and then
Other processing (step 190) is performed,
A series of processing consisting of steps 110 to 190 is repeatedly executed.
Run. [0028]2. INC / DEC switch processing The INC switch 38 and the DEC switch 40 in FIG.
For changing the input / output state TBL (csx, csy)
is there. Referring to FIG. 9, in step 111, IN
Whether the C switch 38 and the DEC switch 40 are turned on
Check for no. Either of these switches 38 and 40
If it is not turned on, the process returns to the main processing (FIG. 8). one
On the other hand, if one of the switches 38 and 40 is on,
Next, at step 112, the performance mode JOB and the cursor y
Inspect the target CSY. Performance mode other than stop (JOB ≠
0) and the cursor specification is not in track mode
If (CSY # 5), the process returns to the main process (FIG. 8). This
This allows input / output channels during playback or recording
Changes are prohibited. If the performance mode is stopped (JOB = 0),
Either the cursor is in track mode (CSY
= 5), the process proceeds to step 113. Step 113
Now, the cursor y coordinate CSY and the input / output information register TBL
Check the contents of (csx, csy). If the cursor is
Mode (CSY = 5) and the cursor x coordinate C
The mode of the track specified by SX is the recording mode (TB
If L (csx, 5) = 2), go to step 115
Otherwise, the process proceeds to step 114. Step 11
In 4, whether the switch turned on is 38 or 40
Therefore, the contents of the input / output information register TBL (csx, csy) are
Main processing after incrementing or decrementing
Return to FIG. In step 114, TBL (csx, c
sy) 0-7 when CSY = 1 or 3 0-15 when CSY = 2 or 4 0-2 when CSY = 5 Increase or decrease in the range. For example, insert TBL (csx, 5) = 2
Set to 0 when incremented. As a result of the inspection in step 113, CS
When Y = 5 and TBL (csx, 5) = 2,
When switch 38 or 40 is on, track number CSX
Change the track mode for the track from the record mode.
If you want to change to another mode,
Switch 38 or 40 is turned on at 115 to 126
If there is a key that is being depressed, perform key-off processing for that key.
Do. That is, in step 115, the control variable i is
Set to 0, input track CSX in step 116
Key in the side key code buffer IKCBBUF (csx, i)
Check if the code is stored. Not stored
Without executing the processing of steps 117 to 124
Proceed directly to step 125. On the other hand, if the key code is stored,
Inputs key code key-off data to input data buffer IN
1 to IN3 (step 117).
Clear KCBUF (csx, i) (step 11)
8). In step 117, the key-off touch is performed.
40 customary as information_H To the input data buffer IN3
Is set to Subsequently, the input / output information register TBL
To CSX track output terminal and MIDI
Read channel and output terminal register OUTTRM
And to the output channel register OUTCH (switch
Step 119), the input data buffers IN1 to IN1
Key-off data stored in MIDI channel 3
Data only to the data OUTCH and output data
Buffer OUT1 to OUT3 (step 12).
0), the output data OUT1 to
After outputting OUT3 (step 121), step 1 is executed.
At 22, the performance mode is confirmed. Here, the performance mode is recorded.
If it is a record (JOB = 2), follow the instruction of the write pointer.
Keys set in the input data buffers IN1 to IN3
-Off data is written to the sequencer memory 18 (S
(Step 123) The write pointer is advanced by 3 counts (step
After step 124), the process proceeds to step 125. On the other hand,
The performance mode of the loop 122 must be record (JOB = 2)
In this case, the processing of steps 123 and 124 is skipped and the
Proceeding directly from step 122 to step 125. In step 125, the control variable i is set
And in the next step 126, the value of the control variable i becomes 3
It is determined whether or not 1 has been exceeded. If it is 31 or less,
Returning to step 116, the next key code buffer IKCBU
A key-off process is performed for F (csx, i). on the other hand,
If it exceeds 31, the input side of the corresponding track
Inspection of all key code buffers and key-off processing are completed.
Has passed, the process proceeds to step 114, and
The contents of the I / O information register TBL (csx, csy)
Depending on whether the switch that was turned on is 38 or 40.
Main processing after incrementing or decrementing
Return to FIG. [0036]3. UP / DOWN switch processing The UP switch 34 and the DOWN switch 36 in FIG.
Cursor x-axis CS on the input / output state table of FIG.
This is for moving X up and down. See FIG.
Then, in step 131, the UP switch 34 and the DO
Inspect the WN switch 36. And these switches
Switch is on if either switch 34 or 36 is on.
Cursor x-axis C according to whether h is 34 or 36
SX is incremented or decremented in the range of 0 to 63.
(Step 132), the switch 34,
If none of the 36 is turned on, from step 131
It returns directly to the main processing (FIG. 8). [0037]4. LEFT / RIGHT switch processing LEFT switch 30 and RIGHT switch of FIG.
Reference numeral 32 denotes a cursor y on the input / output state table of FIG.
This is for moving the axis CSY left and right. FIG.
In step 141, the LEFT switch 30
And the RIGHT switch 32 is checked. And this
If any of these switches 30, 32 are on
According to whether the switch turned on is 30 or 32
Increase the cursor y-axis CSY in the range of 1 to 5.
After decrementing or decrementing (step 142),
If neither switch 30 nor switch 32 is on,
The processing directly returns to the main processing (FIG. 8) from the server 141. [0038]5. PLAY switch on processing Referring to FIG. 12, in step 151, the reproduction mode switch is set.
It is determined whether the switch 42 is turned on. If it is on
If not, the process returns to the main process (FIG. 8). On the other hand,
If so, at step 152 the performance mode register JO
B is set to 1 and the song start
After executing the process (FIG. 14), the process returns to the main process (FIG. 8).
You. [0039]6. REC switch on processing Referring to FIG. 13, in step 161 the recording mode switch is set.
It is determined whether the switch 44 is turned on. If you turn on
If not, the process returns to the main process (FIG. 8). on the other hand,
If it is on, at step 162 the performance mode register J
Set OB to 2 and start the song at step 200
After executing the processing (FIG. 14), the processing returns to the main processing (FIG. 8).
You. [0040]7. Song start processing The reproduction switch 42 or the recording switch 44 in FIG. 2 is turned on.
Then, the performance mode register JOB is set to 1 or
Is set to 2 and the song start
Execute the process. In this song start process,
Preset registers used for raw and recording
Then, the sequence performance data is read from the sequencer memory 18.
Read the identification mark which is the first byte, and
Key on, key off, track change,
Reading of each data such as time interval and end mark and
Processing according to these data is performed. This day
Data reading time interval data or end mark
Repeated until Referring to FIG. 14, first, at step 201
To set the read pointer RPT to the start number of the sequence performance data.
Sequence the write pointer WPT to the ground SONGTOP
Prefix to the address next to the last address SONGEND of the performance data
And sets the value of the write pointer WPT at this time to a new value.
As the beginning address SONGTOP of the sequence performance data
Remember. Furthermore, click the playback interrupt mask PIRQMSK.
To enable playback interrupt PLAYIRQ (step
202), output of write timer RECTIMER (FIG. 5)
Store the value in the write time register RECCNT (step
203), clear the elapsed time register LNSAM
(Step 204). Next, the reading point from the sequencer memory 18 is read.
1-byte data addressed by the
Then, it is stored in the flag FLG (step 205).
Sequence performance stored in the sequencer memory 18
The first byte of data is an identification mark indicating the data type
(See FIG. 7). In step 206, the flag FLG
Discriminate the contents of the track, and change the track according to the discrimination result
(Step 210), key-on event (Step 22)
0), key-off event (step 240), time interval
(Step 260) and end mark (Step 2)
The process branches to each data reading process of 70). The track
Change (step 210), key-on event (step
220), key-off event (step 240)
And after executing the other processes (step 280)
Returning to step 205, the next data reading process is performed.
The time interval processing (step 260) or
After executing the demark process (step 270), the original
It returns to the main processing (FIG. 8). [0043]8. Track change processing Normally, the first data of the sequence performance data
Change data (FF_H ). FIG. 14 or 23
Stored in the flag FLG in step 206
Identification mark is FF_H If the
A change process (FIG. 15) is executed. Referring to FIG.
First, based on the address designation of the read pointer RPT,
2-byte track change data from the PLC memory 18
Read data and read 1 byte at a time
D1 and RD2 and store the read pointer RPT in the next read.
Advance 2 counts to address (steps 211 and 21)
2). Next, the track number in buffer RD2 is
After storing it in the rack number register TRKRD, the current
Read track TRKRD and write track TRKWT
Comparison is made (steps 213 and 214). If they are the same
The process returns to the original process (FIG. 14 or 23). Different
The write pointer WPT
Track change of 2 bytes to sequencer memory 18
RD1 and RD2 are written and the write pointer WP
Advances T by 2 counts to the next write address, and
Number TRKWT was changed to number TRKRD (Step
After steps 215 to 217), the original processing (FIG.
Return to 3). [0044]9. Key-on event processing In step 206 of FIG. 14 or 23, the flag FL
Identification mark 9X on G_HIs stored, step 2
20 key-on event processing (FIG. 16) is executed. Figure
Referring to FIG. 16, first, based on the read pointer RPT,
Reads 3-byte key-on data from PLC memory 18.
Each byte is read and read data buffers RD1 to R
D3 and the pointer RPT to the next read address.
The count is advanced by three (steps 221 and 222). Next
To read the key-on data RD1 to RD3
Write to sequencer memory 18 based on inter WPT
Pointer WPT advances to the next write address by 3 counts
After that, the track mode TBL (
_TRKRD, It is determined whether or not 5) is the stop mode (step 22)
3-225). In stop mode, no further processing is required
Because there is, return to the original processing (FIG. 14 or 23)
You. In the case of reproduction or recording, the input / output
Read data RD1 to RD3 should be sent from the status register
Output terminal TBL (_TRKRD, 3) and output MIDI channel
Flannel TBL (_TRKRD, 4) Read each register
OUTTRM and OUTCH are stored in step 22
Of key-on data RD1 to RD3 read in
Power MIDI Channel X_H Only output MIDI channel
Create and output key-on data replaced with OUTCH
The data is stored in the data buffers OUT1 to OUT3, and this output
Send data OUT1 to OUT3 to output terminal OUTTRM
(Steps 226 to 228). Further, the output side key code buffer OKCB
UF (_TRKRD, Any of the free ones from 0 to 31)
Key code RD2 (= OUT2) is written to
229), and then return to the original processing (FIG. 14 or 23).
You. [0047]10. Key-off event processing In step 206 of FIG. 14 or 23, the flag FL
Identification mark 8X on G_HIs stored, step 2
Forty key-off event processing (FIG. 17) is executed. Figure
17, in steps 241-248,
Except that the data being processed is a key-off event
The same procedure as steps 221 to 228 in FIG.
Is performed. In step 249, the output side key
Code buffer OKCBUF (_TRKRD, 0 to 31)
-Code RD2 (= OUT2) is written
And return to the original process (FIG. 14 or 23).
You. [0048]11. Time interval data processing In step 206 of FIG. 14 or 23, the flag FL
The identification mark stored in G is F4_H Then
The time interval data processing of FIG.
Referring to FIG. 18, three bytes are read based on read pointer RPT.
Read the time interval data of each byte and read each byte
Stored in the data buffers RD1 to RD3, the pointer RP
T is advanced by 3 counts to the next reading address and read
The time intervals RD2 and RD3 are set in the reproduction timer register PLYT.
MH, PLYTML (Fig. 5)
Time intervals RD2 and RD3, which are 2-byte data of
Convert to 4-bit data and save remaining time register LNRE
After storing in ST (steps 261 to 264), the original
Return to the processing (FIG. 14 or 23). [0049]12. End mark processing Read in step 205 of FIG.
Identification mark is F2_H, The process proceeds to step 20.
6, the end mark processing of step 270 (FIG. 18)
Move to This end mark is one byte of data.
You. Referring to FIG. 18, in step 271, the reading point
The counter RPT is sent one count to the next read address, and the
Whether the performance mode is playback (JOB = 1) in step 272
Is determined. If it is playback, stop the performance mode (JOB =
0) and set the end marker based on the write pointer WPT.
F2_H And the pointer WPT to the next write address.
After one count advance (steps 273 to 275),
Return to the original processing (FIG. 14 or 23). At step 272, the performance mode is reproduced.
If not, it is a record. In this case, step 276 is repeated.
Set 1 to the raw interrupt mask register PIRQMSK
Prohibit playback interrupt, that is, reading of sequence performance data
After that, the processing returns to the original processing (FIG. 14 or 23). Performance
When the mode is recording, only playback is prohibited and recording is stopped.
Switch 46 (FIG. 2) until the switch 46 is turned on.
You. [0051]13. STOP switch on processing Referring to FIG. 20, in step 171, stop switch 4
6 (FIG. 2) is turned on. If you turn on
If not, the process returns to the main processing (FIG. 8). one
On the other hand, if it is on, the all key off process of step 300
(FIG. 21). [0052]14. All key-off processing This all-key-off processing is performed in playback or recording mode.
Playback sound is being generated when the stop switch is turned on.
Key off processing is performed for the key code. Specifically
Are provided on each of the 64 tracks.
A total of 64 x 32 = 2048 output side key code
Scan the file and search for the key code
Then, key-off processing is performed on the key code. Ma
Also, the input sound for the track whose track mode is 0
Because the playback sound is not pronounced, there may be key codes that are sounding.
Absent. Therefore, in step 302, the track mode
0 track is detected, and scanning for that track is performed.
Processing time is shortened by skipping. Referring to FIG. 21, in step 301, the traffic
Step 0 is set to the control variable i for
2. Track mode TBL (i, 5) of track No. i
To inspect. If it is other than stop, that is, playback or recording
In step 303, 0 is set to the control variable j for specifying the buffer.
Output key code buffer O in step 304.
Whether a key code is stored in KCBUF (i, j)
Is determined. If the key code is stored,
The output terminal TBL (i, 3) of the track i is
Read the output MIDI channel TBL (i, 4)
Stored in registers OUTTRM and OUTCH, respectively
Then, at step 306, the output NIDI channel is set to OUT
The key code whose key code is OKCBUF (i, j) in CH
Output data buffers OUT1 to OU
Store in T3. Further, in step 307, the buffer O
KCBUF (i, j) is cleared, and the
Outputs key-off data OUT1 to OUT3 to output terminal OUTT
After transmitting to the RM, the control variable j is input at step 309.
Increments the output of the track at step 310.
Whether inspection has been completed for all key code buffers
Is determined. If not, return to step 304
Check the next key code buffer of the track.
Now. On the other hand, if it has been completed, the control variable
i is incremented, and 64
It is determined whether or not the search for all the checks has been completed. Finished
If not, go back to step 302 and select the key for the next track.
Repeat the code search. Step 3 if finished
20. The key-off writing process of FIG.
The process returns to the TOP switch-on process (FIG. 20). [0054]15. Key-off writing process This key-off writing process is stopped in the recording mode.
Switch 46 (FIG. 2) is turned on, the sequencer memory
18 only the key-on data is written and the key-off data
Data is not written, that is, key pressed on the input side
If there is a key in the middle, the key-off data of the key being pressed is
It is created and written into the memory 18. In particular
A total of 2048 input-side keys, each with 32 tracks of 64 tracks
Scans the code buffer and keeps the key code stored.
Search for the key code and key-off
Data is created and written to the memory 18. Referring to FIG. 22, at step 321 the performance is
Check the performance mode JOB. This key-off writing process is
This is necessary only in the recording mode (JOB = 2).
If not in recording mode,
The process returns to the all key-off process (FIG. 21). Recording mode
In step 322, the control variable i is set to 0, and
In the step 323, the track mode TBL (i,
It is determined whether or not 5) is the recording mode. Truck model
If the key is not in record mode, there is no key
Therefore, skip steps 324 to 331 and skip
Proceed to step 332. Track mode is set to recording mode
In step 324, the control variable j is set to 0,
Input key code buffer IKCBBUF at step 325
Determines whether a key code is stored in (i, j)
You. If the key code is not stored, step 326 is executed.
The process skips steps 329 to 329 and proceeds to step 330.
If the key code is stored, the key is stored in step 326.
Create key-off data for keycode and read data buffer
Are stored in RD1 to RD3, and buffered in step 327.
Clear IKCBUF (i, j) and write in step 328
Key to the sequencer memory 18 based on the
-Off data RD1 to RD3 are written, and
9 moves the write pointer WPT to the next write address by 3
After proceeding, the control variable j is incremented in step 330.
And at step 331 all buffers of track i
It is determined whether the inspection of the key has been completed. Unprocessed buff
If there are any remaining buffers, the flow returns to step 325 to return to the next buffer.
Check IKCBUF (i, j) for key code
I do. On the other hand, all 32
If the inspection has been completed for the
The control variable i is incremented.
Search for key codes during key press and key
It is determined whether or not the writing of the off data has been completed. End
If not, the flow returns to step 323 to repeat the above processing.
If the processing is completed, the original all-key-off processing (FIG. 2)
Return to 1), and return to STOP on processing (FIG. 20)
You. [0056]16. STOP ON processing (continued) Referring to FIG. 20, in step 173, the performance mode register
Set the star job to 0, and in step 174, play interruption
Checks whether the mask register PIRQMSK is 1
I do. If 1, set the sequence before turning on the stop switch.
Playback of performance data and transcription to the new performance data area
The process has been completed (see step 276 in FIG. 19). Be 0
If there is any unposted data, steps 175 to 1
At 81, add the remaining data to the end of the new performance data.
Add. That is, in step 175, the write track
Compare TRKWT and read track TRKRD,
Sequence shark based on the write pointer WPT
Track change data to read track in memory 18
(2 bytes) is written (steps 176 to 177),
Pointer WPT is advanced by 2 counts to the next write address
After (step 178), the process proceeds to step 179. on the other hand,
The write track TRKWT and the read track TRKRD
If they match, step 175 directly proceeds to step 179
Proceed to. Thereafter, in step 179, the sequencer
Address specified by the read pointer RPT in the memory 18
From F2_H (End mark) Read until read
The data of the old performance data area addressed by the pointer RPT
New performance data addressed by the write pointer WPT
(Steps 180 to 181). End
When a mark is detected, the process proceeds to step 182, where
End memory in the sequencer memory 18 based on the
Talk F2_H Is written, and the sequence
Final address WPT of performance data in register SONGEND
After writing, the process returns to the main process (FIG. 8). [0059]17. Play timer interrupt processing In the recording device of FIG. 1, in the playback or recording mode,
The time interval data read from the sequencer memory 18 is
Decrement counter 76 of tempo generator 26 (see FIG.
5) is preset (step 263). Tempo generation
The counter 26 counts down the clock φ by the counter 76.
The count value output is O_H , The playback interrupt signal PLAY
Generate an IRQ. The CPU 10 outputs the reproduction interrupt signal PL
Playback interrupt processing of step 400 based on AYIRQ (FIG.
23) is executed. As a result, in this recording device
Is the time interval recorded in the sequencer memory 18
Event data is read for each (event timing)
Can be That is, referring to FIG.
In 01, the performance mode JOB is determined. Reading performance data
The performance mode is stopped (JO
If B = 0), the interrupt is released and the original processing
Return. On the other hand, the performance mode is other than stop (JOB $ 0)
If so, in step 402, write time register RECCNT
Is added to (LNEST-LNSAM). here,
LNEST is the last playback interrupt when recording (JOB = 2)
Key event data is input between
The time interval read by the previous playback interrupt, if any
This is the remaining time after LEN key event data input.
LNSAM is the elapsed time after this key event data input
It is. Subsequently, the register LNSAM is cleared.
(Step 403), the remaining time LNRES is set to the time interval
After setting to the register LEN (step 404),
To the sequencer memory 18 based on the write pointer WPT
Mark F4_H , The upper 7 bits of register LEN and
3 bytes consisting of the lower 7 bits of the register LEN
The remote data is written (step 405).
Advance the counter WPT by 3 counts to the next write address.
Step 406). At step 407, the write track number T
RKWT is compared with the read track number TRKRD,
If it is, cut the writing track in the same way as the reading track.
To change, the track number TR is stored in the register TRKWT.
KRD is stored and the identification mark FF_H And new truck number
2-byte track change data consisting of TRKWT
And write the pointer WPT to the next write address 2
The operation proceeds (steps 408 to 410). Step 4
07, the write track and the read track are the same.
If so, the processing of steps 408 to 410 is skipped. Subsequently, the event data at the current timing
Data and time interval data or data until the next event.
This mark is read by the song
It is exactly the same as in the start process (FIG. 14)
Here, the same step numbers are assigned and the description is omitted. [0064]18. Recording timer interrupt processing In the recording device of FIG.
The increment counter 72 (FIG. 5) generates 256 clocks φ.
The recording interrupt signal RECIRQ generated each time counting is performed
The following interrupt processing (step 500) is executed based on the
You. Referring to FIG. 24, in step 501, the performance
Check the performance mode JOB. Recording timer interrupt is recorded
Since it is necessary only in the mode, the performance mode
If is not recorded (JOB = 2), interrupt is canceled immediately
You. On the other hand, if it is a record, the register L
Elapsed time since the last key event data input to NSAM
Is stored. That is, the register LNSAM contains
Each time the counter 72 (FIG. 5) overflows,
-Stores the elapsed time after event data input. Stay
(100 in_H -RECCNT) RE
After the key event data is input, the counter 72
Term for calculating the time until the first overflow
Is cleared after the calculation (step 503). In step 504, the elapsed time LNSAM is calculated
3FFF_H Is determined. This recording device
14-bit counter for time interval measurement (76 in FIG. 5)
, The time interval is 3F, which is the maximum value of 14 bits.
FF_H If it exceeds 3FFF_H More than one of the following
This is because the data is recorded separately in the interval data. Accordingly
And the elapsed time LNSAM is 3FFF_H Below
Release the interrupt. On the other hand, 3FFF_H Crosses the register
3FFF each from LNSAM and LNEST_H
Is subtracted (steps 505 and 506), and the pointer WPT
Time interval 3FFF based on_H 3-byte data F indicating
4_H , 7F_H , 7F_H Is written (step 507),
Pointer WPT is advanced by 3 counts to the next write address
Thereafter, the process returns to the original process. [0067]19. Input interrupt processing One of the input devices 20 (FIG. 3) of the recording device of FIG.
Key event data is input to the input terminals Ti1 to Ti8
And this data is stored in the input data registers INBUF0-INBUF0
Stored in NBUF7 and split from OR gate 62
An input signal INPUT IRQ is generated. CPU 10
Step 600 is entered based on the interrupt signal INPUT IRQ.
Execute force interrupt processing. Referring to FIG. 25, first, the input interrupt number
The terminal number n input from the register INIRQNO is
Read it and store it in the input terminal register INTRM (step
601), a 3-byte key from the register INBUFn.
-Event data is read and input buffers IN1 to I
One byte is stored in N3 (step 602). Further
To the MIDI channel included in the identification mark IN1.
The key code IN2 and the touch information are stored in the register INCH.
The information IN3 is stored in the registers KC and TCH, respectively.
(Steps 603 and 604), the input / output status table
By scanning (FIG. 6), the recording tracks No. 0 to 63 are recorded.
Input terminal TBL (i, 1) and MIDI channel TB
L (i, 2) matches INTRM and INCH, respectively
And the track mode TBL (i, 5) is the recording mode
(= 2) (steps 605 to 60)
8). Here, the tracks are searched in order from the track No.
If a track that meets the above conditions is found, processing will stop.
The process moves from step 606 to step 611. In step 611, the detected track number
The number i is stored in the register TRKIN. Then,
Rack output terminal TBL (_TRKRD, 3) and output MID
I channel TBL (_TRKRD, 4) read each
OUTTRM and OUTCH (step 61)
2), MIDI channels of input data IN1 to IN3
The output data OUT1 to OUTCH obtained by replacing data with OUTCH
OUT3 is created (step 613), and the output data
Is sent to the output terminal OUTRM, and then the step 620 is executed.
Of the input side key code buffer process (FIG. 26)
You. [0070]20. Input side key code buffer processing Referring to FIG. 26, in step 621, the input data is
-Whether the event data is on or key off
Is determined. If it is a key-on event, step 622
Empty of the 32 buffers of track TRKIN
Key code KC (= IN2) is written
Thereafter, the process returns to the original processing (step 625 in FIG. 25). Key
If it is an off event, the track TRK is executed in step 623.
The same data as the key code KC among the 32 buffers of IN
After clearing the stored data,
It returns to (FIG. 25 step 625). [0071]21. Input interrupt processing (continued) Referring to FIG. 25, in step 625, performance mode JO
Check B. Recording of input data is recorded (JOB = 2)
Only when the recording mode is set.
The interrupt is canceled and the process returns to the original processing. On the other hand, the recording mode
If the key event data is
Data write time RECCNT to register OLDCNT
After writing, in step 632, the writing counter timer
The current time indicated by RECTIMER (FIG. 5) is stored in register R
Write to ECCNT. Next, LNSAM + (RECC
NT-OLDRCNT) to calculate the time interval register L
EN (step 633), and LNEST-LE
N is calculated and stored in the remaining time register LNEST.
(Step 634), clear the register LNSAM
(Step 635). Further, based on the write pointer WPT,
3 byte time interval data in the sequencer memory 18.
(Step 636), and pointer WPT is
3 counts forward to the data write address (step 6)
37) Later, the input data write track number TRKIN
And the current write track number TRKWT. The write track TRKIN of the input data is
If it is different from the current write track TRKWT, the write track
Change TRKWT to TRKIN, and write pointer W
2-byte track chain in memory 18 based on PT
Geodata (FF_H And TRKWT) and write
Advances the counter WPT by 2 counts to the next write address
(Steps 639 to 641). On the other hand, writing input data
The track TRKIN and the current writing track TRKWT
Are the same, the processing of steps 639 to 641 is skipped.
Step. Subsequently, based on the write pointer WPT, the memory 1
8 is written with 3-byte input data IN1 to IN3,
Write pointer WPT to next write address for 3 counts
After proceeding (steps 642 and 643), the interrupt is released.
It returns to the original processing. [0073]22. Explanation of one operation example FIG. 27 shows an operation example of the recording device of FIG. here
Key event data K₁ , K_Two , K_Three And K_Four From
Key to the playback data (old sequence data)
-Event data K_A And K_B Input data consisting of
Record the new sequence data shown in FIG.
The operation when recording is explained by the change in the data of each register.
I will tell. * Recording start and key event data K₁
Processing When the recording switch 44 is turned on, the processing is turned on.
Song processing (FIG. 14) after the song processing (FIG. 13).
And in step 203, the write time register RECCN
Store the value 0 of the write timer RECTIMER in T,
Clear elapsed time register LNSAM in step 204
You. Next, key-on or key-off event processing (Fig.
16) or 17), and the key event data K₁ Old
Reading from sequence data area (step 221)
And writing to the new sequence data area (step 22
Execute 3). Then go back to the song start process
This time, proceed to the time interval data processing (FIG. 18),
PLAYTIMER and remaining time register LNRE
Set the time interval data 8 to ST
(Steps 263, 264). Dozens of steps above
The reason is that from the macro standpoint as a performance sound,
It is executed in such a short time as to be considered. The following key events
Processing of event data is executed instantaneously from a macro perspective.
You. * Key event data K_A Processing Key event data K_A Is entered, input interrupt processing
(FIG. 25), and the data K_A Load (step
602), and then the write time register RECCNT stores the old data.
Data 0 to the old write time register OLDRCNT
To a new RECTIMER value (write time) 5
(Steps 631, 632). More key events
K₁ To K_A Time interval LEN = LNSAM + (R
ECCNT-OLDRCNT) = 0 + (5-0) = 5
And K_A To K_Two LN REST = old LN
REST-LEN = 8−5 = 3, and the elapsed time LN
After clearing the SAM (steps 633-635),
Interval data LEN and input key event data K_A
Is written to the new sequence data area (step 63).
6,642). * Key event data K_Two Processing Playback timer PLAYTIMER drops preset value 8
When the counted value reaches 0, the reproduction interruption processing (FIG. 2)
Execute 3). Then, the write time RECCNT is changed to the old R
ECCNT + (LNEST-LNSAM = 5 + (3-
0) = 8 update, clear LNSAM, and more time
K as interval LEN_A To K_Two Remaining time until LNRE
Set ST = 3 and set time interval LEN = 3 to new data
After writing in the rear (steps 402 to 405),
Proceed to vent processing (FIG. 16 or 17) and key event
Data K_Two (Step 221)
223). Further, returning to step 205 in FIG.
The time proceeds to the time interval data processing (FIG. 18), and the reproduction timer
PLAYTIMER and remaining time register LNRES
T is set to 5 which is time interval data for each T
Steps 263, 264). * Key event data K_Three Processing This data K_Three Is performed on the data K_Two Line in the same way as
Be done. That is, the write time RECCNT is changed to the old REC.
CNT + (LNEST-LNSAM = 8 + (5-0)
= 13, clear LNSAM, and more time
K as other LEN_Two To K_Three Remaining time LNRES until
Set T = 5 and set time interval LEN = 5 to the new data area.
(Steps 402 to 405)
Proceed to vent processing (FIG. 16 or 17) and key event
Data K_Three (Step 221)
223). Further, returning to step 205 in FIG.
The time proceeds to the time interval data processing (FIG. 18), and the reproduction timer
PLAYTIMER and remaining time register LNRES
Set 250 as time interval data to T respectively
(Steps 263, 264). * Record interruption processing The recording timer RECTIMER is a self-propelled 8-bit counter.
This counter counts up to 255 and
When the count value becomes 0, the recording timer interrupt (Fig. 24) is executed.
I do. Here, the elapsed time LNSAM is replaced by the old LNSAM +
(100_H −old RECCNT) = 0 + (256-13)
= 243 and RECCNT is cleared. * Key event data K_B Processing This data K_B Processing is K_A Is executed in the same way as sand
That is, data K_B Is read (step 602) and written
The old data 0 of the time register RECCNT is changed to the old write time
Save to register OLDRCCNT and register RECCN
Set a new RECTIMER value (write time) 1 to T
(Steps 631, 632), and event K_Three To K_B
Time interval LEN = LNSAM + (RECCNT−
(OLDRCNT) = 243 + (1-0) = 244 and
K_B To K_Three Remaining time until LNEST = old LNRE
ST-LEN = 250-244 = 6 is calculated and the elapsed time
LNSAM cleared (steps 633-635)
After that, the time interval data LEN = 244 and the input key event
Data K_B To the new sequence data area
(Steps 636, 642). * Key event data K_Four Processing This data K_Four Is performed on the data K_Three Line in the same way as
Be done. That is, the write time RECCNT is changed to the old REC.
CNT + (LNEST-LNSAM = 1 + (6-0)
Update to = 7, clear LNSAM, and time interval
K as LEN _Three To K_Four Remaining time up to LNEST
= 6 and set the time interval LEN = 6 to the new data area
(Steps 402 to 405)
To the key event data (FIG. 16 or 17).
Data K_Four (Steps 221 and 221)
23). Further, returning to step 205 of FIG.
Goes to the time interval data processing (FIG. 18), and the reproduction timer P
LAYTIMER and remaining time register LNEST
Is set to 10 which is the time interval data for
Steps 263, 264). As described above, in this embodiment, the reproduction
When recording performance sounds, the timing information
Because the calculation is based on data,
When using the recording timer value at the time of recording as the
Such multiplexing does not increase the playing time. [0082] The present invention is limited to the above embodiment.
It is not specified, and applied with various modifications as follows
can do. For example, 1. In the above, it is stored in the sequencer memory 18
Although the case where the sequence data is one song has been described,
It may be several songs. 2. I used keypress information as sequence data,
Other event information, such as a change, can also be used. 3. I / O key code buffers IKBUF, OKC
BUF is prepared for each track, but it is prepared for each terminal or channel.
You may prepare for every channel etc. 4. The clock may be supplied externally. 5. You can have any number of tracks. 6. In the above embodiment, the display is omitted for simplification.
However, if necessary, a means for displaying necessary information should be provided.
Is also good. 7. Edit, delete, copy, modify, etc.
It is easy to add a cut function.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a hardware configuration diagram of a multiplex recording apparatus according to an embodiment of the present invention. FIG. 2 is an external view of an operation panel of the apparatus shown in FIG. FIG. 3 is a circuit diagram showing more details of the input device in FIG. 1; FIG. 4 is a circuit diagram showing the output device in FIG. 1 in more detail. FIG. 5 is a circuit diagram showing more details of a tempo generator in FIG. 1; FIG. 6 is an explanatory diagram of input / output state setting in the apparatus of FIG. 1; FIG. 7 is a diagram showing a sequence data format in the apparatus shown in FIG. 1; FIG. 8 is a flowchart of a main process in the apparatus of FIG. 1; FIG. 9 is a flowchart of an INC / DEC switch process. FIG. 10 is a flowchart of an UP / DOWN switch process. FIG. 11 is a flowchart of a LEFT / RIGHT switch process. FIG. 12 is a flowchart of a PLAY switch on process. FIG. 13 is a flowchart of a REC switch on process. FIG. 14 is a flowchart of a song start process. FIG. 15 is a flowchart of a track change process. FIG. 16 is a flowchart of a key-on event process. FIG. 17 is a flowchart of a key-off event process. FIG. 18 is a flowchart of time interval data processing. FIG. 19 is a flowchart of an end mark process. FIG. 20 is a flowchart of a STOP switch on process. FIG. 21 is a flowchart of an all-key-off process. FIG. 22 is a flowchart of a key-off writing process. FIG. 23 is a flowchart of a reproduction timer interrupt process. FIG. 24 is a flowchart of a recording timer interrupt process. FIG. 25 is a flowchart of an input interruption process. FIG. 26 is a flowchart of input key code processing. FIG. 27 is an explanatory diagram showing an operation example of the device in FIG. 1; [Description of Signs] 10: CPU, 12: bus line, 14: program memory, 16: register group, 18: sequencer memory, 2
0: input device, 22: output device, 24: switch group, 2
6: tempo generator, 42: playback switch, 44: recording switch, 46: stop switch, IKBUF: input side key code buffer, OKCBUF: output side key code buffer, TBL (csx, csy): input / output state setting register.

Claims (1)

(57) [Claims] A plurality of input terminals for inputting performance information including at least timing information indicating performance timing; recording means having a plurality of recording tracks for recording performance information input from the input terminals; a plurality of output means each for outputting the performance information A performance recording / reproducing apparatus, wherein a plurality of performance information are recorded in the recording means as performance information of a plurality of recording tracks, and the recorded performance information is output from the output means. A first setting means for setting, from the plurality of input terminals, an input terminal for inputting performance information to be recorded for each track; and an output terminal for outputting performance information for each of the plurality of recording tracks. Second setting means for setting from among the plurality of output terminals; and inputting the performance information to the first Writing means for writing to the recording tracks set by the setting means; reading means for reading performance information recorded on each of the recording tracks from each recording track in accordance with the progress of the performance at the time of reproduction; Output means for outputting performance information corresponding to the plurality of recording tracks to respective output terminals set by the second setting means.