JP2881312B2 - Defect inspection equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial applications]

The present invention relates to a defect inspection apparatus that performs high-speed counting of the number of defects such as foreign matter, dirt, scratches, black spots, piholes, and fish eyes and measurement of size included in image data read by a sensor such as a line CDD camera.

[Prior art]

A conventional defect inspection apparatus reads, for example, image data of an inspection object using a sensor such as a line CCD camera, binarizes the image data, and further performs run-length encoding processing by a run-length encoding processing circuit. The run-length code is stored in an image memory, and the run-length code stored in the image memory is used to measure defects by connectivity processing.

[Problems to be solved by the invention]

However, the defect inspection apparatus cannot perform high-speed defect measurement because the connectivity processing is performed after the run-length encoding processing.

[Means for Solving the Problems]

SUMMARY OF THE INVENTION It is an object of the present invention to provide a defect inspection apparatus capable of performing a high-speed defect measurement by performing the run-length encoding process and the connectivity process in parallel. In the following, the defect inspection apparatus of the present invention comprises: run-length encoding means for obtaining a change point address of the binary image data; and run-length codes for a plurality of lines of the line sensor camera output from the run-length encoding means. A run-length code storage unit consisting of two series storing the run-length code stored in the run-length code storage unit, and performing a connectivity process using the run-length code stored in the run-length code storage unit to measure a defect. Means for performing parallel processing of storing a run-length code by the run-length encoding means for one of the series and processing by the connectivity processing means for the other series of the run-length code storing means; and the parallel processing means It is confirmed that both the storage of the run-length code and the processing by the connectivity processing means have been completed. Means for, after confirmation by means of the check, characterized in that it comprises a means for switching the sequence of the run-length code storage means.

[Action]

The defect inspection apparatus of the present invention configured as described above operates as follows. The defect inspection apparatus according to the present invention is provided with a plurality of run-length code storage means, and stores the run-length code in one of the run-length code storage means while storing the run-length code in the other series. And a means for switching the series of the run-length code storage means at the end of the run-length code processing after confirming the end of the connectivity processing means. The encoding process and the connectivity process can be performed in parallel.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a diagram showing one configuration example of the defect inspection apparatus of the present invention. In FIG. 1, reference numeral 1 denotes a line CCD camera, which reads an image of an inspection object. 2 is an image processing circuit,
This figure measures a defect from image data of an inspection object read by a line CCD camera, and FIG. Reference numeral 17 denotes a host CPU which displays an inspection result sent by the image processing circuit 2 and the like. The image processing circuit 2 is composed of, for example, 3 to 16 units, and each unit will be described below. Reference numeral 3 denotes an A / D converter, which converts a CCD camera signal into an A / D signal.
A / D conversion is performed by, for example, 8 bits. Reference numeral 4 denotes a comparator which outputs the output of the A / D converter 3 to “1” when a defect is detected based on the value of the threshold memory 9 and a logical designation memory 10 in the memory 6 described later, for example. When a normal part is detected, it is set to “0”. Reference numeral 5 denotes a run-length encoding circuit, which is an address of the binary data output from the comparator 4, which changes from "0" to "1" or "1" to "0" of the binary data, that is, a run-length. Get the sign. The connectivity processing is stored as a program in the ROM 6, and the data included in the run-length encoded data by the run-length encoding circuit 5 is subjected to connectivity processing to measure a defect included in the inspection object. Reference numeral 7 denotes a memory in the image processing circuit 2, which can be used similarly to the main memory of the CPU. As shown in the drawing, reference numerals 8 to 13 are specific configuration examples of the memory 7. First, 8 is a reference value memory, which is a line CCD camera 1
Is a memory for storing one line of image data. Then 9
Is a threshold memory, which sets a threshold for each element of the line CCD camera 1. When specifying a fixed value,
The same value may be stored in the threshold memory 9. In the reference value memory 8 and the threshold value memory 9, the line CC
Variation between elements of the D camera 1, unevenness of illumination, lens distortion, and the like can be corrected. For this correction, for example, image data obtained by reading a reference subject having a uniform transmittance or reflectance is stored in the reference value memory 8, and the product of this image data and the transmittance or reflectance specified as a threshold value is calculated. This product can be stored in the threshold memory 9. Reference numeral 10 denotes a logic designation memory for changing the logic of binarization by the comparator 4 according to a defect to be detected. For example, when a defect having an output level less than a threshold is to be detected, ""1" is set when a defect having an output level larger than 1 is to be detected. Reference numeral 11 denotes a line number designation memory for setting a unit of the number of processing lines of the run length encoding circuit 5. Reference numeral 12 denotes a run-length buffer, which stores the run-length code output from the run-length encoding circuit 5. The run-length buffer 12 stores a buffer (0
The sequence buffer 12a has two sequences consisting of a sequence 12a and a buffer (1 sequence) 12b. When the 0-sequence buffer 12a is being run-length-encoded by the run-length encoding circuit 5, the 1-sequence buffer 12b is connected. They are used alternately, so that the processing takes place. The buffers 12a, 12b
The number of defects that can be stored in
If the size is 128 KB, the data length of one run-length code is 2 bytes, so that it is (128K / 4). 13 is a run length buffer switching designation memory,
The sequence of the run length buffer 12 used by the run length encoding circuit 5 is stored. The series not specified by the run-length buffer switching specification 13 is subjected to connectivity processing by connectivity processing. 14 is a RAM, which stores a defect inspection program
It is. Reference numeral 15 denotes a ROM which stores a defect inspection processing program, particularly, the connectivity processing program described above. Reference numeral 6 denotes a CPU, which measures a defect while controlling each unit according to a program in the ROM. The control by the CPU 15 includes, for example, when a run-length encoding process is completed, an interrupt signal for terminating processing from the connectivity process is input, and when a connectivity process is completed, a run-length buffer switching designation signal is output. . Reference numeral 16 denotes an RS-232C interface for performing data transfer of inspection conditions and inspection results between the image processing circuit 2 and the host CPU 17. As can be understood from the above configuration, the defect inspection apparatus of the present invention is a run-length buffer having a plurality of buffers, and performs a run-length encoding process and a connectivity process on each of the series of buffers at the same time. It is. Therefore, the timing of the run-length encoding process and the connectivity process is important. Hereinafter, the function of the defect inspection apparatus shown in FIG. 1 and the condition of the processing timing will be described with reference to the timing chart of the run-length encoding process and the connectivity process shown in FIG. The defect inspection apparatus of the present invention can perform the run-length encoding processing and the connectivity processing in a preferable timing state when the defect inspection is performed under the following conditions. FIG. 2A is a timing chart in which the run-length encoding process and the connectivity process are performed under the following conditions. CCD scanning cycle × specified number of lines> connectivity processing time run-length buffer capacity> run-length code data amount The output signal S1 of the line CCD camera 1 is an analog signal obtained by reading one line of the image of the inspection object. Are continuously output to the image processing circuit 2 according to the scanning cycle. When this output signal S1 is input to the image processing circuit 2, it is A / D converted by the A / D converter 3, and then becomes binary data by the comparator 4. The binarization by the comparator 4 is performed based on the threshold memory 9. The binary data is subjected to a run-length encoding process by a run-length encoding circuit 5 to obtain a run-length code. This run-length code is stored in the buffer of the sequence designated by the run-length buffer sequence switching designation memory 13 as in the run-length encoded processing signals S2 and S3 shown in FIG. Then, the run-length encoding circuit 5
When the storage in the buffer is completed, an interrupt signal S4 for notifying the end of the process is output as shown in an interrupt signal S4 in FIG. On the other hand, the connectivity processing is performed on a buffer of a sequence not specified in the run-length buffer sequence switching designation memory 13 to measure a defect. (See the connectivity processing signals S5 and S6.) When this connectivity processing is completed, the CPU 15 changes the contents of the run-length buffer switching designation memory 13 indicated by the run-length buffer sequence switching designation signal S7 in FIG. 2 (a). . Here, after the switching pulse P1 of the signal S7 is generated,
When the interruption pulse of the interruption signal S4 is output, the series of the buffer designated by the run-length series switching designation memory 13 is switched. For example, in FIG. 2 (a), the run-length sequence switching designation memory 13 designates a one-line buffer before and immediately after the pulse P1 of the run-length buffer sequence switching designation signal S7 occurs. However, when the pulse P2 of the interrupt signal S4 is output, the specified sequence of the run-length sequence switching designation memory 13 is changed to 0 sequence because the pulse P1 of the run-length buffer sequence switching designation signal S7 has been confirmed. Can be switched. Therefore, the processing timing of the run-length encoding process and the connectivity process is determined by the change in the contents of the run-length buffer sequence designation memory 13 due to the above-described signals S4 and S7. Hereinafter, the defect inspection apparatus of the present invention can measure the defects included in the inspection object by repeating the above-described processing. It should be noted that the defect inspection apparatus of the present invention measures the defect even when the inspection object contains a very large number of defects, for example, when the conditions require time for the connectivity processing as shown in the following '. be able to. FIG. 2 (b) is a timing chart in which the run-length encoding process and the connectivity process are performed under the following conditions. 'CCD scanning cycle × specified number of lines <connectivity processing time In FIG. 2 (b), when the connectivity processing in the 0-series buffer (see the connectivity processing signal S5) is in progress, the run-length encoding in the 1-series buffer is performed. This shows a case where the process (see the run-length encoding process S3) is completed and an interrupt signal indicating the end of the process (see the pulse P4 of the interrupt signal S4) is generated. When the run-length encoding process for the 0-sequence buffer is completed, a pulse P3 is generated as shown in a signal S3 in FIG. 11B, and the run-length sequence switching memory 13 designates a one-sequence buffer, and the one-sequence buffer is designated. The run-length encoding process for the buffer is started. When the run-length processing for the one-series buffer is completed, a pulse P4 indicated by a signal S4 in FIG. However, since the connectivity processing of the 0-sequence buffer is in the middle of the processing as can be seen from the signal S5 in FIG. 9B, the contents of the run-length-sequence switching designation memory 13 are changed by the generation of the pulse P4 of the signal S4. Is not changed and the state in which the one-series buffer is designated is maintained. Therefore, the run-length encoding of the one-series buffer
As shown in S3, a process is performed on the empty area based on the binary data from the output S1 of the new line CCD camera while the one-series buffer is designated, and the run-length code is stored. On the other hand, the connectivity processing in the 0-series buffer ignores the interrupt pulse P3 of the signal S4 as shown in the signal S5 and continues the processing, and when the processing is completed, generates the switching pulse P5 as shown in the signal S7. When the run-length encoding process of the one-series buffer is completed, an interrupt pulse P6 shown in a signal S4 is output,
At this time, the run-length sequence switching designation memory 13 stores the previous signal
Since the switching pulse P5 has been confirmed as shown in S5, switching to the 0-sequence buffer is performed. Hereinafter, the run-length encoding process and the connectivity process under the condition described above are performed. Further, when the condition shown in the following (1) occurs, it is determined that some trouble has occurred during the defect measurement, and error processing is performed as necessary. 'Run-length buffer capacity <run-length code data amount] Next, an example in which fish eyes contained in a transparent film are measured by the defect inspection apparatus of the present invention will be described. Table 1 shows imaging conditions of the line CCD camera. The average of the fisheye image data contained in the measured film was 0.05 / line. The connectivity processing time is V30 (16-bit microcomputer manufactured by NEC Corporation) for CPU15.
Is used, the number of fish eyes is 1.6 times / row at a scanning period of 0.2 ms, and the number of fish eyes can be measured up to 320 times the number of fish eyes.

【The invention's effect】

The defect inspection apparatus of the present invention has the following features, and can achieve higher speed than the conventional run-length code connectivity processing, and has a great effect as the defect inspection apparatus. Parallel processing In the case of one series, the run-length code from the line CCD camera cannot be stored during the run-length code connectivity processing, but in the case of two series, parallel processing is possible by using them alternately. Becomes Averaging of processing time If there is only one line of run-length buffer, the processing time is determined by the processing time of the maximum value of the number of run-length codes. It is determined by the average number of run-length codes. This is usually a very small value.

[Brief description of the drawings]

FIG. 1 is a diagram showing an example of a device configuration of the present invention, and FIG. 2 is a diagram showing timings of run-length encoding and connectivity processing. DESCRIPTION OF SYMBOLS 1 ... Line CCD camera 2 ... Image processing circuit 3 ... A / D converter 4 ... Comparator 5 ... Run length encoding circuit 6 ... ROM (stores a defect inspection program, especially a connectivity processing program) 7 ... … Memory 8… Reference value memory 9… Threshold memory 10… Logic designation memory 11… Line number designation memory 12… Run length buffer 12a… 0 sequence buffer 12b… 1 sequence buffer 13… Run length buffer Series switching designation memory 14 RAM 15 CPU 16 RS-232C 17 Host CPU

────────────────────────────────────────────────── (5) References JP-A-1-189549 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) G01N 21/84-21/91 G06T 1 / 00-17/50

Claims (1)

(57) [Claims] An image of an inspection object is read by a line sensor camera, and the read image data is binarized.
In a defect inspection device that measures a defect included in the binary image data, a run-length encoding unit that obtains a change point address of the binary image data; and a line sensor camera that is output from the run-length encoding unit. A run-length code storage unit composed of two sequences that store run-length codes for a plurality of rows; a connectivity processing unit that performs a connectivity process using the run-length codes stored in the run-length code storage unit to measure a defect; The storage of a run-length code by the run-length encoding means for one of the series of the run-length code storage means and the processing by the connectivity processing means for the other series of the run-length code storage means are performed in parallel. Means for storing run-length codes in the parallel processing means and the connectivity processing means. Means for confirming that the management is completed either after confirmation by means of the confirmation, defect inspection apparatus according to claim that and means for switching the sequence of the run-length code storage means.