JPH0367159A - Defect inspection device - Google Patents

Abstract

PURPOSE:To measure a defect at a high speed by performing run-length encoding processing and connection processing in parallel. CONSTITUTION:A run-length encoding circuit 5 obtains an address where binary data outputted by a comparator 4 changes from '0' to '1' or vice versa, i.e. a run-length code. A run-length buffer 12 is stored with the run-length code outputted by the circuit 5. The buffer 12 has two systems, i.e. a buffer (0 system) 12a and a buffer (1 system) 12b, which are used alternately so that while the circuit 5 performs run-length encoding processing on the 0-system buffer 12a, connection processing is carried out on the 1-system buffer 12b. A run-length buffer switching specification member 13 is stored with the system of the buffer 12 that the circuit 5 uses. The system where the memory 13 is not specified is put in the connection processing. Thus, the run-length encoding processing and connection processing are carried out in parallel.

Description

[Detailed description of the invention] [Industrial application field]

The present invention relates to a defect inspection device that performs high-speed counting and size measurement of defects such as foreign objects, dirt, scratches, black spots, pinholes, and fissure eyes contained in image data read by a sensor such as a line CDD camera.

[Conventional technology]

Conventional defect inspection equipment, for example, reads image data of an inspection object using a sensor such as a line CCD camera, then binarizes the image data, and then performs run-length encoding processing using a run-length encoding processing circuit. The run-length codes stored in the image memory are stored in an image memory, and the run-length codes stored in the image memory are subjected to connectivity processing to measure defects.

[Problem to be solved by the invention]

However, since the defect inspection apparatus performs connectivity processing after run-length encoding processing, it is not possible to perform defect measurement at high speed.

[Means to solve the problem]

An object of the present invention is to provide a defect inspection apparatus that can perform high-speed defect measurement by performing the run-length encoding process and the connectivity process in parallel. Hereinafter, (1) the defect inspection apparatus of the present invention comprises: a run-length encoding means for obtaining a change point address of the binary image data; and a run length of a plurality of lines of the line sensor camera output from the run-length encoding means. run-length code storage means consisting of two series for storing length codes; connectivity processing means for performing connectivity processing and measuring defects using the run-length codes stored in the run-length code storage means; and the run-length code storage means. means for parallel processing the storage of a run-length code by the run-length encoding means for one series of the means and the processing by the connectivity processing means for the other series of the run-length code storage means; means for confirming completion of storage of the run-length code in the processing means and completion of processing by the connectivity processing means; and means for switching the series of the run-length code storage means after confirmation by the confirmation means. It is characterized by

[Effect]

The defect inspection apparatus of the present invention configured as described above operates as follows. The defect inspection apparatus of the present invention is provided with a plurality of series of run-length code storage means, and while a run-length code is stored in one series of the run-length code storage means, the other series of run-length code storage means is stored. and after confirming completion of the connectivity processing means, switching the series of the run-length code storage means when the run-length code processing is completed. Encoding processing and connectivity processing can be performed in parallel.

【Example】

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram showing an example of the configuration of a defect inspection apparatus according to the present invention. In the figure, 1 is a line CCD camera that reads an image of the object to be inspected. 2 is an image processing circuit;
Defects are measured from image data of the inspection object read by a line CCD camera, and an example of its internal configuration is shown in the figure. Further, 17 is a host CPU,
The inspection results sent by the image processing circuit 2 are displayed. The image processing circuit 2 is composed of, for example, 3 to 16 sections, and each section will be explained below. Reference numeral 3 denotes an A/D converter, which performs A/D conversion of the CCD camera signal, for example, 8-bit A/D conversion. Reference numeral 4 denotes a humperator, which converts the output of the A/D humerverter 3 to the value of the threshold memory 9 and the logic specification memory 10 in the memory 6, which will be described later. is detected, it is set as °'O''. 5 is a run length encoding circuit, and comparator 4
In the binary data output from II O11 to 11111 or 1'' to "o" of the binary data
In addition, the connectivity processing is stored as a program in the ROM 6, and the connectivity processing is performed on the run-length encoded data by the run-length encoding circuit 5. Defects included in the object to be inspected are measured by. 7 is a memory in the image processing circuit 2 and can be used in the same way as the main memory of the CPU. As shown in the figure, 8 to 13 are:
This is a specific example of the configuration of the memory 7. First, 8 is a reference value memory, and the line CCD camera 1
This is a memory that stores one line of image data. Next, 9 is a darkness value memory, in which a darkness value is set for each element of the line CCD camera 1. In addition, when specifying a fixed value,
The same value may be stored in the threshold value memory 9. Further, in the reference value memory 8 and the threshold value memory 9, the line C
It is possible to correct variations between elements of the CD camera 1, unevenness in illumination, lens distortion, etc. This correction is performed by, for example, storing image data obtained by reading a reference object with uniform transmittance or reflectance in the reference value memory 8, and calculating the product of this image data and the transmittance or reflectance specified as a threshold value. , by storing this product in the threshold memory 9. Further, 10 is a logic specification memory, which changes the logic of the binarization by the comparator 4 according to the defect to be detected. For example, when it is desired to detect a defect having an output level below a threshold value, "1" If you want to detect defects with an output level greater than the dark value, set "0". Reference numeral 11 denotes a line number designation memory, which sets the unit of the number of lines to be processed by the run-length encoding circuit 5. A run-length buffer 12 stores the run-length code output from the run-length encoding circuit 5. This run length encoder 12 has two series consisting of a buffer (O series) 12a and a buffer (1 series) 12b. 1, the series buffer 12b is used alternately for concatenation processing. The number of defects that can be stored in the buffers 12a and 12b is, for example, B. If the memory capacity of the file is 128 KB, the data length of one run-length code is 2 bytes, so the number is (128/4). 13 is a run length buffer switching designation memory;
It stores a series of run-length buffers 12 used by the run-length encoding circuit 5. Incidentally, sequences not specified by this run-length buffer switching specification 13 are subjected to connectivity processing. 14 is a RAM that stores a defect inspection program. Further, 15 is a ROM, which is a defect inspection processing program;
In particular, it stores the connectivity processing program mentioned above. 6 is a CPU, which measures defects while controlling each part according to the program in the ROM. Said CPU
Control by 15 includes, for example, inputting an interrupt signal indicating the end of processing from connectivity processing when run-length encoding processing ends, and outputting a run-length buffer switching designation signal when connectivity processing ends. Reference numeral 16 denotes an R5-232C interface, which transfers data of test conditions and test results between the image processing circuit 2 and the host CPU 17. As understood from the above configuration, the defect inspection device of the present invention is a run-length buffer having a plurality of buffers,
Run-length encoding processing and connectivity processing are simultaneously performed on the buffers of each series. Therefore, the timing of the run-length encoding process and the connectivity process is important. Hereinafter, the functions of the defect inspection apparatus shown in FIG. 1 and the processing timing conditions will be explained with reference to the timing diagram of the run-length encoding process and the connectivity process shown in FIG. 2. The defect inspection apparatus of the present invention can perform run-length encoding processing and connectivity processing at favorable timing when defect inspection is performed under the conditions shown in (2) below. FIG. 2(a) shows a timing diagram when run-length encoding processing and connectivity processing are performed under the conditions shown in (1) and (2) below. ■ CCD scanning period x specified line > Connectivity processing time ■ Run length [fufu T capacity] Data amount of run length code Line The output signal S1 of the CCD camera 1 is an analog signal obtained by reading one line of the image of the object to be inspected. This signal is continuously output to the image processing circuit 2 according to the scanning period of the camera. When this output signal S1 is input to the image processing circuit 2, it is A/D converted by the A/D converter 3, and then becomes binarized data by the comparator 4. Incidentally, the binarization by the hum parator 4 is performed based on the dark value memory 9. The binarized data is subjected to run-length encoding processing by a run-length encoding circuit 5 to obtain a run-length code. This run-length code is stored in the buffer of the series designated by the run-length buffer series switching designation memory 13 through which the run-length encoded signals S2 and S3 shown in FIG. 2(a) pass. and run length encoding circuit 5
When the storage in the buffer is completed, it outputs an interrupt signal S4 notifying the end of the process, as shown in the interrupt signal S4 in FIG. On the other hand, the connectivity process is performed on buffers of series not designated by the run-length buffer series switching designation memory 13 to measure defects. (Connectivity processing signal S5,
(See S6) When this connectivity processing is completed, the CPU 15 executes the run-length buffer series switching designation memory 13 indicated by the run-length buffer series switching designation signal S7 in FIG. 2(a).
Change the contents of Here, when the interrupt pulse of the interrupt signal S4 is output after the switching pulse PI of the signal S7 is generated, the series of buffers designated by the run-length series switching designation memory 13 is switched. For example, in FIG. 2(a), the run-length sequence switching designation memory 13 stores the following data before and immediately after the pulse Pl of the run-length buffer sequence switching designation signal S7 is generated:
1 series bath sofa is specified. However, when the pulse P2 of the waist interrupt signal S4 is output, the designated series in the run length series switching designation memory 13 is as follows.
Since the pulse PI of the run-length buffer sequence switching designation signal S7 has been confirmed, the sequence is switched to the 0 sequence. Therefore, the run-length encoding process and the connectivity process are
The processing timing is determined by the change in the contents of the run-length buffer sequence designation memory 13 caused by the aforementioned signals S4 and S7. Hereinafter, the defect inspection apparatus of the present invention can measure defects included in the object to be inspected by repeating the above-described process. In addition, in the defect inspection apparatus of the present invention, the above-mentioned condition (■) satisfies the following ■'
If the connectivity process takes time, as shown in Figure 2, for example, defects can be measured even when the object to be inspected contains a very large number of defects. Figure 2 (b) shows a timing diagram in which run-length encoding processing and connectivity processing are performed under the conditions shown below. In Figure (b), while the connectivity processing in the 0-series buffer (see connectivity processing signal S5) is in progress, the run-length encoding processing in the 1-series buffer (see run-length encoding processing S3) is completed, and the This shows a case where an interrupt signal indicating the end of processing (see pulse P4 of interrupt signal S4) is generated. When the run length encoding processing to the 0 series buffer is completed, the signal S3 ((+)) in the figure is generated. As shown, the pulse P3 is generated, the run-length sequence switching memory 13 specifies the 1-series buffer 7, and the run-length encoding process for the 1-sequence bathopha is started. When the process ends, the signal S4 in FIG.
A pulse P4 shown in is generated. However, since the connectivity processing of the 0-series buffer is in the middle of processing as seen from the signal S5 in FIG. The state in which one series buffer is specified is maintained without being changed. Therefore, as shown in signal S3, run-length encoding processing for the 1-sequence buffer is performed by adding a new line CC to the empty area while keeping the 1-series buffer specified.
Processing is performed based on the binary data from the output Sl of the D camera, and its run length code is stored. On the other hand, 0
The connectivity processing in the sequence buffer continues, ignoring the interrupt pulse P3 of the signal S4, as shown in the signal S5, and when the processing is completed, a switching pulse P5 is generated as shown in the signal s7. When the run-length encoding process of the 1-series bathophore is completed, an interrupt pulse P6 shown in the signal S4 is output, and at this time, the run-length sequence switching designation memory 13 confirms the switching pulse P5 as shown in the previous signal S5. Therefore, it is possible to switch to the 0 series bass sofa. Thereafter, run-length encoding processing and connectivity processing under the condition (■) described above are performed. Furthermore, if the condition shown below (■') occurs, it is determined that some kind of trouble has occurred during defect measurement, and error handling is performed as necessary. ■' Run length thick T capacitance Run length code data 1 Next, an example will be shown in which the line defects contained in a transparent film were measured using the defect inspection apparatus of the present invention. Note that Table 1 shows the imaging conditions of the line CCD camera. The image data of fishcore eyes contained in the measured film is on average 0.05 pieces/line. In addition, the connectivity processing time is 0.5 seconds when the CPU 15 uses V2O (a 16-bit microcomputer manufactured by NEC@). 1 in 2ms.
6 pieces/row, and it is possible to measure up to 320 times the number of fisshuiae mentioned above. If there is only a run-length buffer for one line, the processing time is determined by the processing time for the maximum number of run-length codes, but if there are run-length buffers for multiple lines, the processing time is determined by the average number of run-length codes per line. It can be determined by This is usually a very small value.

【Effect of the invention】

The defect inspection device of the present invention has the following features, and can perform faster processing than conventional run-length code connectivity processing, and is highly effective as a defect inspection device. ■In the case of one series of parallel processing, during run-length code connectivity processing,
Although the run length codes from the line CCD camera cannot be stored, in the case of two series, parallel processing is possible by using them alternately. ■Averaging processing time

[Brief explanation of drawings]

FIG. 1 is a diagram showing an example of the device configuration of the present invention, and FIG. 2 is a diagram showing the timing of run-length encoding and connectivity processing. 1...Line CCD camera 2...Image processing circuit 3...A/D converter 4...Comparator 5...Run length encoding circuit 6...ROM (Defect inspection program, especially connectivity processing 7...Memory 8...Reference value memory 9...Threshold value memory 10...Logic specification memory 11...Line number specification memory 12...Run length vanofer 12a... 0 series buffer 12b...1 series buffer 13...Run length buffer series switching specification memory 14...RAM 15...CPU 16...R3-232C 17...Host CPU FIG.

Claims (1)

[Scope of Claims] A defect inspection device that reads an image of an object to be inspected using a line sensor camera, binarizes the read image data, and measures defects included in the binary image data, comprising: run-length encoding means for obtaining a change point address; run-length code storage means consisting of two series for storing run-length codes for a plurality of lines of the line sensor camera output from the run-length encoding means; Connectivity processing means for performing connectivity processing and measuring defects using a run-length code stored in a run-length code storage means; and a run-length encoding means for one series of the run-length code storage means. means for parallel processing the storage of the code and the processing by the connectivity processing means on the other series of the run-length code storage means; and the completion of the storage of the run-length code in the parallel processing means and the processing by the connectivity processing means A defect inspection apparatus comprising: means for confirming completion of processing; and means for switching the series of the run-length code storage means after confirmation by the confirming means.