JP2880175B2 - Laser annealing method and thin film semiconductor device - Google Patents

Laser annealing method and thin film semiconductor device

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Publication number
JP2880175B2
JP2880175B2 JP30055888A JP30055888A JP2880175B2 JP 2880175 B2 JP2880175 B2 JP 2880175B2 JP 30055888 A JP30055888 A JP 30055888A JP 30055888 A JP30055888 A JP 30055888A JP 2880175 B2 JP2880175 B2 JP 2880175B2
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Japan
Prior art keywords
film
poly
polycrystalline silicon
deposited
semiconductor device
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JP30055888A
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Japanese (ja)
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JPH02148831A (en
Inventor
義彦 小池
中行 胡
青山  隆
義昭 岡島
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Hitachi Ltd
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Hitachi Ltd
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Priority to JP29640198A priority patent/JPH11195608A/en
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Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は薄膜半導体装置製造におけるレーザアニール
方法に係り、特にアクテイブマトリクス方式のデイスプ
レイに好適なレーザアニール方法に関する。
Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a laser annealing method in manufacturing a thin film semiconductor device, and more particularly to a laser annealing method suitable for an active matrix type display.

〔従来の技術〕[Conventional technology]

近年、アクテイブマトリクス用の薄膜半導体装置であ
る薄膜トランジスタ(Thin Film Transistor,略してTF
T)材料としては高画質化の点ですぐれている多結晶シ
リコン(Polycrystalline Silicon,略してpoly−Si)が
用いられている。このPoly−Si膜は減圧CVD法(LPCVD
法)及び常圧CVD法(APCVD法)により作成されている。
絶縁基板としては石英ガラス又は通常のガラス板を用い
る。通常のガラス板を用いる際は最高温度が約640℃と
いう大きな制約があるためガラス板には熱的影響を与え
ずpoly−Si膜の表面層だけをレーザ照射することで再結
晶化する方法が試みられている。この方法によればガラ
ス板に影響を与えない低温熱アニールに比べ結晶性が向
上している。
Recently, a thin film transistor (Thin Film Transistor, abbreviated as TF)
T) As a material, polycrystalline silicon (Polycrystalline Silicon, abbreviated as poly-Si), which is excellent in terms of high image quality, is used. This Poly-Si film is formed by a low pressure CVD method (LPCVD
Method and the normal pressure CVD method (APCVD method).
Quartz glass or a normal glass plate is used as the insulating substrate. When a normal glass plate is used, the maximum temperature is about 640 ° C, so there is a big restriction.Therefore, there is a method to recrystallize by irradiating only the surface layer of the poly-Si film with laser without thermally affecting the glass plate. Attempted. According to this method, the crystallinity is improved as compared with low-temperature thermal annealing that does not affect the glass plate.

従来はこのレーザ照射方法として特開昭60−245124号
に記載のようにSi膜で吸収率の大きな紫外光パルスレー
ザを照射して半導体装置を製造する方法が検討されてい
た。
Conventionally, as this laser irradiation method, a method for manufacturing a semiconductor device by irradiating an ultraviolet light pulse laser having a large absorptivity with a Si film as described in JP-A-60-245124 has been studied.

〔発明が解決しようとする課題〕[Problems to be solved by the invention]

上記従来技術ではレーザ照射によつて結晶性を向上さ
せることでTFT特性を向上させていたが再結晶化したPol
y−Si膜の結晶の配向性については検討されておらずTFT
を作成したときのキヤリア移動度を更に向上させる可能
性があつた。
In the above prior art, the TFT characteristics were improved by improving the crystallinity by laser irradiation.
The crystal orientation of the y-Si film has not been studied
There is a possibility of further improving the carrier mobility when creating the.

本発明の目的は薄膜半導体装置の特性を向上させるた
めの薄膜半導体装置の構造、とりわけTFTの能動層に使
用されるPoly−Si膜の配向性を考慮することで更に大き
なキヤリア移動度を得ることにある。
An object of the present invention is to obtain a larger carrier mobility by considering the structure of a thin film semiconductor device for improving the characteristics of the thin film semiconductor device, particularly the orientation of a Poly-Si film used for an active layer of a TFT. It is in.

〔課題を解決するための手段〕[Means for solving the problem]

上記目的はガラス基板等の絶縁性基板上に形成された
半導体装置であるTFTを構成するPoly−Si層を{111}面
を主体とした配向を持たせることにより達成される。
The above object is achieved by providing a poly-Si layer constituting a TFT, which is a semiconductor device formed on an insulating substrate such as a glass substrate, to have an orientation mainly composed of {111} planes.

このPoly−Si層は減圧CVD法により基板温度550℃以下
の温度において1500Å以下の膜厚で堆積し、500℃以下
で堆積したSi膜では200mJ/cm2以上、520〜550℃で堆積
したSi膜では400mJ/cm2以上の光強度でレーザ光をPoly
−Si層側から照射することで得られる。又、550℃で堆
積したSi膜を薄膜化した場合、800〜1500Åの膜厚では4
00mJ/cm2以上、600〜800Åの膜厚では300mJ/cm2以上、6
00Å以下の膜厚では200mJ/cm2以上の光強度でレーザ光
をPoly−Si層側から照射することで得られる。
This Poly-Si layer is deposited at a substrate temperature of 550 ° C. or less by a reduced pressure CVD method with a thickness of 1500 ° or less, and a Si film deposited at 500 ° C. or less is 200 mJ / cm 2 or more, and Si deposited at 520 to 550 ° C. The film emits laser light with a light intensity of 400 mJ / cm 2 or more.
-Obtained by irradiation from the Si layer side. When the thickness of the Si film deposited at 550 ° C is reduced,
MJ / cm 2 or more, the film thickness of 600~800Å 300mJ / cm 2 or more, 6
When the film thickness is not more than 00 °, it can be obtained by irradiating laser light from the Poly-Si layer side with a light intensity of 200 mJ / cm 2 or more.

〔作用〕[Action]

レーザ照射によつて再結晶化したPoly−Si層は個々の
Si結晶中には欠陥が少なく電子のトラツプは粒界に大き
く影響される。Poly−Siの結晶粒界の界面電荷密度は、
Si単結晶の各結晶面とSiO2との界面電荷密度が<100
>,<110>,<111>の順に増加することと同様の関係
が成立し、{111}優位配向のPoly−Si膜では配向性の
見られないPoly−Si膜に比べ膜と垂直方向(<111>方
向)のトラツプ密度が大となる。膜と平行方向では反対
に{111}優位配向のPoly−Si膜が配向性の見られないP
oly−Si膜に比べ相対的に低いトラツプ密度を示すこと
になる。トラツプ密度が低いと粒界に生じる空乏層幅は
せまくなり、ここでのポテンシヤル障壁は低くなる。Po
ly−Siのキヤリア移動度は主として粒界におけるポテン
シヤル障害の高さで決まる。TETのキヤリアはPoly−Si
膜と平行方向に流れる。これらの条件から{111}優位
配向のPoly−Siでは配向性のないPoly−Siに比べ相対的
にキヤリアの移動度が大きくなる。
Poly-Si layers recrystallized by laser irradiation
There are few defects in the Si crystal and the trap of electrons is greatly affected by the grain boundaries. The interface charge density at the grain boundaries of Poly-Si is
The interface charge density between each crystal plane of Si single crystal and SiO 2 is <100
>, <110>, and <111>, the same relationship holds, and the {111} dominant orientation of the Poly-Si film is more perpendicular to the film than that of the Poly-Si film, in which no orientation is observed. The trap density in the (<111> direction) increases. On the other hand, in the direction parallel to the film, the poly-Si film with {111} dominant orientation has no orientation.
The trap density is relatively lower than that of the oly-Si film. If the trap density is low, the width of the depletion layer generated at the grain boundary becomes narrow, and the potential barrier here becomes low. Po
The carrier mobility of ly-Si is mainly determined by the height of the potential obstacle at the grain boundary. TET's carrier is Poly-Si
Flows parallel to the membrane. From these conditions, the mobility of the carrier is relatively large in Poly-Si having {111} dominant orientation as compared with Poly-Si having no orientation.

〔実施例〕〔Example〕

以下本発明の実施例を説明する。 Hereinafter, embodiments of the present invention will be described.

第1図は本発明を用いたTFT全体の断面構造を示す。
基板1は歪温度約640℃のガラス基板である。基板1を5
50℃に保ち、ヘリウムで20%に希釈したモノシランガス
を原料として圧力1Torrの条件でLPCVD膜を堆積させる。
堆積時間は85分間で1500Åの膜を堆積させる。次に基板
1を480℃に保ち、ヘリウムで4%に希釈したモノシラ
ンガスと酸素を原料として常圧CVDにより表面保護膜を
約8分間で1000Å堆積させる。この膜の上面からXeClを
ガス源とした紫外光パルスレーザ(波長308nm、パルス
幅25ns)を照射することでLPCVD膜を再結晶化しPoly−S
i膜2,3,4を得る。この時レーザ光強度を400mJ/cm2以上
とすることでPoly−Si膜の主たる配向は{111}優位配
向となり平均結晶粒径は約1000Åである。次に表面保護
膜として用いたSiO2膜をフツ酸の水容液で除去する。レ
ーザ照射により再結晶化したPoly−Si膜を島状に形成す
るホトエツチングの工程を通した後、常圧CVD法により
ゲート絶縁膜用のSiO2膜5を堆積させる。次にゲート電
極用Poly−Si膜6を550℃、1Toorの条件で3500Å堆積さ
せる。ゲート膜5をホト,エツチした後、ソース,ドレ
イン領域3,4のインプラを行なう。条件はリン(P)を
用い、5×1015cm-2のドーズ量、30KeVの電圧である。
リンガラスからなるパツシベーシヨン膜8を480℃で500
0Å堆積させ、さらに、N2中600℃の条件で20時間以上の
熱処理、あるいは200mJ/cm2以上の光強度で紫外光パル
スレーザを照射することでインプラ領域を活性化させ
る。コンタクト用のホト,エツチ行程の後、Al電極7を
6000ÅスパツタすることでTFTを形成する。
FIG. 1 shows a sectional structure of the whole TFT using the present invention.
The substrate 1 is a glass substrate having a strain temperature of about 640 ° C. Substrate 1 to 5
An LPCVD film is deposited at a pressure of 1 Torr using a monosilane gas diluted to 20% with helium at a temperature of 50 ° C.
The deposition time is 85 minutes, and a 1500Å film is deposited. Next, the substrate 1 is kept at 480 ° C., and a surface protection film is deposited at 1000 ° C. for about 8 minutes by atmospheric pressure CVD using monosilane gas diluted to 4% with helium and oxygen as raw materials. The LPCVD film was recrystallized by irradiating an ultraviolet pulse laser (wavelength: 308 nm, pulse width: 25 ns) using XeCl as a gas source from the upper surface of this film to recrystallize the Poly-S
The i-films 2, 3, and 4 are obtained. At this time, by setting the laser light intensity to 400 mJ / cm 2 or more, the main orientation of the Poly-Si film becomes {111} dominant orientation, and the average crystal grain size is about 1000 °. Next, the SiO 2 film used as the surface protective film is removed with a hydrofluoric acid aqueous solution. After passing through a photo-etching step of forming a Poly-Si film recrystallized by laser irradiation into an island shape, an SiO 2 film 5 for a gate insulating film is deposited by a normal pressure CVD method. Next, a Poly-Si film 6 for a gate electrode is deposited at 550 ° C. and 1 Toor for 3500 °. After the gate film 5 is photo-etched, the source and drain regions 3 and 4 are implanted. The conditions are phosphorus (P), a dose of 5 × 10 15 cm −2 and a voltage of 30 KeV.
A passivation film 8 made of phosphor glass is deposited at 480 ° C. for 500
The implant region is activated by heat treatment in N 2 at 600 ° C. for 20 hours or more, or irradiation with an ultraviolet pulse laser at a light intensity of 200 mJ / cm 2 or more in N 2 . After the photo and etching process for contact, the Al electrode 7
TFT is formed by 6000Å spatter.

第2図はPoly−Siを減圧CVD法により基板温度を550℃
として1500Å堆積し、そのPoly−Si側から光強度を100
〜400mJ/cm2の間で変化させ紫外光パルスレーザを照射
して再結化させた際の各面からのX線回折強度と、上記
方法で作成したTFTの移動度の変化を示す。最も回折強
度の強いSi(111)回折ピークはしきいエネルギ(約100
mJ/cm2)以上で光強度に比例して増加しているが他のSi
(220),Si(311)回折ピークは光強度300mJ/cm2以上で
増加量が鈍り配向性が{111}優位配向となる。{111}
優位配向となる300mJ/cm2以上の光強度で移動度は急激
に増大している。
Fig. 2 shows the substrate temperature of Poly-Si reduced to 550 ° C by low pressure CVD.
1500Å, and the light intensity from the Poly-Si side is 100
The X-ray diffraction intensity from each surface and the change in the mobility of the TFT formed by the above method when re-assembled by irradiating an ultraviolet pulsed laser while changing the thickness between -400 mJ / cm 2 are shown. The Si (111) diffraction peak with the highest diffraction intensity has a threshold energy (about 100
Above mJ / cm 2 ), it increases in proportion to the light intensity, but other Si
The (220) and Si (311) diffraction peaks decrease in increasing amount at a light intensity of 300 mJ / cm 2 or more, and the orientation becomes {111} dominant orientation. {111}
At a light intensity of 300 mJ / cm 2 or more, which is the dominant orientation, the mobility increases sharply.

次に第3図に減圧CVD法による堆積する際の堆積温度
を500〜600℃としてLPCVD膜を堆積した後上記記載と同
様に表面保護膜を堆積、その後紫外光パルスレーザを照
射し再結晶化したPoly−Si膜の結晶配向性を示す。基板
温度500℃で堆積したLPCVD膜には200mJ/cm2以上、520〜
550℃で堆積したSi膜では400mJ/cm2以上の光強度でレー
ザ光を照射することで{111}優位配向となり、基板温
度580℃以上で堆積したSi膜では{111}優位配向は見ら
れない。
Next, as shown in FIG. 3, an LPCVD film is deposited at a deposition temperature of 500 to 600 ° C. when depositing by the low pressure CVD method, and then a surface protective film is deposited in the same manner as described above. 3 shows the crystal orientation of the obtained Poly-Si film. The LPCVD film deposited at a substrate temperature of 500 ° C. 200 mJ / cm 2 or more, 520 to
Irradiation with laser light with a light intensity of 400 mJ / cm 2 or more in a Si film deposited at 550 ° C resulted in a {111} dominant orientation, while a Si film deposited at a substrate temperature of 580 ° C or more showed a {111} dominant orientation. Absent.

次に第4図に減圧CVD法により堆積する際の基板温度
を550℃として堆積時間を短くしてLPCVD膜を400〜1500
Åの膜厚で堆積した後上記記載を同様に表面保護膜を堆
積、その後紫外光パルスレーザを照射し再結晶化したPo
ly−Si膜の結晶配向性を示す。膜厚1500Åでは400mJ/cm
2以上800Åでは300mJ/cm2以上、600Å及び400Åでは200
mJ/cm2以上の光強度でレーザ光を照射することで{11
1}優位配向となる。
Next, as shown in FIG. 4, the deposition temperature was reduced to 550 ° C. and the deposition time was reduced to 400 to 1500
After depositing with a film thickness of Å, a surface protective film was deposited in the same manner as described above, and then irradiated with an ultraviolet pulse laser to recrystallize Po.
4 shows the crystal orientation of a ly-Si film. 400mJ / cm for 1500mm thickness
In more 800 Å 300 mJ / cm 2 or more, the 600Å and 400 Å 200
Irradiation with laser light at a light intensity of mJ / cm 2 or more
1} Dominant orientation.

本実施例で述べた{111}を主配向とするPoly−Si膜
は移動度が大きく、これをTFTの能動領域に用いること
ですぐれた電気特性を得ることができる。
The Poly-Si film having a main orientation of {111} described in this embodiment has a high mobility, and excellent electrical characteristics can be obtained by using this in the active region of the TFT.

〔発明の効果〕〔The invention's effect〕

本発明によれば、LPCVD膜の堆積条件が異なつても照
射紫外光パルスレーザ光の光強度を最適化することで
{111}優位配向のPoly−Si膜が得られるので、キヤリ
アの移動度が大きい薄膜半導体装置を得ることができ
る。
According to the present invention, even if the deposition conditions of the LPCVD film are different, a poly-Si film having a {111} dominant orientation can be obtained by optimizing the light intensity of the irradiation ultraviolet light pulsed laser beam. A large thin film semiconductor device can be obtained.

【図面の簡単な説明】[Brief description of the drawings]

第1図は本発明のTFTの構造の模式図、第2図はレーザ
アニール後のPoly−Siの結晶性及び移動度の光強度依存
性を示す図、第3図、第4図はPoly−Si膜の結晶配向性
を示す図である。 1…絶縁性基板、2…多結晶シリコン層、3…ソース領
域、4…ドレイン領域、5…ゲード絶縁膜、6…ゲード
電極、7…Al電極、8…パツシベーシヨン膜。
FIG. 1 is a schematic diagram of the structure of the TFT of the present invention, FIG. 2 is a diagram showing the light intensity dependence of the crystallinity and mobility of Poly-Si after laser annealing, and FIGS. 3 and 4 are Poly-Si. FIG. 3 is a view showing the crystal orientation of a Si film. DESCRIPTION OF SYMBOLS 1 ... Insulating substrate, 2 ... Polycrystalline silicon layer, 3 ... Source region, 4 ... Drain region, 5 ... Gate insulating film, 6 ... Gate electrode, 7 ... Al electrode, 8 ... Passivation film.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 岡島 義昭 茨城県日立市久慈町4026番地 株式会社 日立製作所日立研究所内 (56)参考文献 特開 昭61−127118(JP,A) 特開 平2−32527(JP,A) (58)調査した分野(Int.Cl.6,DB名) H01L 21/20 ──────────────────────────────────────────────────続 き Continuation of the front page (72) Inventor Yoshiaki Okajima 4026 Kuji-cho, Hitachi City, Ibaraki Prefecture Within Hitachi Research Laboratory, Hitachi Ltd. (56) References JP-A-61-127118 (JP, A) 32527 (JP, A) (58) Field surveyed (Int. Cl. 6 , DB name) H01L 21/20

Claims (4)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】1500Å以下の膜厚の多結晶シリコン膜を、
500℃以下で堆積した多結晶シリコン膜では200mJ/cm2
上、520℃〜550℃で堆積した多結晶シリコン膜では400m
J/cm2以上の光強度のレーザ光を、多結晶シリコン膜側
から照射することで{111}面を主体とした配向性を持
たせることを特徴とするレーザアニール方法。
1. A polycrystalline silicon film having a thickness of 1500 ° or less,
500 ° C. The polycrystalline silicon film deposited below 200 mJ / cm 2 or more, 400 meters in a polycrystalline silicon film deposited at 520 ° C. to 550 ° C.
A laser annealing method characterized by irradiating a laser beam having a light intensity of J / cm 2 or more from the polycrystalline silicon film side to impart an orientation mainly including a {111} plane.
【請求項2】1500Å以下の膜厚の多結晶シリコン膜を、
500℃以下で堆積した多結晶シリコン膜では200mJ/cm2
上、520℃〜550℃で堆積した多結晶シリコン膜では400m
J/cm2以上の光強度のレーザ光を、多結晶シリコン膜側
から照射することで{111}面を主体とした配向性を持
たせることを特徴とする薄膜半導体装置。
2. A polycrystalline silicon film having a thickness of 1500 ° or less,
500 ° C. The polycrystalline silicon film deposited below 200 mJ / cm 2 or more, 400 meters in a polycrystalline silicon film deposited at 520 ° C. to 550 ° C.
A thin-film semiconductor device characterized in that a laser beam having a light intensity of J / cm 2 or more is irradiated from the polycrystalline silicon film side so that the {111} plane is mainly oriented.
【請求項3】550℃以下で堆積したSi膜を、800Å〜1500
Åの膜厚では400mJ/cm2以上、600Å〜800Åの膜厚では3
00mJ/cm2以上、600Å以下の膜厚では200mJ/cm2以上の光
強度のレーザ光を、Si膜側から照射することで{111}
面を主体とした配向性を持たせることを特徴とするレー
ザアニール方法。
3. An Si film deposited at a temperature of 550.degree.
400 mJ / cm 2 or more for Å film thickness, 3 for 600Å-800 膜厚 film thickness
For a film thickness of not less than 00 mJ / cm 2 and not more than 600 °, laser light having a light intensity of not less than 200 mJ / cm 2 is irradiated from the Si film side to obtain {111}.
A laser annealing method characterized by giving an orientation mainly to a surface.
【請求項4】550℃以下で堆積したSi膜を、800Å〜1500
Åの膜厚では400mJ/cm2以上、600Å〜800Åの膜厚では3
00mJ/cm2以上、600Å以下の膜厚では200mJ/cm2以上の光
強度のレーザ光を、Si膜側から照射することで{111}
面を主体とした配向性を持たせることを特徴とする薄膜
半導体装置。
4. An Si film deposited at a temperature of 550 ° C. or less, from 800 ° to 1500 ° C.
400 mJ / cm 2 or more for Å film thickness, 3 for 600Å-800 膜厚 film thickness
For a film thickness of not less than 00 mJ / cm 2 and not more than 600 °, laser light having a light intensity of not less than 200 mJ / cm 2 is irradiated from the Si film side to obtain {111}.
A thin-film semiconductor device characterized by having an orientation mainly based on a plane.
JP30055888A 1988-11-30 1988-11-30 Laser annealing method and thin film semiconductor device Expired - Lifetime JP2880175B2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP30055888A JP2880175B2 (en) 1988-11-30 1988-11-30 Laser annealing method and thin film semiconductor device
JP29640198A JPH11195608A (en) 1988-11-30 1998-10-19 Laser annealing method

Applications Claiming Priority (1)

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JP30055888A JP2880175B2 (en) 1988-11-30 1988-11-30 Laser annealing method and thin film semiconductor device

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US5753542A (en) * 1985-08-02 1998-05-19 Semiconductor Energy Laboratory Co., Ltd. Method for crystallizing semiconductor material without exposing it to air
DE69125886T2 (en) 1990-05-29 1997-11-20 Semiconductor Energy Lab Thin film transistors
JP3277548B2 (en) * 1991-05-08 2002-04-22 セイコーエプソン株式会社 Display board
JP2935446B2 (en) * 1992-02-28 1999-08-16 カシオ計算機株式会社 Semiconductor device
KR0131062B1 (en) 1992-08-27 1998-04-14 순페이 야마자끼 Fabrication method for film-like semiconductor device
KR950010859B1 (en) * 1992-09-29 1995-09-25 현대전자산업주식회사 Chamel polysilicon manufacturing method of thin-film transistor
TW226478B (en) * 1992-12-04 1994-07-11 Semiconductor Energy Res Co Ltd Semiconductor device and method for manufacturing the same
US6730549B1 (en) 1993-06-25 2004-05-04 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for its preparation
TW295703B (en) * 1993-06-25 1997-01-11 Handotai Energy Kenkyusho Kk
JPH1065180A (en) * 1996-03-29 1998-03-06 A G Technol Kk Polycrystalline semiconductor thin film and forming method thereof, polycrystalline semiconductor tft, and tft substrate
TW451284B (en) 1996-10-15 2001-08-21 Semiconductor Energy Lab Semiconductor device and method of manufacturing the same
JP2002176180A (en) 2000-12-06 2002-06-21 Hitachi Ltd Thin film semiconductor element and its manufacturing method
JP4600556B2 (en) 2008-09-19 2010-12-15 コベルコ建機株式会社 Construction machinery

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JPH02148831A (en) 1990-06-07

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