JP2879157B2 - Circuit board and active matrix board - Google Patents

Description

Description: BACKGROUND OF THE INVENTION The present invention relates to an active matrix substrate used for a circuit board and a display device, and in particular, to improve reliability by increasing the number of wiring layers to improve reliability. The present invention relates to a circuit board and an active matrix substrate.

(Prior art) A thin film transistor (hereinafter referred to as TF) is formed on an insulating substrate such as glass.
T) (abbreviated as T) in the form of a matrix, and this is used as a switch element.
Along with high definition and large size of an image, high reliability by making signal wiring and scanning wiring redundant has become an important technical problem.

Various structures have been proposed for the redundancy of each wiring. For example, Japanese Patent Application Laid-Open No. 61-134785 discloses that at least one of a signal wiring and a scanning wiring is vertically connected via an insulating film.
A structure has been proposed in which the upper and lower wiring layers are connected at predetermined intervals so that a signal can be supplied by the other wiring even if one of the wirings is disconnected.

FIG. 8 is a cross-sectional view of an intersection between a signal wiring and a scanning wiring in the prior art. In the intersection of each wiring, an upper scanning wiring 82a and a lower scanning wiring 82b are laminated via an insulating film 84. Is formed between the upper signal wiring 81a and the lower signal wiring 81b which constitute the other two-layer signal wiring 81.
The structure is sandwiched between 83 and 85.

The wires 82a and 82b are connected to each other in the contact hole 12, and similarly, the wires 81a and 81b are also connected to each other in a contact hole (not shown).

Japanese Patent Application Laid-Open No. 61-193185 discloses that a signal wiring has two upper and lower structures with an insulating film interposed therebetween, and connects the upper and lower wiring layers at predetermined intervals. A structure has been proposed in which a signal can be supplied by the above wiring.

FIG. 7 (a) is a plan view of this prior art, and FIG. 7 (b) is a sectional view taken along the line EF.

In the figure, a polycrystalline silicon thin film wiring 71 also serving as the active region 2 of the TFT 70 is formed on the main surface of the glass substrate 1, and a polycrystalline silicon scanning wiring 73 serving also as the gate electrode 77 of the TFT 70 is formed on the surface thereof. It is formed so as to intersect with the polycrystalline silicon thin film wiring 71 via an insulating film 78.

On the insulating film 78 or the scanning wiring 73, a signal wiring 75 is stacked via an insulating film 79, and the polycrystalline silicon thin film wiring 71 and the signal wiring 75 are interconnected via contact holes 74a, 74b. You. The pixel electrode 5 is connected to one end of the active region 2 via a contact hole 76.

Japanese Patent Application Laid-Open No. 61-147285 discloses that at least one of a signal wiring 91 and a scanning wiring 92 (for example, wiring 91) constituting a matrix wiring is connected to an intersection thereof as shown in FIG. Is divided into two parallel wirings 91a and 91b,
A structure has been proposed in which a signal can be supplied by the other wiring even if one of the wirings a and 91b is broken.

In such a configuration, for example, when a short circuit 93 occurs between the wiring 91b and the wiring 92b, the wiring 91b is cut by laser at both ends of the intersection with the wiring 92, and the remaining one wiring 91a A repair method using only wiring has been proposed.

Further, Japanese Patent Application Laid-Open No. 61-145584 proposes a structure for achieving redundancy by forming at least one of the signal wiring 101 and the scanning wiring 102 (for example, the wiring 102) in a ladder shape as shown in FIG. Have been.

(Problem to be Solved by the Invention) The above-described conventional technology has the following problems.

In the prior art (FIG. 8) described in Japanese Patent Application Laid-Open No. 61-134785, one two-layer wiring 82 constituting a matrix wiring is used.
Is formed between the other two wirings 81a and 81b, so that when a short circuit occurs at the intersection, the short circuit is caused by the wiring 81a.
It cannot be determined whether it is a short circuit 86a generated between the wiring 81a and the wiring 82a or a short circuit 86b generated between the wiring 81b and the wiring 82b.

For example, if the short circuit can be determined to be 86a, the repair method according to the present invention described later can be applied to cut the wiring 82a alone at two arrow portions, and the repair can be efficiently performed. If a short-circuit portion cannot be secured, there is a problem that such an efficient repair method cannot be applied.

In the prior art (FIG. 7) described in JP-A-61-193185, the scanning wiring 73 is formed between the polycrystalline silicon thin-film wiring 71 and the signal wiring 75, as described above. When a short circuit occurs in a portion, the short circuit
Occurred between the wire 75 and the wire 73 or the wire 75 and the wire
It is not possible to determine if it occurred between 73 and.

Also, in this conventional technique, the polysilicon scanning wiring 7 is not used.
3. It is necessary to introduce an impurity into the active region 2 other than the lower portion of the polycrystalline silicon thin film wiring 71 and the gate electrode 77 for activation.

In this case, when an activation process such as ion implantation is performed using the gate electrode 77 as a mask in order to activate an active region other than the lower portion of the gate electrode 77, the scanning wiring 73 also serves as the gate electrode 77. The processing must be performed after forming the scanning wiring 73.

However, in this case, the polysilicon thin film wiring
Of the portions 71, at a portion 71a that intersects with the scanning wiring 73, the scanning wiring 73 serves as a mask, the polycrystalline silicon thin film wiring 71 is not activated, and that portion remains at high resistance.

Therefore, in the related art having such a configuration, when the signal wiring 75 is disconnected between the two contact holes 74a and 74b sandwiching the intersection, a conduction failure occurs.

Further, in the prior art described in Japanese Patent Application Laid-Open No. 61-147285 (FIG. 9) or Japanese Patent Application Laid-Open No. 61-145584 (FIG. 10), similar to the above, it is difficult to determine a short-circuit point. However, since the wiring is multiplexed by arranging the wiring in parallel on one plane, there is a problem that the aperture response is reduced.

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems, to improve reliability by making wiring redundant without lowering the aperture ratio, and to prepare an active matrix that can be repaired when a short circuit occurs. It is to provide a board and a circuit board.

(Means for Solving the Problems) In order to solve the above problems, the present invention is characterized in that the following means are taken.

(1) In a circuit board having a plurality of wirings provided so as to cross each other, at least one of the wirings crossing each other is laminated via an insulating film and contacts provided at two or more places of the insulating film are provided. A multilayer wiring structure interconnected via holes is provided, and at the intersection, the one multilayer wiring is arranged only on one side of the other wiring.

(2) In the active matrix substrate, at least one of the matrix wirings has a multi-layer wiring structure which is stacked via an insulating film and interconnected via contact holes provided at two or more places in the insulating film. At the intersection of the matrix wirings, the one multilayer wiring is arranged only on one side of the other wiring.

(Operation) According to the configuration of the above (1), the wiring can be multiplexed on the circuit board, so that redundancy for disconnection is achieved and reliability is improved.

According to the configuration (2), the matrix wirings such as the signal wirings and the scanning wirings can be multiplexed without lowering the aperture ratio. Therefore, redundancy for disconnection is achieved and reliability is improved.

(Example) Hereinafter, the present invention will be described in detail with reference to the drawings. In each embodiment described below, the present invention is applied to an active matrix substrate. However, the present invention is not limited to this. It can also be applied to a circuit board on which the wiring is formed.

FIG. 1A is a plan view of an active matrix substrate according to an embodiment of the present invention, FIG. 1B is a cross-sectional view taken along line AB, and FIG. 1C is a cross-sectional view taken along line CD.

In FIG. 1, a drain electrode (hereinafter, referred to as a lower signal wiring) 20 which is made of polycrystalline silicon and also serves as an active region 2 of a TFT is formed on a main surface of a glass substrate 1. Gate electrode 4 via gate insulating film 3
Are formed.

The insulating film 9 is formed on the surface of the lower signal wiring 20 and the gate electrode 4.
A1 wiring (hereinafter referred to as upper signal wiring) 6 is formed on the surface of the insulating film 9 on the lower signal wiring 20.

On the surface of the upper signal wiring 6 via an interlayer insulating film 10
An A1 wiring (hereinafter referred to as a lower scanning wiring) 7 is formed so as to intersect with the upper signal wiring 6, and an A1 wiring (hereinafter referred to as an upper scanning wiring) is formed on the surface of the lower scanning wiring 7 via an insulating film 11. 8) are formed.

The lower signal wiring 20 and the upper signal wiring 6 are connected via a contact hole 12a, the lower scanning wiring 7 and the upper scanning wiring 8 are connected via a contact hole 12b,
The lower scanning wiring 7 and the gate electrode 4 are connected via a contact hole 12c. The pixel electrode 5 is connected to one end of the active region 2 via a contact hole 12d. As described above, in the present embodiment, contact holes are provided at both ends of the wiring at each intersection.

In such an active matrix substrate,
Even if one of the upper and lower signal wirings 6 and 20 or one of the upper and lower scanning wirings 8 and 7 is disconnected, the signal can be supplied by the other of the upper and lower wirings, so that redundancy for the disconnection is achieved. You.

Further, according to the present embodiment, since the short circuit at the intersection is limited to the short circuit between the upper signal wiring 6 and the lower scanning wiring 7, as shown in FIG. ,
Irradiate the upper signal wiring 6 through the insulating film 11 and the interlayer insulating film 10 and cut the upper signal wiring 6 at two points at both ends of the intersection, or as shown in FIG. A laser beam is applied to the lower scanning wiring 7 through the glass substrate 1, the insulating film 9, and the interlayer insulating film 10, and the lower scanning wiring 7 is efficiently repaired by being cut at two locations at both ends of the intersection. Becomes possible.

As a result, redundancy is achieved even with respect to a short circuit at the intersection of the wirings, so that the reliability is significantly improved as compared with the related art.

When such a repair method is adopted, it is necessary that either the lower scanning wiring 7 or the upper signal wiring 6 has a characteristic of absorbing the laser beam 19. In other words,
It must be opaque to the laser beam 19. That is, the lowermost layer of the multilayer wiring layers constituting the scanning wiring,
Alternatively, it is necessary that the uppermost layer of the multilayer wiring layers constituting the signal column wiring is opaque to the laser beam.

Furthermore, according to the present embodiment, since the gate electrode 4 is formed before the lower scanning wiring 7, if the activation process is performed after forming the gate electrode 4 and before forming the upper signal wiring 6, The active region 2 and the lower signal wiring 20 can be reliably activated, and the problem of the prior art described with reference to FIG. 7 does not occur. Therefore, there is no problem that the aperture ratio is reduced because of the above.

FIG. 2 (a) is a plan view of a second embodiment of the present invention, and FIG. 2 (b) is a GH cross-sectional view thereof. The same reference numerals as those in FIG. 1 denote the same or equivalent parts.

In the present embodiment, a lower signal wiring 21 made of polycrystalline silicon and also serving as an active region 2 is formed on a glass substrate 1 by using FIG.
As shown in (1), it is formed only in a region that does not intersect with the upper and lower scanning wirings 26 and 41 to be formed later.

Next, after the gate insulating film 3 is formed on the surface of the active region 2, a lower scanning wiring 41 made of platinum silicide and also serving as the gate electrode 4 is formed, and an upper scanning wiring 26 made of A1 is formed via the insulating film 9. It is formed on the lower scanning wiring 41.

The scanning lines formed by the platinum silicide lower scanning lines 41 and the A1 upper scanning lines 26 are arranged so as to connect all the gate electrodes of the TFTs in the same row.

Next, the upper signal wiring 27 is formed on the surface of the upper scanning wiring 26 with the interlayer insulating film 10 interposed therebetween. Upper signal wiring 27 and lower signal wiring
21 is connected via a contact hole 12a.

According to such a configuration, all parts of the scanning wiring are multiplexed, and most of the signal wirings are also multiplexed by the lower signal wiring 21 and the upper signal wiring 27. improves.

Further, since the scanning wiring which requires a lower resistance value than the signal wiring is composed of platinum silicide and A1 whose resistance value 2 is two orders of magnitude lower than the impurity-doped polycrystalline silicon electrode, the characteristics of the scanning wiring are low. An excellent active matrix substrate can be obtained.

Further, in this embodiment, since the short circuit at the intersection is limited between the upper signal wiring 26 and the upper signal wiring 27, the laser light 19 is applied from the upper part similarly to the case described with reference to FIG. And the upper scanning wiring 26 is cut at both ends of the intersection with the upper signal wiring 27, efficient repair becomes possible and redundancy against short circuit is achieved.

FIG. 3 (a) is a plan view of a third embodiment of the present invention, and FIG. 3 (b) is an IJ sectional view thereof. The same reference numerals as those in FIG. 1 or 2 denote the same or equivalent parts. ing.

In the present embodiment, a lower scanning line 31 made of polycrystalline silicon is formed on a glass substrate 1, and an upper scanning line 36 having substantially the same shape as the lower scanning line 31 is formed on this surface via an insulating film 9. . Wirings 31 and 36 are connected via contact hole 12b.

Next, a gate insulating film 32 made of SiNx is formed, and an amorphous Si film (hereinafter, referred to as an active layer) functioning as an active layer is formed on the surface thereof.
a-Si film) 33 is formed. Further, on the surface of the a-Si film 33,
Source / drain electrodes 34a and 34b made of an n ⁺ -a-Si film are formed to complete an inverted staggered TFT.

Next, the A1 lower signal wiring 37 also serving as a lead electrode of the source / drain electrode 34a and the source / drain electrode 34b
The lead A1 electrode 35 is formed. Next, after forming the insulating film 11, a signal wiring 38 on A1 is formed on the surface thereof. wiring
37 and 38 are connected via a contact hole 12a.

As is apparent, also in the present embodiment, since the signal wiring and the scanning wiring are multilayered, the reliability against disconnection is improved. In addition, since a short circuit at the intersection occurs only between the upper scanning wiring 36 and the lower signal wiring 37, the above-described efficient repair by laser irradiation becomes possible, and redundancy for the short circuit is achieved.

FIG. 4 (a) is a plan view of a fourth embodiment of the present invention, FIG. 4 (b) is a sectional view taken along the line MN, and FIG. 4 (c) is a sectional view taken along the line KL. The same reference numerals indicate the same or equivalent parts.

In FIG. 1, a polycrystalline silicon thin film 40 functioning as a source / drain region of a TFT and an active region is formed on a glass substrate 1.
A gate electrode 77 formed integrally with the lower scanning wiring 41 made of silicide is formed via the gate insulating film 3.

On the lower scanning wiring 41, an upper scanning wiring 46 is formed via an insulating film 9, and the lower scanning wiring 41 and the upper scanning wiring 46 are
The two-layer scanning wiring interconnected via the contact hole 42c is formed.

Further, a lower signal wiring 47 is formed on the upper scanning wiring 46 via an interlayer insulating film 10. An upper signal line 48 is formed on the lower signal line 47 via the insulating film 11, and the lower signal line 47 and the upper signal line 48 are connected to each other via a contact hole 42a. Configure the wiring.

The polycrystalline silicon thin film 40 and the lower signal wiring 47 are connected to each other via a contact hole 42b.

As is apparent, also in the present embodiment, since the signal wiring and the scanning wiring are multilayered, the reliability against disconnection is improved. In addition, since a short circuit at the intersection occurs only between the upper scanning wiring 46 and the lower signal wiring 47, the above-described efficient repair by the laser irradiation becomes possible, and the redundancy for the short circuit is also achieved.

FIG. 5 is a cross-sectional view for explaining a fifth embodiment of the present invention. Here, the structure of an intersection between a signal wiring having a multilayer structure and a scanning wiring having a multilayer structure is particularly shown. The same reference numerals as those in the drawings denote the same or equivalent parts.

In each of the embodiments described so far, each of the wirings at the intersections is such that one of the multilayer wirings is disposed above (below) the other of the multilayer wirings.
As in the prior art described with reference to the figure, one of the multilayer wirings
All 82 are configured to be sandwiched between the other multilayer wirings 88.

However, the present embodiment is characterized in that, unlike the prior art, the thickness of the upper insulating film 89 formed on the wiring 82 is thicker than that of the lower insulating film 85 formed below.

According to such a configuration, when a short circuit occurs at the intersection, the location of the short circuit is more likely to be between the wires 81b and 82b than to be between the wires 81a and 82a. Very high.

Therefore, if a short circuit occurs at the intersection, if the wiring 81b or the wiring 82b is cut at both ends of the intersection as described above, it becomes possible to repair the wiring with a very high probability.

Also, as in the present embodiment, particularly, the upper insulating film 89 is formed on the insulating film 8.
With the multi-layer structure of 7, 83, it is possible to reduce the occurrence of short-circuits such as pinholes as compared with the case where the upper insulating film 89 has a single-layer structure.

In addition, if the configuration as in the present embodiment is employed and the repair is performed by the above-described method when a short circuit occurs, both the upper and lower insulating films have the same multilayer structure as the upper insulating film 89, and the short circuit is performed. At the time of occurrence, it is possible to achieve a final yield equal to or higher than that in a case where repair is performed by estimating any one short circuit.

In this embodiment, since the lower insulating film has a single-layer structure, the manufacturing process can be simplified as compared with the case where both the upper and lower insulating films have a multilayer structure. Equal or better yields can be achieved with simplified manufacturing processes. Note that such a configuration can be achieved even when the wiring 82 has a single-layer structure.

FIG. 6 is a perspective view showing a configuration of a color liquid crystal panel using the active matrix substrates of the above-described configurations.

In FIG. 1, a multilayer scanning wiring 301, a multilayer signal wiring 302, a pixel electrode 304, and a TFT 303 having the above-described configuration are formed in a matrix on a glass substrate 1, and an active matrix substrate 60 is formed.

The liquid crystal layer 30 is provided on the surface of the active matrix substrate 60.
An opposing electrode 307 is formed via 6, a color filter 308 is formed on the opposing electrode 307, and an insulating substrate 309 is formed on the color filter 308.

A polarizing plate 310 is formed on a main surface exposed to the outside of the glass substrate 1 and the insulating substrate 309.

In such an active matrix substrate,
By adjusting the light from the light source by applying a voltage to the pixel electrode 304, color display becomes possible.

In each of the embodiments described above, only the multi-layered wiring of the image display portion such as the signal wiring or the scanning wiring is described. However, such a wiring structure is formed on the glass substrate 1 together with the signal wiring and the like. Also, the present invention can be applied to a wiring forming a driving circuit for applying a voltage to a scanning wiring, a voltage supply line for supplying an output signal from the driving circuit to the signal wiring or the scanning wiring, or the like.

With this configuration, the reliability of the driving circuit and the voltage supply line is also improved, so that the reliability of the entire display device can be improved.

Further, in each of the embodiments described above, it is described that both the signal wiring and the scanning wiring are multilayered, but only one of them may be multilayered.

(Effects of the Invention) As is clear from the above description, according to the present invention, the wiring such as the signal wiring and the scanning wiring is multiplexed without lowering the aperture ratio. Reliability can be improved.

Moreover, since the location of the short circuit at the intersection can be easily determined, the probability of repair by laser irradiation is improved, and redundancy for the short circuit is achieved.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration of an active matrix substrate according to one embodiment of the present invention, FIG. 2 is a diagram showing a configuration of a second embodiment of the present invention, and FIG. 3 is a third embodiment of the present invention. FIG. 4 is a diagram showing a configuration of an example, FIG. 4 is a diagram showing a configuration of a fourth embodiment of the present invention, FIG. 5 is a diagram showing a configuration of a fifth embodiment of the present invention,
FIG. 6 is a partial cross-sectional view of a liquid crystal panel to which the present invention is applied, and FIGS. 7, 8, 9, and 10 are views showing a configuration of a conventional technique. 1, a glass substrate, 2, an active area, 3, 32, a gate insulating film, 4, a gate electrode, 5, a pixel electrode, 6, 27,
38, 48, 81a ... upper signal wiring, 7, 31, 41, 82b ... lower scanning wiring, 8, 26, 36, 82a ... upper scanning wiring, 9, 11, 8
3, 84, 85, 78, 79 ... insulating film, 10 ... interlayer insulating film, 12
…… Contact hole, 20, 37, 47, 81b …… Lower signal wiring, 70 …… TFT

Continuation of the front page (56) References JP-A-62-209514 (JP, A) JP-A-1-134344 (JP, A) JP-A-1-177020 (JP, A) JP-A-2-44775 (JP) , A) JP-A-2-157828 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) G02F 1/1343 G02F 1/1345

Claims (11)

(57) [Claims] 1. A circuit board having a plurality of wirings provided on a main surface of an insulating substrate so as to cross each other insulated from each other, wherein at least one of the wirings crossing each other is laminated via an insulating film. And a multilayer wiring structure interconnected via contact holes provided at two or more places in the insulating film, and at the intersection, the one wiring is arranged only on one side of the other wiring, The contact hole,
A circuit board, which is provided on both sides of the other intersecting wiring and separated from an end of the other wiring by a cutting space. 2. A wiring layer of at least one of the wiring layers forming one wiring, the wiring layer being closer to the other wiring, and at least a wiring layer of the wiring layer forming the other wiring being closer to the one wiring. 2. The circuit board according to claim 1, wherein at least one of the wiring layers has a characteristic of absorbing a laser beam. 3. A circuit board having a plurality of wirings provided on a main surface of an insulating substrate so as to insulate and cross each other, wherein at least one of the wirings crossing each other is laminated via an insulating film. And a multi-layer wiring structure interconnected via contact holes provided at two or more places in the insulating film. At the intersection, the other wiring is placed between the multi-layer wiring layers forming one wiring. A circuit board formed with an insulating film and a lower insulating film interposed therebetween, wherein one of the upper insulating film and the lower edge insulating film is thicker than the other. 4. The circuit board according to claim 3, wherein said thicker insulating film is an insulating film having a multilayer structure. 5. The wiring layer constituting one of the wirings, wherein the width of a wiring nearer to the other wiring is not narrower than the width of a wiring farther from the other wiring. 5. The circuit board according to claim 4, wherein 6. A plurality of matrix wirings provided on the main surface of an insulating transparent substrate so as to be insulated from each other and intersect with each other, thin film transistors provided at the intersections, and pixels driven by the thin film transistors An active matrix substrate comprising electrodes, wherein at least one of the matrix wirings is stacked via an insulating film and interconnected via contact holes provided at two or more places in the insulating film. At the intersection of the matrix wirings, the one multilayer wiring is arranged only on one side of the other wiring, and the contact holes are provided on both sides of the other crossing wiring, An active matrix substrate which is provided apart from an end by a cutting space. 7. A wiring layer of at least one of the wiring layers constituting one of the wiring layers which is closer to the other wiring, and a wiring layer of at least a wiring layer which is closer to the one wiring among the wiring layers constituting the other wiring. 7. The active matrix substrate according to claim 6, wherein at least a wiring layer of said one wiring has a characteristic of absorbing a laser beam. 8. A plurality of matrix wirings provided on a main surface of an insulating transparent substrate so as to cross each other insulated from each other, a thin film transistor element provided at the intersection, and a pixel driven by the thin film transistor element An active matrix substrate comprising electrodes, wherein at least one of the matrix wirings is stacked via an insulating film and interconnected via contact holes provided at two or more places in the insulating film. At the intersection of the matrix wiring, the other wiring is formed between the multilayer wiring layers constituting one wiring via an upper insulating film and a lower insulating film, and one of the upper insulating film and the lower insulating film An active matrix substrate, wherein the thickness of the active matrix substrate is larger than that of the other. 9. The active matrix substrate according to claim 8, wherein said thicker insulating film is an insulating film having a multilayer structure. 10. The wiring layer constituting the one wiring, wherein the width of the wiring nearer to the other wiring is not smaller than the width of the wiring farther from the other wiring. 10. The active matrix substrate according to claim 9, wherein 11. A driving circuit for applying a voltage to the matrix wiring, and a voltage supply line connecting the driving circuit and the matrix wiring, on a main surface of the insulating transparent substrate, further comprising the driving circuit. And at least one of the voltage supply line and the voltage supply line is a multilayer wiring structure that is stacked via an insulating film and interconnected via contact holes provided at two or more locations in the insulating film. The active matrix substrate according to any one of claims 6 to 10, wherein