JP2864920B2 - Silicon wafer quality inspection method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for inspecting the crystal quality of a silicon wafer, and more particularly, to a method for indirectly evaluating the withstand voltage characteristics (oxide film withstand voltage) of an oxide film formed on the silicon wafer.

[0002]

2. Description of the Related Art In a conventional silicon wafer inspection method, after growing a silicon single crystal rod, as a method of evaluating the quality of the single crystal rod, a surface of an as-cut wafer cut out from the single crystal rod to a predetermined thickness is used. Is etched with a mixed solution of hydrofluoric acid and nitric acid to remove the distortion of the wafer surface, and then is subjected to selective etching in a mixed solution of K ₂ Cr ₂ O ₇ , hydrofluoric acid and water. (Japanese Patent Application No. 3-074733). Further, since there is a relationship between the number of ripples counted by this method and the withstand voltage of the oxide film of the MOS type semiconductor device formed on the semiconductor wafer, the above-described wafer inspection method is based on the silicon single crystal rod growth method. Using a wafer cut out later, an evaluation equivalent to an oxide film breakdown voltage evaluation can be performed quickly and inexpensively (Japanese Patent Application No. Hei 3-076875).
issue).

[0003]

However, in the prior art, first, the density per unit volume of the ripple pattern in consideration of the amount etched at the time of selective etching is calculated from the oxide film breakdown voltage failure rate. It was lower than the density of medium defects per unit volume (hereinafter referred to as equivalent defect density). Particularly when the density of the ripple pattern is low, it is difficult to accurately predict the oxide film breakdown voltage failure rate. Secondly, when the selective etching is performed, not only a ripple pattern but also pits without a ripple pattern appear. However, we paid attention to this pit, but it was very difficult to observe it.
There was such a problem.

The present invention is intended to solve the above-mentioned problems, and has as its object to provide a method which is very quick and inexpensive as compared with the case of actually measuring the breakdown voltage of an oxide film, and which is more accurate and more accurate than conventional methods. Another object of the present invention is to provide a silicon wafer quality inspection method capable of predicting a defective rate.

[0005]

According to the method for inspecting the quality of a silicon wafer of the present invention, after growing a silicon single crystal rod,
The single crystal rod is cut into a wafer of a predetermined thickness, the surface of the as-cut wafer is mirror-finished by polishing, and then selectively etched with a mixed solution of K ₂ Cr ₂ O ₇ , hydrofluoric acid and water. The quality of the crystal is evaluated by counting the sum of the number of ripple patterns appearing on the surface and the number of etch pits not having the ripple pattern. In this specification, the above-mentioned "ripple wave"
`` Etch pit without pattern '' is the tip of the ripple pattern
Means an etch pit other than the etch pit located in the section
You.

The present invention makes it possible to easily and accurately observe pits appearing on a wafer surface by mirror finishing with polishing and selective etching in a mixed solution of K ₂ Cr ₂ O ₇ , hydrofluoric acid and water. It was done. Furthermore, by adding the density of the ripple pattern and the density of the etch pits without the ripple pattern, the defect rate of the oxide film breakdown voltage can be more accurately predicted.

In the present invention, the term "poor oxide film breakdown voltage" means that a gate oxide film having a thickness of 5 to 15 mm ² and a thickness of 15 to 40 nm is formed on a silicon wafer, and a phosphorus doped film formed on the oxide film is formed. When a DC voltage is applied between the silicon electrode and the silicon single crystal substrate, the electric field intensity applied to the oxide film when the gate current starts flowing at a current density of 1 mA / cm ² or more is less than 8 MV / cm. Say.
In addition, those having an electric field strength of 8 MV / cm or more at this time are referred to as non-defective products.

In the present invention, the polishing is preferably performed such that the wafer surface roughness after mirror finishing is 10 nm or less within a range of 500 μm square. Also,
The selective etching is for 10 to 60 minutes, in particular 25 to 3 minutes.
It is preferable to carry out for 5 minutes. By setting the conditions for the mirror finish and the selective etching in this way, it is possible to more easily and accurately observe the ripple pattern on the wafer surface and the etch pits not accompanied by the ripple pattern.

[0009]

When the density of the total number of ripple patterns appearing on the wafer surface according to the above procedure, the number of etch pits without the ripple pattern, and the oxide film defect rate are plotted, the scatter diagram showing a small variation in data is obtained. Is obtained, and a strong positive correlation is observed between the density and the oxide film defect rate. In addition, the density closely approximates the equivalent defect density in the oxide film calculated from the oxide film breakdown voltage defect rate. Become like

[0010]

The present invention will now be described with reference to examples of the present invention.
This will be described in more detail. Czochralski (CZ) method
From silicon single crystal rods grown under various conditions
Cut out c and polish the surface of the wafer
After making the roughness 10 nm or less in the range of 500 μm square,
Measurement of oxide film breakdown voltage and K_TwoCr_Two O₇And hydrofluoric acid and water
SECCO solution (F. Secco D'A)
ragona; J, Electrochem. Soc.
Selective etch for 30 minutes using 119 (1972) 948)
Was performed. Then, put this wafer in SECCO solution
Spreads over the upper part of the wafer when held stationary
A ripple pattern 11 as shown in FIG. 1 and a ripple pattern 11 as shown in FIG.
Optical pits 12 without ripples 11
Observe with a microscope and count the number.
With this, the density of the number of the ripple patterns 11 and the ripple pattern
The density of the total number of etch pits 12 without
Number of pieces / cm^Three) Was measured.

On the other hand, the measurement of the oxide film breakdown voltage and the calculation of the oxide film breakdown voltage defect rate were performed as follows. Gate oxidation was performed on the wafer at 900 ° C. for 100 minutes to form an oxide film having a thickness of 25 nm. Polysilicon was deposited on the oxide film and phosphorus was diffused to form an electrode pattern having an area of 8 mm ² . Then, a DC voltage is applied between the electrode and the silicon substrate, and the gate current is 1 mA / cm in current density.
Electric field intensity applied to the oxide film when it starts to flow ² or more is 8M
Those having a voltage of less than V / cm were regarded as defective products, that is, oxide film breakdown voltage defects.

The results of this example are shown in FIGS. FIG.
FIG. 2 is a schematic view of an etch pit 13 showing the shape of a ripple pattern 11, and FIG. 2 is an etch pit 12 without a ripple pattern 11.
FIG. 3 is a scatter diagram showing the relationship between “ripple pattern + etch pit density without ripple pattern” and “oxide film breakdown voltage failure rate”, and FIG. 4 is “defect density by selective etching”. And the oxide film breakdown voltage failure rate (integrated circuit handbook, Maruzen Co., 1968,
p. FIG. 520 is a scatter diagram showing a relationship with “equivalent defect density in oxide film”; However, the "density by selective etching" is a general term for "density of ripple pattern" and "density of etch pit without ripple pattern + ripple pattern".

From FIG. 3, there is a strong positive correlation between the density (number / cm ³ ) calculated from the sum of the number of ripple patterns and the number of etch pits without ripple patterns and the oxide film breakdown voltage failure. It turns out that there is a relationship.

Further, as apparent with reference to FIG. 4, the equivalent defect density of the oxide film in the defect density of only a ripple pattern appearing on as-cut wafer (number / cm ³⁾ (number /
scatter plot (comparative example) plotting the relationship with cm ³ ),
Scatter plot plotting the relationship between the defect density calculated from the total number of ripple patterns appearing on the mirror-finished wafer and the number of etch pits without the ripple pattern and the equivalent defect density in the oxide film (the present invention) example) a comparison of the, variation in better correlation of the latter scatter diagram according to the present invention is small and defect density by selective etching in an equivalent defect density in the oxide film, it more closer results
Was. From the above, the number of ripples (only)
Rather than measuring the degree, the number of ripples and ripples
Of the number of etch pits and the total number without etch pits
Performing silicon wafer quality inspection with higher accuracy
I found that can be done.

The specification of Japanese Patent Application No. 3-077333 mentioned above.
The wafer was processed according to the method described in the publication. Sand
The cut wafer (as-cut wafer without mirror finish) obtained in the above example was used as a sample, and the surface of the wafer was etched with a mixed solution of hydrofluoric acid and nitric acid to remove the surface distortion. Was selectively etched with a SECCO solution for 30 minutes, and the etched surface was observed with an optical microscope. As a result, although the rippled pattern 11 and the etch pit 13 at the tip of the rippled pattern 11 could be observed on the etched surface, as shown in FIG.
Was not observed. Thus, the surface of the wafer according to the prior art described above is
In the processing method, the etch pits without ripples
It is difficult to observe accurately and accurately.
Technology accurately measures the oxide film breakdown voltage failure rate of silicon wafers
Proved difficult to predict. Therefore, it is considered that only the defect appearing as the ripple pattern is not a factor of the oxide film breakdown voltage defect, and the etch pit without the ripple pattern is also a factor of deteriorating the oxide film breakdown voltage.

[0016]

As is apparent from the above description, according to the present invention, when inspecting a micro defect of a silicon single crystal rod, a mirror finish is performed by polishing, and then K ₂ C
By selectively etching with a mixture of r ₂ O ₇ , hydrofluoric acid and water, and counting the sum of the number of ripple patterns appearing on the surface and the number of etch pits without the ripple pattern, The defect rate can be predicted very quickly and inexpensively as compared with the case of measuring the actual oxide film breakdown voltage, and more accurately than the conventional method.

[Brief description of the drawings]

FIG. 1 is a schematic diagram showing a rippled shape in an example.

FIG. 2 is a schematic view showing an etch pit without a ripple pattern in the example.

FIG. 3 is a graph showing a relationship between a ripple pattern + a density of etch pits not accompanied by a ripple pattern and an oxide film breakdown voltage failure rate in the example.

FIG. 4 shows the relationship between the density of the ripple pattern and the equivalent defect density in the oxide film in the comparative example, and the density of the etch pits without the ripple pattern and the equivalent defect density in the oxide film in the example. 6 is a graph showing the relationship of.

[Explanation of symbols]

 11 Ripple pattern 12 Etch pit without ripple pattern 13 Etch pit at the tip of ripple pattern

Claims (3)

(57) [Claims] 1. After growing a silicon single crystal rod, the single crystal rod is cut into a wafer of a predetermined thickness, and the surface of the wafer is mirror-finished by polishing,
Selectively etched with a mixture of ₂ Cr ₂ O ₇ and hydrofluoric acid and water, and the number of ripple pattern appearing on the surface, by counting the sum of the number of etch pits without ripple pattern of crystalline A quality inspection method for a silicon wafer characterized by evaluating quality. 2. The quality inspection method for a silicon wafer according to claim 1, wherein the surface roughness of the wafer is reduced to 10 nm or less within a range of 500 μm square by the mirror finishing. 3. The method according to claim 1, wherein the selective etching is performed for 10 to 60 minutes.