JP2855458B2 - Processing material for semiconductor - Google Patents
Processing material for semiconductorInfo
- Publication number
- JP2855458B2 JP2855458B2 JP32386189A JP32386189A JP2855458B2 JP 2855458 B2 JP2855458 B2 JP 2855458B2 JP 32386189 A JP32386189 A JP 32386189A JP 32386189 A JP32386189 A JP 32386189A JP 2855458 B2 JP2855458 B2 JP 2855458B2
- Authority
- JP
- Japan
- Prior art keywords
- sic coating
- carbon substrate
- coating layer
- semiconductor
- dense
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Description
【発明の詳細な説明】 産業上の利用分野 本発明は炉芯管やサセプターなどの半導体用処理部材
に関する。Description: TECHNICAL FIELD The present invention relates to a semiconductor processing member such as a furnace core tube and a susceptor.
従来の技術 従来、この種の半導体用処理部材は、一般に炭素基材
の表面に可能なかぎり緻密なSiCコーティングを形成し
ようとしてきた。SiCコーティングがポーラスである
と、ピンホール等が発生しやすいからである。2. Description of the Related Art Conventionally, this type of semiconductor processing member has generally attempted to form a SiC coating as dense as possible on the surface of a carbon substrate. This is because if the SiC coating is porous, pinholes and the like easily occur.
発明が解決しようとする問題点 炭素基材の表面に直接緻密なSiCコーティングを形成
すると、熱衝撃抵抗が小さく、半導体用処理部材を高温
（たとえば1000℃）から常温へ急冷することをくり返し
たとき、炭素基材とSiCコーティングとの熱膨脹差が影
響し、SiCコーティングにクラックが発生しやすい欠点
があった。Problems to be Solved by the Invention When a dense SiC coating is formed directly on the surface of a carbon substrate, the thermal shock resistance is low, and when the semiconductor processing member is repeatedly cooled rapidly from a high temperature (for example, 1000 ° C.) to a normal temperature. In addition, the thermal expansion difference between the carbon substrate and the SiC coating has an effect, and the SiC coating has a disadvantage that cracks are easily generated.
発明の要旨 本発明の目的は、熱衝撃抵抗の大きいSiCコーティン
グ付きの半導体用処理部材を提供することである。SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor processing member having a SiC coating having high thermal shock resistance.
発明の要旨 発明は、前述の目的を達成するために請求項１に記載
の半導体用処理部材を要旨としている。SUMMARY OF THE INVENTION The invention provides a semiconductor processing member according to claim 1 to achieve the above object.
問題点を解決するための手段 本発明による半導体用処理部材の典型例はSiエピタキ
シャル成長用サセプターである。もちろん、本発明は、
炉芯管その他の半導体用処理部材にも適用できる。Means for Solving the Problems A typical example of the semiconductor processing member according to the present invention is a susceptor for Si epitaxial growth. Of course, the present invention
It is also applicable to furnace core tubes and other semiconductor processing members.
本発明においては、炭素基材の表面に直接緻密なSiC
コーティングを形成せず、まずポーラスSiCコーティン
グ層を形成し、その上に緻密SiCコーティング層を形成
する。換言すれば、炭素基材の表面と緻密SiCコーティ
ング層との間にポーラスSiCコーティング層を介在させ
るのである。In the present invention, the dense SiC
Without forming a coating, first, a porous SiC coating layer is formed, and a dense SiC coating layer is formed thereon. In other words, the porous SiC coating layer is interposed between the surface of the carbon substrate and the dense SiC coating layer.
このポーラスSiCコーティング層の厚みは５〜30μｍ
にする。５μｍよりも小さい厚みであると、熱衝撃によ
る応力が十分吸収しきれない。逆に厚みが30μｍを超え
ると、サセプターの場合伝熱性が変化する。The thickness of this porous SiC coating layer is 5 to 30 μm
To If the thickness is less than 5 μm, the stress due to thermal shock cannot be sufficiently absorbed. Conversely, if the thickness exceeds 30 μm, the susceptor changes its heat conductivity.
ポーラスSiCコーティング層の気孔率は、0.5〜10％に
する。気孔率が0.5％よりも小さいと、耐熱衝撃性が劣
る。逆に気孔率が10％を超えると基材と緻密なSiC層と
の接着強度が低下する。The porosity of the porous SiC coating layer is set to 0.5 to 10%. When the porosity is smaller than 0.5%, the thermal shock resistance is poor. Conversely, if the porosity exceeds 10%, the adhesive strength between the substrate and the dense SiC layer will decrease.
実施例１ サセプターの形状をした炭素基材の表面に次のように
して２層のSiCコーティングを形成した。すなわち、CH3
SiCl3（メチルトリクロルシラン）を原料として使用し
てCVD（化学蒸着）法によってSiCコーティングを炭素基
材の表面に形成した。その際、キャリアガスとして用い
たH2とCH3SiCl3との比（H2/CH3 SiCl3）を20以上とし、
まずSiリッチ層を合成し、そのSiリッチ層をHClガスに
よりエッチングした後、通常のCVD法でのCVDコーティン
グを形成した。その結果、炭素基材の表面に厚み20μｍ
のポーラスSiCコーティング層が形成され、その上に厚
み80μｍの緻密SiCコーティング層が形成された。Example 1 Two layers of SiC coating were formed on the surface of a carbon substrate in the shape of a susceptor as follows. That is, CH 3
An SiC coating was formed on the surface of the carbon substrate by a CVD (chemical vapor deposition) method using SiCl 3 (methyltrichlorosilane) as a raw material. At that time, the ratio (H 2 / CH 3 SiCl 3 ) of H 2 and CH 3 SiCl 3 used as the carrier gas was set to 20 or more,
First, a Si-rich layer was synthesized, and after etching the Si-rich layer with HCl gas, a CVD coating was formed by a normal CVD method. As a result, a thickness of 20 μm
Was formed, and a dense SiC coating layer having a thickness of 80 μm was formed thereon.
実施例２ 実施例１で使用した炭素基材と同じ材質及び形状の炭
素基材の表面に次のようにして２層からなるSiCコーテ
ィングを形成した。すなわち、SiCl4とC3H8を原料とし
て使用し、CVD法によってSiCコーティングを形成した。
コーティング形成の初期には過飽和に近いガス濃度と
し、その後、通常のCVD条件でCVDコーティングを行っ
た。この結果、ポーラスSiCコーティング層の厚みが20
μｍで、全体のSiCコーティング層の厚みが100μｍであ
った。Example 2 A two-layer SiC coating was formed on the surface of a carbon substrate having the same material and shape as the carbon substrate used in Example 1 as follows. That is, SiC coating was formed by CVD using SiCl 4 and C 3 H 8 as raw materials.
In the initial stage of coating formation, a gas concentration close to supersaturation was set, and thereafter, CVD coating was performed under normal CVD conditions. As a result, the thickness of the porous SiC coating layer was 20
μm, the total thickness of the SiC coating layer was 100 μm.
前述のサセプターについて、1000℃への急激→急速空
冷をくり返すサーマル・スポーリング・テストを行った
結果、両実施例１及び２のサセプターでは、300回急熱
急冷をくり返しも異常が認められなかった。A thermal spalling test was conducted on the above-mentioned susceptor, in which rapid cooling from 1000 ° C. to rapid cooling was repeated. As a result, no abnormalities were observed in the susceptors of Examples 1 and 2 after repeated rapid cooling 300 times. Was.
これに対し、従来の同形のサセプター（つまり炭素基
材表面に直接緻密なSiCコーティングを形成したもの）
は、同じサーマル・スポーリング・テストを実施した結
果、50回急熱急例をくり返したとき緻密SiCコーティン
グの表面にクラックが確認された。In contrast, conventional susceptors of the same shape (that is, a dense SiC coating formed directly on the carbon substrate surface)
As a result of the same thermal spalling test, cracks were observed on the surface of the dense SiC coating when the rapid thermal steepness was repeated 50 times.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 丹 信之 山形県西置賜郡小国町大字小国町378番 地 東芝セラミックス株式会社小国製造 所内 (72)発明者 市川 浩行 山形県西置賜郡小国町大字小国町378番 地 東芝セラミックス株式会社小国製造 所内 (72)発明者 松田 昌二 山形県西置賜郡小国町大字小国町378番 地 東芝セラミックス株式会社小国製造 所内 (56)参考文献 特開 平１−145400（ＪＰ，Ａ) 特開 昭54−53959（ＪＰ，Ａ) 特開 昭62−12668（ＪＰ，Ａ) 特開 昭63−11589（ＪＰ，Ａ) (58)調査した分野(Int.Cl.6，ＤＢ名) H01L 21/205 H01L 21/22──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Nobuyuki Tan 378 Oguni-machi, Oguni-machi, Oguni-machi, Nishiokitama-gun, Yamagata Pref. Address: Oguni Works, Toshiba Ceramics Co., Ltd. (72) Inventor: Shoji Matsuda 378, Ogunimachi, Ogunimachi, Ogunimachi, Nishiokitama-gun, Yamagata Prefecture: Oguni Works, Toshiba Ceramics Co., Ltd. (56) References JP-A-1-145400 (JP, A JP-A-54-53959 (JP, A) JP-A-62-12668 (JP, A) JP-A-63-11589 (JP, A) (58) Fields investigated (Int. Cl. 6 , DB name) H01L 21/205 H01L 21/22
Claims (1)
した半導体用処理部材において、前記SiCコーティング
が、前記炭素基材の表面に形成されたポーラスSiCコー
ティング層と、前記ポーラスSiCコーティング層の表面
に形成された緻密SiCコーティング層からなり、前記ポ
ーラスSiCコーティング層が0.5〜10％の気孔率と５〜30
μｍの厚みを有することを特徴とする半導体用処理部
材。1. A processing member for semiconductor having a surface of a carbon substrate on which a SiC coating is formed, wherein the SiC coating is a porous SiC coating layer formed on a surface of the carbon substrate, and a surface of the porous SiC coating layer. A porous SiC coating layer having a porosity of 0.5 to 10% and a porosity of 5 to 30%.
A semiconductor processing member having a thickness of μm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP32386189A JP2855458B2 (en) | 1989-12-15 | 1989-12-15 | Processing material for semiconductor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP32386189A JP2855458B2 (en) | 1989-12-15 | 1989-12-15 | Processing material for semiconductor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03185820A JPH03185820A (en) | 1991-08-13 |
| JP2855458B2 true JP2855458B2 (en) | 1999-02-10 |
Family
ID=18159410
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP32386189A Expired - Fee Related JP2855458B2 (en) | 1989-12-15 | 1989-12-15 | Processing material for semiconductor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2855458B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5741921B2 (en) * | 2011-04-08 | 2015-07-01 | 株式会社日立国際電気 | Substrate processing apparatus, method for forming coating film on surface of reaction tube used in substrate processing apparatus, and method for manufacturing solar cell |
| JP2012222157A (en) * | 2011-04-08 | 2012-11-12 | Hitachi Kokusai Electric Inc | Substrate processing apparatus and method of manufacturing solar cell |
-
1989
- 1989-12-15 JP JP32386189A patent/JP2855458B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH03185820A (en) | 1991-08-13 |
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