JP2827690B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device according to a method of manufacturing a multilayer wiring structure having fine wiring.

[0002]

2. Description of the Related Art Conventionally, in multilayer wiring of a semiconductor device,
As the interlayer insulating film, a polyimide resin film that is advantageous in flatness is used. This conventional method will be described with reference to FIGS. FIG. 2 is a diagram for explaining the conventional method.
FIG. 3 is a sectional view in the order of steps including steps A to D, and FIG.
FIG. 3 is a step-by-step cross-sectional view including steps E to G following FIG. 2.

In the conventional method, first, as shown in FIG. 2A, a BPSG 2 and a first aluminum wiring 3 are formed on a substrate 1 by a known technique, and then a silicon nitride film 4 is formed on the entire surface (FIG. 2). Step B) Then, the polyimide resin film 5 is spin-coated and heat-treated (FIG. 2 step C). Subsequently, FIG.
As shown in step D, the polyimide resin film 5 is formed by using photolithography technology and dry etching technology.
A through hole is opened at the end.

Next, as shown in FIG. 3E, a second metal wiring comprising an aluminum wiring 6 and a high melting point metal wiring 7 is formed by a known technique. Subsequently, as shown in FIG. 3F, a thin inorganic film of about 1000 to 3,000 angstroms is entirely formed by P-CVD at a temperature of about 300 ° C. and about 10 to 20 to prevent terater hillocks. After the formation in a short time of the order of minutes, the side wall 8 is formed by etching back by reactive ion etching.

Next, as shown in step G of FIG. 3, P-CV
Pre-bake for 1 hour at a temperature of 320 ° C in a D apparatus,
After removing water from the polyimide resin film 5, in-s
A 1 .mu.m-thick silicon nitride film 9 for cover is formed by itu by P-CVD. In the conventional method, a multilayer wiring structure is formed as described above.

[0006]

However, the conventional method of manufacturing a semiconductor device has the following problems. According to the conventional method, as shown in FIG. 4 (a cross-sectional view of a multilayer wiring structure according to the conventional method, which is a view for explaining problems of the conventional technique), a side wall is formed.
If the etch back at the time of forming the metal layer 8 is large, the side wall 8 is formed small, and as a result, the side surface of the aluminum wiring 6 is exposed, and there is a problem that the lateral hillock suppressing effect is lost.

That is, as shown in FIG. 4, a lateral hillock 10 is formed at the upper end of the aluminum wiring 6 in the pre-bake just before the formation of the cover silicon nitride film 4 (see step G in FIG. 3). There is a problem that a short occurs and the product yield and reliability are deteriorated.

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a method of manufacturing a semiconductor device which solves the above-mentioned problems, and more specifically, can easily perform an etch-back control when forming a side wall. It is another object of the present invention to provide a method for manufacturing a semiconductor device in which the effect of suppressing lateral hillocks does not disappear.

[0009]

According to the present invention, in manufacturing a multilayer wiring structure having fine wiring, a second metal wiring made of aluminum or an aluminum alloy and a refractory metal or an alloy thereof is formed. In the step, the second metal wiring is formed such that a wiring width of the aluminum or the aluminum alloy is smaller than a wiring width of the high melting point metal or an alloy thereof. To provide.

That is, the present invention provides (1) a step of forming a first metal wiring on one main surface of a semiconductor substrate, and (2) a step of forming a polyimide resin film on the metal wiring and forming a through-hole. (3) forming a second metal wiring made of aluminum or an aluminum alloy and a refractory metal or an alloy thereof on the resin film, and furthermore, the aluminum or aluminum alloy has a wiring width of the refractory metal. Or a step of forming the second metal wiring so as to be smaller than the wiring width of the alloy; (4) a step of forming an inorganic insulating film over the entire surface by a P-CVD method and then etching back by reactive ion etching; (5) 200 ℃ in P-CVD equipment
A method of manufacturing a semiconductor device, comprising a step of forming an inorganic insulating film after prebaking at a temperature of about 400 ° C.

Hereinafter, the present invention will be described in detail. According to the present invention, as in the conventional method, a first metal wiring and a polyimide resin film are formed on a substrate, a through hole is opened, and the polyimide is formed. A second metal wiring made of aluminum or an aluminum alloy and a refractory metal or an alloy thereof is formed on the resin film. A feature of the present invention is that, in the step of forming the second metal wiring, the wiring width of the aluminum or aluminum alloy is formed so as to be smaller than the wiring width of the high melting point metal or its alloy. .

As a method of forming the second metal wiring, in the present invention, means for selectively side-etching the wiring made of aluminum or an aluminum alloy can be adopted. Alternatively, it can be formed so that the wiring width of the aluminum alloy is smaller than the wiring width of the high melting point metal or its alloy. As described above, instead of the means for performing selective side etching after the formation of the laminated wiring, a means for side-etching aluminum or an aluminum alloy at the time of dry etching of the laminated wiring structure can be adopted.

After forming the second metal wiring as described above, an inorganic insulating film is formed on the entire surface by the P-CVD method as in the conventional method, and then etched back by reactive ion etching to form a side wall. Form. Then, P-CVD
Pre-baking is performed at a temperature of 200 to 400 ° C. in the apparatus to form an inorganic insulating film (silicon nitride film for a cover) to form a laminated wiring structure.

According to the present invention, as described above, in the step of forming the second metal wiring, the wiring width of aluminum or an aluminum alloy is formed so as to be smaller than the wiring width of a high melting point metal or its alloy. Specifically, by selectively side-etching the wiring made of aluminum or aluminum alloy, the etch-back control when forming the side wall can be easily performed, and the effect of suppressing the lateral hillock does not disappear. There is an advantage that a method for manufacturing a semiconductor device can be provided.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described with reference to FIG.
FIG. 1 is a view showing an embodiment of the present invention and is a cross-sectional view in the order of steps in forming a semiconductor device. In this embodiment, the means up to the step A in FIG. 1 are the same as the steps A to D in FIG.

First, as in the conventional method, a BPSG 2 and a first aluminum wiring 3 are formed on a substrate 1 by a known technique, a silicon nitride film 4 is formed on the entire surface, and then a polyimide resin film 5 is spin-coated. Then, heat treatment is performed. Subsequently, through holes are formed in the polyimide resin film 5 using a photolithography technique and a dry etching technique (see steps A to D in FIG. 2).

After the through holes are formed in the polyimide resin film 5, the aluminum wiring 6 and the WSi wiring 11 are formed by a known technique as shown in FIG. 1A.
Next, as shown in FIG. 1B, the aluminum wiring 6 is selectively etched on one side by 500 to 1000 Å with an alkaline diluent.

Subsequently, as shown in FIG. 1 step C, N ₂ ,
A thin silicon nitride film of about 1,000 to 3,000 angstroms was formed on the entire surface at a temperature of about 300 ° C. for a short time of about 10 to 20 minutes by a P-CVD method using a mixed gas of NH ₃ and SiH ₄ . Thereafter, the silicon nitride film is etched back by reactive ion etching using CF ₄ gas to form sidewalls 8. Next, as shown in Step D in FIG. 1, prebaking is performed in a P-CVD apparatus at a temperature of 320 ° C. for 1 hour to remove water from the polyimide resin film 5, and then the P-CVD is performed in-situ. Forming a 1 .mu.m-thick silicon nitride film 9 for a cover using a CVD method; Thus, a two-layer wiring structure is formed.

In this embodiment, an alkaline diluent is used for the selective side etching of the aluminum wiring 6.
The present invention is not limited to this. For example, a phosphoric acid-based material can be used as long as the etching selectivity between the upper WSi wiring 11 and the underlying polyimide resin film 5 and the aluminum wiring 6 can be obtained. A diluent and the like can be used arbitrarily. In addition, instead of performing selective side etching of aluminum after the formation of the stacked wiring, it is possible to obtain a desired stacked wiring form by adding conditions for side-etching the aluminum wiring 6 during dry etching of the stacked wiring structure.

[0020]

According to the present invention, as described in detail above, in the step of forming the second metal wiring, the wiring width of aluminum or an aluminum alloy is formed so as to be smaller than the wiring width of a high melting point metal or its alloy. More specifically, after selectively etching the aluminum or aluminum alloy side by side with respect to a laminate in which a refractory metal or its alloy is laid on aluminum or an aluminum alloy, an inorganic insulating film is formed. Since the side wall consisting of
This produces an effect that etch-back control can be easily performed when forming the nozzle.

Incidentally, the overetch margin at the time of etching back the inorganic film in the prior art is only about the thickness of the refractory metal on the aluminum wiring, that is, about 1000 Å, but according to the present invention, Since the side wall on the aluminum side is protected by a high melting point metal,
The effect of suppressing lateral hillocks is not lost even if overetching is performed for angstrom or more. Therefore, according to the present invention, since the lateral hillock does not occur at the upper end of the aluminum wiring by the pull-bake just before forming the silicon nitride film for the cover, there is an effect that the product yield and the reliability are not deteriorated.

[Brief description of the drawings]

FIG. 1 is a view showing an embodiment of the present invention and is a sectional view in the order of steps including steps A to D;

FIG. 2 is a view showing a conventional method and is a cross-sectional view in the order of steps including steps A to D.

FIG. 3 is a sectional view in the order of steps including steps E to G following FIG. 2;

FIG. 4 is a cross-sectional view of a multilayer wiring structure according to a conventional method, for explaining a problem of the conventional technology.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Substrate 2 BPSG 3 First aluminum wiring 4 Silicon nitride film 5 Polyimide resin film 6 Aluminum wiring 7 Refractory metal wiring 8 Side wall 9 Silicon nitride film 10 Lateral hillock 11 WSi wiring

Continuation of the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H01L 21/3205 H01L 21/3213 H01L 21/768

Claims (1)

(57) [Claims] (1) a step of forming a first metal wiring on one main surface of a semiconductor substrate; (2) a step of forming a polyimide resin film on the metal wiring and opening a through hole (3) forming a second metal wiring made of aluminum or an aluminum alloy and a refractory metal or an alloy thereof on the resin film, and further having a wiring width of the aluminum or the aluminum alloy of the refractory metal or the alloy thereof; A step of forming the second metal wiring so as to be smaller than the wiring width; (4) a step of forming an inorganic insulating film over the entire surface by a P-CVD method and then etching back by reactive ion etching; -Preheating at a temperature of 200 ° C to 400 ° C in CVD equipment
Forming an inorganic insulating film after forming the semiconductor device.